465 lines
155 KiB
Plaintext
465 lines
155 KiB
Plaintext
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!<arch>
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/ 0 0 0 0 6470 `
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@ ì ì ì ì ì ì ì ì ì ì 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ 0¼ \ô \ô \ô \ô \ô \ô \ô \ô \ô \ô \ô \ô \ô \ô \ô \ô ‚T ‚T ‚T ‚T ‚T ‚T ‚T ‚T ‚T ‚T ‚T ‚T ‚T ‚T ‚T ‚T ‚T ‚T ‚T ‚T ‚T ‚T ‚T ‚T ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ¯´ ád ád ád ád ád ád ád ád ád ád ád ád ád ád ád ád ád ád ád ád X X X X X X X X X X X X X 8 8 8 8 8 8 8 8 8 8 8 8 #ø #ø #ø +ø +ø +ø +ø +ø +ø +ø +ø +ø +ø +ø +ø +ø +ø +ø +ø +ø +ø +ø +ø G G G G S„ S„ S„ S„ S„ S„ S„ S„ S„ S„ S„ S„ S„ S„ S„ S„ S„ S„ S„ S„ –ˆ –ˆ –ˆ –ˆ –ˆ –ˆ –ˆ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ ¤¼ àØ àØ àØ àØ àØ àØ àØ àØ àØ àØ àØ àØ àØ àØ H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H 7ì 7ì 7ì 7ì 7ì 7ì 7ì 7ì 7ì 7ì 7ì 7ì 7ì 7ì 7ì 7ì 7ìbt_track_pbus_update rfpll_cap_track txpwr_correct txpwr_cal_track tx_pwctrl_background bt_track_tx_power bt_track_pll_cap phy_param_track wifi_track_tx_power phy_param_track_tot RFChannelSel phy_change_channel phy_bt_power_track phy_xpd_tsens phy_freq_mem_backup ant_dft_cfg ant_wifitx_cfg ant_wifirx_cfg_rom ant_bttx_cfg_rom ant_btrx_cfg ant_tx_cfg ant_rx_cfg phy_chan_dump_cfg phy_enable_low_rate phy_disable_low_rate phy_dig_reg_backup phy_chan_filt_set phy_rx11blr_cfg bb_wdt_rst_enable bb_wdt_int_enable bb_wdt_timeout_clear bb_wdt_get_status set_cca set_rx_sense phy_get_rf_cal_version noise_check_loop phy_get_romfunc_addr get_chip_version rf_init register_chipv7_phy_init_param phy_reg_init bb_init register_chipv7_phy phy_wakeup_init phy_xpd_rf phy_close_rf rf_cal_data_recovery phy_rfcal_data_sub rf_cal_data_backup phy_rfcal_data_check g_phyFuns phy_param pbus_force_mode pbus_rd_addr pbus_rd_shift pbus_force_test pbus_rd pbus_debugmode pbus_workmode pbus_set_rxgain pbus_xpd_rx_off pbus_xpd_rx_on pbus_xpd_tx_off pbus_xpd_tx_on pbus_set_dco set_loopback_gain txcal_debuge_mode txcal_work_mode save_pbus_reg set_pbus_mem_update_ppa_eco2 set_pbus_mem_update_lo_eco2 set_pbus_mem_update_lo set_pbus_mem_update set_pbus_mem_eco2 set_pbus_mem set_pbus_logain freq_module_resetn freq_chan_en_sw write_chan_freq get_freq_mem_param get_freq_mem_addr read_rf_freq_mem_new freq_i2c_mem_write_new bt_txpwr_freq wr_rf_freq_mem_new freq_reg_init freq_num_get_data freq_i2c_num_addr freq_i2c_write_set_new pll_dac_mem_update pll_mem_update pll_cap_mem_update get_rf_freq_init_new freq_get_i2c_data freq_i2c_data_write set_chan_freq_hw_init phy_en_hw_set_freq wait_freq_set_busy phy_dis_hw_set_freq set_chan_freq_sw_start phy_get_rf_freq_init phy_chan_hw_init recode_freq_ctrl0_reg mhz2ieee chan_to_freq restart_cal write_rfpll_sdm wait_rfpll_cal_end rfpll_set_freq set_rfpll_freq set_rf_freq_offset set_channel_rfpll_freq phy_set_freq write_pll_cap read_pll_cap rfpll_cap_correct rfpll_cap_init_cal chip_v7_set_chan_misc chip_v7_set_chan chip_v7_set_chan_offset chip_v7_set_chan_ana set_chanfreq get_pll_ref_code phy_set_tsens_power tsens_read_init code_to_temp tsens_dac_to_index tsens_dac_cal_new phy_set_tsens_range tsens_code_read tsens_temp_read_new phy_get_tsens_value tsens_temp_read temp_to_power get_temp_init phy_tsens_attribute enter_critical_phy exit_critical_phy abs_temp set_chan_cal_interp loopback_mode_en get_data_sat phy_byte_to_word phy_get_rx_freq bb_bss_cbw40 i2c_master_reset set_adc_rand phy_time_now i2c_rc_set_reg get_rc_dout rc_cal pwdet_reg_init pwdet_sar2_init en_pwdet get_sar_sig_ref pwdet_tone_start linear_to_db pwdet_wait_idle pkdet_vol_start read_sar_dout get_tone_sar_dout get_fm_sar_dout get_power_db meas_tone_pwr_db txtone_linear_pwr read_sar2_code get_sar2_vol get_pll_vol
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phy_tester_cali.o/
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phy_analog_cal.o/
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phy_track.o/ 0 0 0 644 5780 `
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— ç€ BˆÀA€‘ã$ÿ²@"D’DIA‚€A"Ä&ÂJÀƪ„D KŒ@"…
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B FA€— ç€ ‘ã$ÿ²@"D’DIA‚€AEÆ— ç€ · ²@ƒ…G7 A g Î"Ì&ÊJÈNÆRÄ— ç€ — ç€ · „ *‰— ç€ LX7 — ç€ – $ 7 Ê…�F — ç€ ƒGÄG´ƒF¤F”ƒE7 — ç€ ƒ7 — ç€ 7 — ç€ ƒÔ7 — ç€ ƒä · — ç€ ƒô ‰ — ç€ … — ç€ 7 — ç€
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· ‰ƒi… — ç€ ãIÿ… — ç€ ÔƒÄ7 — ç€ V¤ ƒU„ 7 — ç€ bDò@ÒDBI²I"Ja g CHIP is ESP32-H2 ECO3
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CHIP is ESP32-H2 ECO2
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17:46:10 Aug 1 2025 a8ef10c %d,%d,%s,%s,%s rfrx:0x%x; rftx:0x%x,0x%x; bb1:0x%x,0x%x; bb2:%d,%d
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param_flag: 0x%x
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vdd33=%d, temp_code=%d, offset=%d, temp_code_init=%d
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rc_dout, %d; bt: %d, %d, %d, %d
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bt_cal_power, %d
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bt_pwctrl_atten, 0x%x, RXDC_RFRX, %d, %d; RXIQ, %d,%d
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sar_dc_code=%d, sar_ref_code=%d
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i2c_bias %02d: 0x%x
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i2c_bbpll %02d: 0x%x
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i2c_txtop %02d: 0x%x
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i2c_bbtop %02d: 0x%x
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i2c_rfpll %02d: 0x%x
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i2c_rfpll_sdm %02d: 0x%x
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i2c_pmu %02d: 0x%x
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i2c_ulp %02d: 0x%x
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i2c_sar %02d: 0x%x
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%d, addr=%d, rd_data=0x%x
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btv3_2 0x%x: 0x%x
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bt_agc 0x%x: 0x%x
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btmac 0x%x: 0x%x
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zb_bb 0x%x: 0x%x
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802154_reg 0x%x: 0x%x
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zb_reg 0x%x: 0x%x
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i2c_mst 0x%x: 0x%x
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FECTRL 0x%x: 0x%x
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FECOEX 0x%x: 0x%x
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FEDATA 0x%x: 0x%x
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pmu 0x%x: 0x%x
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PCR 0x%x: 0x%x
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MODEM_SYSCON 0x%x: 0x%x
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MODEM_LPCON 0x%x: 0x%x
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bt_correct_power:%d
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phy_version: %d,%d, %s, %s, %s
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ir_cap_ext: %d,
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ir_dac_ext: GCC: (crosstool-NG esp-2020r1-50-g5c6d8df) 8.2.0 ( * * * * 1 $ / ) / . ( / 3 < / 8 P / = h / C | / I � / O ¤ / U ¸ / [ Ì / a Ü / g ì / m / s w L { x ¨ ƒ Ð ˆ ø � ( ’ X — € œ ´ ¡ Ü ¦ « 4 ° \ µ - » - Á 0 - Ç H - Í ` - Ó x - Ù ” - ß ¨ - å ¼ - ë
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ð B
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2
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* 0 " ' $ , 2 2 2 8 2 > 2 D " I ì N z S ´ X ) ^ ) d i n + t + z + € , + † : ‹ . � • 6 š . 0 ¥ ª " ° 0 ¶ , ¼ , Â L , È p , Î „ , Ô ˜ , Ú , à ¬ , æ ¸ , ì È , ò &
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" $ & ( ) * + , - . / 0 1 2 3 ø T # - 5 B G R ‚ ` Æ
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n z 6 ‡ ” t ¦ ¸ Å † Ó â ò ! . ( A ´ L T e d q ~ ® Œ Î š ¿ Ô 8 á 8 " ï * $ ' r & 5 ü 2 ( .LANCHOR0 .LC0 .LC1 .LC2 .LC3 .LC4 .LC5 .LC6 .LC7 .LC8 .LC9 .LC10 .LC11 .LC12 .LC13 .LC14 .LC15 .LC16 .LC17 .LC18 .L6 .L7 .L8 .L9 .L10 .L11 .L12 .L13 .L14 .L15 .L16 .L17 .L18 .L19 .LC19 .LC20 .LC21 .LC22 .LC23 .LC24 .LC25 .LC26 .LC27 .L36 .L37 .L38 .L39 .L40 .L41 .L42 .L43 .L44 .L56 .L58 .L60 .L61 .LC28 .LC29 .LC30 .LC31 .L68 .L67 .L70 .L71 .LC32 .LC33 .L77 .L78 .LC34 .LC35 .LC36 .LC37 .L83 .L86 .L88 .L89 .LC38 .L95 .L99 .L103 .LC39 .LC40 .LC41 .LC42 .LC43 .LC44 .LC45 .LC46 .LC47 .LC48 .LC49 .L109 get_phy_version_str phy_get_rf_cal_version phy_param sprintf phy_version_print phy_printf phy_reg_check phy_i2c_check i2c_readReg get_iq_value get_dc_value get_bias_ref_code i2c_writeReg_Mask get_sar2_vol phy_get_vdd33 pbus_debugmode pbus_force_test pbus_workmode rfpll_cap_check chip_v7_set_chan read_pll_cap chip_version_print pbus_print pbus_rd debug_print_line bt_rx_force ets_delay_us force_rx_gain phy_mem_print get_freq_mem_param get_freq_mem_addr read_rf_freq_mem_new phy_mem_read phy_mem_write freq_i2c_mem_write_new phy_tx_gain_print bt_set_tx_gain phy_cal_print tsens_temp_read € 3 � 3 � 3 3 3 3 " " 3 & & 3 , , 3 0 0 3 4 4 3 8 8 3 < < 3 @ ‚ @ 3 H H 3 € 3 � 3 � 3 3 3 3 $ $ 3 ( ( 3 , , 3 0 0 3 4 4 3 : „ : 3 3 " " 3 ( „ ( 3 D D 3 R R 3 X „ X 3 p p 3 ~ ~ 3 „ „ „ 3
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3 ®
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® 3 ´ „ ´ 3 È È 3 Ö Ö 3 Ü „ Ü 3 ð ð 3 þ þ 3 „ 3
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3 .
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. 3 4 „ 4 3 P P 3 ^ ^ 3 d „ d 3 x x 3 † † 3 Œ „ Œ 3 ¬ ¬ 3 º º 3 À „ À 3 Ô Ô 3 â â 3 è „ è 3 ü ü 3
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3 „ 3 , , 3 : : 3 @ „ @ 3 T T 3 b b 3 h „ h 3 0 ` Œ ¼ ä < l ” È ð H ! p " # 3 ‡ 3 ( # ( 3 . „ . 3 < $ < 3 L ‡ L 3 X $ X 3 ^ „ ^ 3 l % l 3 | ‡ | 3 ˆ % ˆ 3 Ž „ Ž 3 œ & œ 3 ¬ ‡ ¬ 3 ¸ & ¸ 3 ¾ „ ¾ 3 Ì ' Ì 3 Ü ‡ Ü 3 è ' è 3 î „ î 3 ü ( ü 3 ‡ 3 ( 3 „ 3 , ) , 3 < ‡ < 3 H ) H 3 N „ N 3 \ * \ 3 l ‡ l 3 x * x 3 ~ „ ~ 3 Œ + Œ 3 œ ‡ œ 3 ¨ + ¨ 3 ® „ ® 3 6 , f - – . Æ / ö 0 & 1 V 2 † 3 ¶ 4 ,5 " ,6 . -7 4 -8 ‹ 3 * ‹ * 3 4 Œ 4 3 L ‹ L 3 b ‹ b 3 Ž 3 � 3 * ‹ * 3 4 Œ 4 3 L ‹ L 3 Z � Z 3 b � b 3 * ’ * 3 2 “ 2 3 F ‡ F 3 ` 9 ` 3 d 9 d 3 h : h 3 l „ l 3 ~ : ~ 3 „ „ „ 3 � ; � 3 ” ; ” 3 ˜ „ ˜ 3 < 3 ¤ < ¤ 3 ¨ „ ¨ 3 ¼ : ¼ 3  „  3 Î ; Î 3 ä „ ä 3 X = \ > Œ ? Ê @ � 3 � 3 A 3 A 3 „ 3 B 3 " B " 3
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C & -D
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–
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3 E 3 E 3 „ 3 ( – ( 3 6 – 6 3 @ F @ 3 F F F 3 J „ J 3 V – V 3 d – d 3 n G n 3 t G t 3 x „ x 3 „ – „ 3 ’ – ’ 3 ¢ H ¢ 3 ¦ H ¦ 3 ¬ „ ¬ 3 ™ 3 < ™ < 3 R ™ R 3 ,I b -J T ˜ T 3 ,K 2 ,L œ 3 * M * 3 < � < 3 H ž H 3 V M V 3 Z „ Z 3 j � j 3 v ž v 3 „ M „ 3 Š „ Š 3 ž š ž 3 ¦ • ¦ 3 Æ š Æ 3 ’ N ž 3 ( O ¡ 3 ( P £ 3 � T 3 T � T 3 T Q 3 Q 3 " „ " 3 ƒ 3 � 3 � 3 " � " 3 ( ¥ ( 3 2 R 2 3 6 R 6 3 : „ : 3 B � B 3 J S J 3 R S R 3 V „ V 3 r T r 3 v T v 3 z „ z 3 † U † 3 Š U Š 3 Ž „ Ž 3 – V – 3 š V š 3 ž „ ž 3 ª W ª 3 ® W ® 3 ² „ ² 3 ¾ W ¾ 3  ;  3 Æ „ Æ 3 Ò W Ò 3 Ö � Ö 3 Ú „ Ú 3 â ; â 3 æ „ æ 3 î X î 3 ò X ò 3 ö „ ö 3 Y 3 Y 3 „ 3 ; 3 $ „ $ 3 4 Z 4 3 8 Z 8 3 < „ < 3 L [ L 3 P [ P 3 T „ T 3 j ¢ j 3 \ .symtab .strtab .shstrtab .text .data .bss .rela.text.get_phy_version_str .rela.text.phy_version_print .rela.text.phy_reg_check .rela.text.phy_i2c_check .rela.text.get_iq_value .text.get_dc_value .rela.text.get_bias_ref_code .rela.text.phy_get_vdd33 .rela.text.rfpll_cap_check .rela.text.chip_version_print .rela.text.pbus_print .text.debug_print_line .rela.text.bt_rx_force .rela.text.force_rx_gain .rela.text.phy_mem_print .rela.text.phy_mem_read .rela.text.phy_mem_write .rela.text.phy_tx_gain_print .rela.text.phy_cal_print .bss.phy_version_str .rodata.chip_version_print.str1.4 .rodata.get_phy_version_str.str1.4 .rodata.pbus_print.str1.4 .rodata.phy_cal_print.str1.4 .rodata.phy_i2c_check.str1.4 .rodata.phy_mem_print.str1.4 .rodata.phy_reg_check.str1.4 .rodata.phy_tx_gain_print.str1.4 .rodata.phy_version_print.str1.4 .rodata.rfpll_cap_check.str1.4 .comment 4 ! 4 ' 4 1 4 T , @ ð h 4 P ˆ B K @ X 4 m Ê ‚ h @ x! ˜ 4 † L Æ � @ & Ì 4
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µ r Ä Ï j á j .LANCHOR1 .LANCHOR0 .L5 .L3 .L2 .L4 .L8 .L11 .L10 .L13 .L14 .L16 .L15 .LC0 .L22 .L24 set_tx_gain_mem phy_param write_gain_mem get_tx_gain_table bt_get_tx_gain bt_get_tx_gain_level bt_set_tx_gain phy_printf phy_tx_table_eco2 phy_tx_table 3 ( ( 3 ” ” 3 6 n ¢ - ¼ - 3 3 3 3 8 8 3 < < 3 V , ^ , 3 3 d d 3 D
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