esp32-arduino-libs/esp32s2/lib/libesp_driver_spi.a

!<arch>
/               0           0     0     0       1772      `
@¤¤¤¤¤¤¤¤¤¤¤¤¤¤¤¤¤¤;x;x;x;x;x;x;x;x;x;x;x;x;x;x;x;x;x;x, , , , , , , , , , ñLñLñLñLñLñL¢ì¢ì¢ì¢ì¢ì¢ì¢ì¢ì¢ì¢ì¢ì¢ìspicommon_irqsource_for_hostspicommon_irqdma_source_for_hostspicommon_dma_chan_allocspicommon_dma_desc_allocspicommon_dma_desc_setup_linkspicommon_dma_chan_freespicommon_bus_initialize_iospicommon_bus_free_io_cfgspicommon_cs_initializespicommon_cs_free_iospicommon_bus_using_iomuxspi_bus_lock_get_by_idspi_bus_initializespi_bus_dma_memory_allocspi_bus_get_attrspi_bus_get_dma_ctxspi_bus_freespi_bus_register_destroy_funcspi_get_timingspi_get_freq_limitspi_bus_add_devicespi_bus_remove_devicespi_device_get_actual_freqspi_get_actual_clockspi_device_queue_transspi_device_get_trans_resultspi_device_transmitspi_device_acquire_busspi_device_release_busspi_device_polling_startspi_device_polling_endspi_device_polling_transmitspi_bus_get_max_transaction_lenspi_bus_multi_trans_mode_enablespi_device_queue_multi_transspi_device_get_multi_trans_resultspi_slave_freespi_slave_initializespi_slave_enablespi_slave_disablespi_slave_queue_transspi_slave_queue_resetspi_slave_queue_trans_isrspi_slave_queue_reset_isrspi_slave_get_trans_resultspi_slave_transmitspi_dma_enable_burstspi_dma_get_alignment_constraintsspi_dma_appendspi_dma_get_eof_descspi_dma_resetspi_dma_startspi_slave_hd_deinitspi_slave_hd_initspi_slave_hd_enablespi_slave_hd_disables_spi_slave_hd_append_txdmas_spi_slave_hd_append_rxdmaspi_slave_hd_queue_transspi_slave_hd_get_trans_resspi_slave_hd_read_bufferspi_slave_hd_write_bufferspi_slave_hd_append_transspi_slave_hd_get_append_trans_res//                                              56        `
spi_common.c.obj/
spi_master.c.obj/
spi_slave_hd.c.obj/
/0              0           0     0     644     144280    `
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E (%lu) %s: %s(%d): wp not valid
E (%lu) %s: %s(%d): hd not valid
E (%lu) %s: %s(%d): spi data4 not valid
E (%lu) %s: %s(%d): spi data5 not valid
E (%lu) %s: %s(%d): spi data6 not valid
E (%lu) %s: %s(%d): spi data7 not valid
E (%lu) %s: %s(%d): mosi not valid
E (%lu) %s: %s(%d): miso not valid
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E (%lu) %s: not using iomux pins
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E (%lu) %s: %s(%d): not all required capabilities satisfied.
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E (%lu) %s: %s(%d): ESP_INTR_FLAG_IRAM should be disabled when CONFIG_SPI_MASTER_ISR_IN_IRAM is not set.
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spi_ll.hportmacro.hstddef.h_default_types.hlock.hlock.h_stdint.hesp_err.hesp_log_level.h	esp_log_config.h	interrupts.h
spi_struct.hspi_periph.hesp_intr_types.h
spinlock.h
clk_tree_defs.h
spi_types.hspi_common.hgpio_num.h
gpio_types.hperiph_defs.h
dma_types.hspi_dma.hgpio_struct.hspi_share_hw_ctrl.hspi_common_internal.hgpio_periph.hesp_cache_private.hgpio.hgpio.hesp_rom_gpio.hperiph_ctrl.hesp_heap_caps.hesp_log.h	stdlib.hesp_log_timestamp.h	assert.h<built-in>
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E (%lu) %s: %s(%d): txdata transfer > host maximum
E (%lu) %s: %s(%d): rxdata transfer > host maximum
E (%lu) %s: %s(%d): rx length > tx length in full duplex mode
E (%lu) %s: %s(%d): SPI3 does not support octal mode
E (%lu) %s: %s(%d): Incompatible when setting to both Octal mode and 3-wire-mode
E (%lu) %s: %s(%d): Incompatible when setting to both Octal mode and half duplex mode
E (%lu) %s: %s(%d): Incompatible when setting to both multi-line mode and 3-wire-mode
E (%lu) %s: %s(%d): Incompatible when setting to both multi-line mode and half duplex mode
E (%lu) %s: %s(%d): trans tx_buffer should be NULL and SPI_TRANS_USE_TXDATA should be cleared to skip MOSI phase.
E (%lu) %s: %s(%d): trans rx_buffer should be NULL and SPI_TRANS_USE_RXDATA should be cleared to skip MISO phase.
E (%lu) %s: %s(%d): Dummy phase is not available when both data out and in are enabled
E (%lu) %s: %s(%d): txdata transfer > hardware max supported len
E (%lu) %s: %s(%d): rxdata transfer > hardware max supported len
E (%lu) %s: %s(%d): Using PSRAM must when cache is enabled
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E (%lu) %s: %s(%d): spics pin invalid
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E (%lu) %s: %s(%d): use feature flag 'SPI_DEVICE_NO_RETURN_RESULT' but no post callback function sets
E (%lu) %s: %s(%d): no free cs pins for the host
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