first commit

2026-05-22 22:05:03 +03:00
commit 43393d2692
33463 changed files with 9249702 additions and 0 deletions
@@ -0,0 +1,250 @@
+dependencies:
+  chmorgan/esp-libhelix-mp3:
+    component_hash: cbb76089dc2c5749f7b470e2e70aedc44c9da519e04eb9a67d4c7ec275229e53
+    dependencies:
+    - name: idf
+      require: private
+      version: '>=4.1.0'
+    source:
+      registry_url: https://components.espressif.com/
+      type: service
+    version: 1.0.3
+  espressif/dl_fft:
+    component_hash: 7dadbd644c0d7ba4733cc3726ec4cff6edf27b043725e1115861dec1609a3d28
+    dependencies:
+    - name: idf
+      require: private
+      version: '>=5.0'
+    source:
+      registry_url: https://components.espressif.com
+      type: service
+    version: 0.3.1
+  espressif/eppp_link:
+    component_hash: 9472e6825f4bb71eca2b39cf1bc92659c1ac60bfd7416560ad033a7dd8641b17
+    dependencies:
+    - name: espressif/esp_serial_slave_link
+      registry_url: https://components.espressif.com
+      require: private
+      version: ^1.1.0
+    - name: idf
+      require: private
+      version: '>=5.2'
+    source:
+      registry_url: https://components.espressif.com
+      type: service
+    version: 1.1.4
+  espressif/esp-dsp:
+    component_hash: 42dce32d46ac93dc11f60d368e29a830e9661c7345d794b8a45c343479cae636
+    dependencies:
+    - name: idf
+      require: private
+      version: '>=4.2'
+    source:
+      registry_url: https://components.espressif.com/
+      type: service
+    version: 1.7.0
+  espressif/esp-modbus:
+    component_hash: 5d5e90b9e55721a8a194b301ad8102d4affb647f47b74cd413ff7d1ce2c1169c
+    dependencies:
+    - name: idf
+      require: private
+      version: '>=4.3'
+    source:
+      registry_url: https://components.espressif.com/
+      type: service
+    version: 1.0.18
+  espressif/esp-nn:
+    component_hash: f4633a02f05fef53b80de65ade1f733ebdef637e4c8b8be4eb11f5e27f6d9f3e
+    dependencies:
+    - name: idf
+      require: private
+      version: '>=4.2'
+    source:
+      registry_url: https://components.espressif.com
+      type: service
+    version: 1.1.2
+  espressif/esp-sr:
+    component_hash: 46b1f70f8b561714b958d1c455213cca07162755d1b8df53498081199f15136f
+    dependencies:
+    - name: espressif/dl_fft
+      registry_url: https://components.espressif.com
+      require: private
+      version: '>=0.2.0'
+    - name: espressif/esp-dsp
+      registry_url: https://components.espressif.com
+      require: private
+      version: 1.7.0
+    - name: idf
+      require: private
+      version: '>=5.0'
+    source:
+      registry_url: https://components.espressif.com/
+      type: service
+    version: 2.3.1
+  espressif/esp-tflite-micro:
+    component_hash: 57aa3889d3c7b7a513f716c2cb8707476a5bf42971d63a6f6d38a5616d862e57
+    dependencies:
+    - name: espressif/esp-nn
+      registry_url: https://components.espressif.com
+      require: private
+      version: '>=1.1.1'
+    - name: idf
+      require: private
+      version: '>=5.0'
+    source:
+      registry_url: https://components.espressif.com/
+      type: service
+    version: 1.3.5
+  espressif/esp_hosted:
+    component_hash: 404f5a8f9e9bcfbce6c64e0a171e81b4a45acdb22a8c8b44988571d609e91334
+    dependencies:
+    - name: idf
+      require: private
+      version: '>=5.3'
+    source:
+      registry_url: https://components.espressif.com/
+      type: service
+    version: 2.11.6
+  espressif/esp_modem:
+    component_hash: 07b6ca85dc0c1edbcd76f650005c74067001db138db6bfa106bf05567adca4af
+    dependencies:
+    - name: idf
+      require: private
+      version: '>=4.1'
+    source:
+      registry_url: https://components.espressif.com/
+      type: service
+    version: 2.0.0
+  espressif/esp_serial_slave_link:
+    component_hash: ac1776806de0a6e371c84e87898bb983e19ce62aa7f1e2e5c4a3b0234a575d2c
+    dependencies:
+    - name: idf
+      require: private
+      version: '>=5.0'
+    source:
+      registry_url: https://components.espressif.com
+      type: service
+    version: 1.1.2
+  espressif/esp_wifi_remote:
+    component_hash: 67efd839bd84efb94b149a28044f9918473e7f4facf709bf4121744e4927df09
+    dependencies:
+    - name: espressif/esp_hosted
+      registry_url: https://components.espressif.com
+      require: private
+      rules:
+      - if: target in [esp32h2, esp32p4]
+      version: '>=2.11'
+    - name: espressif/wifi_remote_over_eppp
+      registry_url: https://components.espressif.com
+      require: private
+      version: '>=0.1'
+    - name: idf
+      require: private
+      version: '>=5.3'
+    source:
+      registry_url: https://components.espressif.com/
+      type: service
+    version: 1.3.2
+  espressif/lan867x:
+    component_hash: 651c9d6e3d96acb08bd5066144b12a12e94df0a6241127a0538d8680689de2c4
+    dependencies:
+    - name: espressif/lan86xx_common
+      registry_url: https://components.espressif.com
+      require: private
+      version: '*'
+    - name: idf
+      require: private
+      version: '>=5.3'
+    source:
+      registry_url: https://components.espressif.com/
+      type: service
+    targets:
+    - esp32
+    - esp32p4
+    version: 2.0.0
+  espressif/lan86xx_common:
+    component_hash: 6dcb1be9f43ae940979bd628fa5bee278949b66c545e1fe2321e486102e81026
+    dependencies:
+    - name: idf
+      require: private
+      version: '>=5.2'
+    source:
+      registry_url: https://components.espressif.com
+      type: service
+    version: 1.0.0
+  espressif/libsodium:
+    component_hash: 6ee084dee7a4d664498274870aa65391c9ec9d38dcdb34d2ad2b8518726f8b5e
+    dependencies:
+    - name: idf
+      require: private
+      version: '>=4.2'
+    source:
+      registry_url: https://components.espressif.com/
+      type: service
+    version: 1.0.20~3
+  espressif/mdns:
+    component_hash: 29e47564b1a7ee778135e17fbbf2a2773f71c97ebabfe626c8eda7c958a7ad16
+    dependencies:
+    - name: idf
+      require: private
+      version: '>=5.0'
+    source:
+      registry_url: https://components.espressif.com/
+      type: service
+    version: 1.9.1
+  espressif/network_provisioning:
+    component_hash: ef2e10182fd1861e68b821491916327c25416ca7ae70e5a6e43313dbc71fe993
+    dependencies:
+    - name: idf
+      require: private
+      version: '>=5.1'
+    source:
+      registry_url: https://components.espressif.com/
+      type: service
+    version: 1.0.2
+  espressif/wifi_remote_over_eppp:
+    component_hash: ac4d13625cc9f88597cd612d2758580fac287d8ec731b606f2a0720d28cda6cd
+    dependencies:
+    - name: espressif/eppp_link
+      registry_url: https://components.espressif.com
+      require: private
+      version: '>=0.1'
+    - name: idf
+      require: private
+      version: '>=5.3'
+    source:
+      registry_url: https://components.espressif.com
+      type: service
+    version: 0.3.1
+  idf:
+    source:
+      type: idf
+    version: 5.5.2
+  joltwallet/littlefs:
+    component_hash: dcea25bcef2de023f089f5f01e8d8c46ad1b8ffef75861ad5ffb4098555839df
+    dependencies:
+    - name: idf
+      require: private
+      version: '>=5.0'
+    source:
+      registry_url: https://components.espressif.com/
+      type: service
+    version: 1.20.4
+direct_dependencies:
+- chmorgan/esp-libhelix-mp3
+- espressif/esp-dsp
+- espressif/esp-modbus
+- espressif/esp-sr
+- espressif/esp-tflite-micro
+- espressif/esp_hosted
+- espressif/esp_modem
+- espressif/esp_wifi_remote
+- espressif/lan867x
+- espressif/libsodium
+- espressif/mdns
+- espressif/network_provisioning
+- idf
+- joltwallet/littlefs
+manifest_hash: 16e91a50a02d62dfe8c6588e19e154d6282c788a5e05795047f0cf203347e290
+target: esp32p4
+version: 2.0.0
@@ -0,0 +1,8 @@
+# Name,   Type, SubType, Offset,  Size, Flags
+nvs,      data, nvs,       0x9000,   0x5000,
+otadata,  data, ota,       0xe000,   0x2000,
+app0,     app,  ota_0,    0x10000, 0x300000,
+app1,     app,  ota_1,   0x310000, 0x300000,
+spiffs,   data, spiffs,  0x610000, 0x700000,
+model,    data, spiffs,  0xD10000, 0x2E0000,
+coredump, data, coredump,0xFF0000,  0x10000,
@@ -0,0 +1 @@
+-march=rv32imafc_zicsr_zifencei_xesploop_xespv -mabi=ilp32f -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=unused-but-set-variable -Wno-error=deprecated-declarations -Wno-error=extra -Wno-unused-parameter -Wno-sign-compare -Wno-enum-conversion -gdwarf-4 -ggdb -nostartfiles -freorder-blocks -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -fno-jump-tables -fno-tree-switch-conversion -march=rv32imafc_zicsr_zifencei_xesppie 
@@ -0,0 +1 @@
+-march=rv32imafc_zicsr_zifencei_xesploop_xespv -mabi=ilp32f -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=unused-but-set-variable -Wno-error=deprecated-declarations -Wno-error=extra -Wno-unused-parameter -Wno-sign-compare -Wno-enum-conversion -gdwarf-4 -ggdb -nostartfiles -freorder-blocks -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -fno-jump-tables -fno-tree-switch-conversion -march=rv32imafc_zicsr_zifencei_xesppie -std=gnu17 -Wno-old-style-declaration 
@@ -0,0 +1 @@
+-march=rv32imafc_zicsr_zifencei_xesploop_xespv -mabi=ilp32f -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=unused-but-set-variable -Wno-error=deprecated-declarations -Wno-error=extra -Wno-unused-parameter -Wno-sign-compare -Wno-enum-conversion -gdwarf-4 -ggdb -nostartfiles -freorder-blocks -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -fno-jump-tables -fno-tree-switch-conversion -march=rv32imafc_zicsr_zifencei_xesppie -std=gnu++2b -fexceptions -fno-rtti -fuse-cxa-atexit -std=gnu++2a 
@@ -0,0 +1 @@
+-DESP32_ARDUINO_LIB_BUILDER -DESP_MDNS_VERSION_NUMBER=\"1.9.1\" -DESP_PLATFORM -DIDF_VER=\"v5.5.2-729-g87912cd291\" -DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DSOC_XTAL_FREQ_MHZ=CONFIG_XTAL_FREQ -DUNITY_INCLUDE_CONFIG_H -D_GLIBCXX_HAVE_POSIX_SEMAPHORE -D_GLIBCXX_USE_POSIX_SEMAPHORE -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -DTF_LITE_STATIC_MEMORY 
@@ -0,0 +1 @@
+-nostartfiles -march=rv32imafc_zicsr_zifencei_xesploop_xespv -mabi=ilp32f -Wl,--cref -Wl,--defsym=IDF_TARGET_ESP32P4=0 -Wl,--no-warn-rwx-segments -Wl,--orphan-handling=warn -fno-rtti -fno-lto -Wl,--gc-sections -Wl,--warn-common -Wl,--wrap=esp_log_write -Wl,--wrap=esp_log_writev -Wl,--enable-non-contiguous-regions -Wl,--whole-archive -Wl,--no-whole-archive -u nvs_sec_provider_include_impl -u _Z5setupv -u _Z4loopv -u __wrap_esp_log_write -u __wrap_esp_log_writev -u esp_app_desc -u esp_efuse_startup_include_func -u start_app -u start_app_other_cores -u __ubsan_include -u esp_system_include_startup_funcs -u __assert_func -u esp_security_init_include_impl -u esp_sleep_gpio_include -Wl,--undefined=FreeRTOS_openocd_params -u app_main -u esp_libc_include_heap_impl -u esp_libc_include_reent_syscalls_impl -u esp_libc_include_syscalls_impl -u esp_libc_include_pthread_impl -u esp_libc_include_assert_impl -u esp_libc_include_getentropy_impl -u esp_libc_include_init_funcs -u esp_libc_init_funcs -u pthread_include_pthread_impl -u pthread_include_pthread_cond_var_impl -u pthread_include_pthread_local_storage_impl -u pthread_include_pthread_rwlock_impl -u pthread_include_pthread_semaphore_impl -u __cxa_guard_dummy -u __cxx_init_dummy -u esp_timer_init_include_func -u uart_vfs_include_dev_init -u usb_serial_jtag_vfs_include_dev_init -u usb_serial_jtag_connection_monitor_include -u esp_vfs_include_console_register -u vfs_include_syscalls_impl -u esp_vfs_include_nullfs_register -u esp_system_include_coredump_init 
@@ -0,0 +1 @@
+-T rom.api.ld -T esp32p4.peripherals.ld -T esp32p4.rom.ld -T esp32p4.rom.api.ld -T esp32p4.rom.rvfp.ld -T esp32p4.rom.wdt.ld -T esp32p4.rom.systimer.ld -T esp32p4.rom.version.ld -T esp32p4.rom.libc.ld -T esp32p4.rom.libc-suboptimal_for_misaligned_mem.ld -T esp32p4.rom.newlib.ld -T memory.ld -T sections.ld 
@@ -0,0 +1,279 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef ESP_APP_TRACE_H_
+#define ESP_APP_TRACE_H_
+
+#include <stdarg.h>
+#include "esp_err.h"
+#include "esp_app_trace_util.h" // ESP_APPTRACE_TMO_INFINITE
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Application trace data destinations bits.
+ */
+typedef enum {
+    ESP_APPTRACE_DEST_JTAG = 1,                         ///< JTAG destination
+    ESP_APPTRACE_DEST_TRAX = ESP_APPTRACE_DEST_JTAG, 	///< xxx_TRAX name is obsolete, use more common xxx_JTAG
+    ESP_APPTRACE_DEST_UART,	                            ///< UART destination
+    ESP_APPTRACE_DEST_MAX = ESP_APPTRACE_DEST_UART+1,
+    ESP_APPTRACE_DEST_NUM
+} esp_apptrace_dest_t;
+
+/**
+ * @brief  Initializes application tracing module.
+ *
+ * @note   Should be called before any esp_apptrace_xxx call.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_init(void);
+
+/**
+ * @brief Configures down buffer.
+ *        @note Needs to be called before attempting to receive any data using esp_apptrace_down_buffer_get and esp_apptrace_read.
+ *              This function does not protect internal data by lock.
+ *
+ * @param buf Address of buffer to use for down channel (host to target) data.
+ * @param size Size of the buffer.
+ */
+void esp_apptrace_down_buffer_config(uint8_t *buf, uint32_t size);
+
+/**
+ * @brief Allocates buffer for trace data.
+ *        Once the data in the buffer is ready to be sent, esp_apptrace_buffer_put must be called to indicate it.
+ *
+ * @param dest Indicates HW interface to send data.
+ * @param size Size of data to write to trace buffer.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinitely.
+ *
+ * @return non-NULL on success, otherwise NULL.
+ */
+uint8_t *esp_apptrace_buffer_get(esp_apptrace_dest_t dest, uint32_t size, uint32_t tmo);
+
+/**
+ * @brief Indicates that the data in the buffer is ready to be sent.
+ *        This function is a counterpart of and must be preceded by esp_apptrace_buffer_get.
+ *
+ * @param dest Indicates HW interface to send data. Should be identical to the same parameter in call to esp_apptrace_buffer_get.
+ * @param ptr  Address of trace buffer to release. Should be the value returned by call to esp_apptrace_buffer_get.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinitely.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_buffer_put(esp_apptrace_dest_t dest, uint8_t *ptr, uint32_t tmo);
+
+/**
+ * @brief  Writes data to trace buffer.
+ *
+ * @param dest Indicates HW interface to send data.
+ * @param data Address of data to write to trace buffer.
+ * @param size Size of data to write to trace buffer.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinitely.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_write(esp_apptrace_dest_t dest, const void *data, uint32_t size, uint32_t tmo);
+
+/**
+ * @brief vprintf-like function to send log messages to host via specified HW interface.
+ *
+ * @param dest Indicates HW interface to send data.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinitely.
+ * @param fmt  Address of format string.
+ * @param ap   List of arguments.
+ *
+ * @return Number of bytes written.
+ */
+int esp_apptrace_vprintf_to(esp_apptrace_dest_t dest, uint32_t tmo, const char *fmt, va_list ap);
+
+/**
+ * @brief vprintf-like function to send log messages to host.
+ *
+ * @param fmt  Address of format string.
+ * @param ap   List of arguments.
+ *
+ * @return Number of bytes written.
+ */
+int esp_apptrace_vprintf(const char *fmt, va_list ap);
+
+/**
+ * @brief Flushes remaining data in trace buffer to host.
+ *
+ * @param dest Indicates HW interface to flush data on.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinitely.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_flush(esp_apptrace_dest_t dest, uint32_t tmo);
+
+/**
+ * @brief Flushes remaining data in trace buffer to host without locking internal data.
+ *        This is a special version of esp_apptrace_flush which should be called from panic handler.
+ *
+ * @param dest   Indicates HW interface to flush data on.
+ * @param min_sz Threshold for flushing data. If current filling level is above this value, data will be flushed. TRAX destinations only.
+ * @param tmo    Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinitely.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_flush_nolock(esp_apptrace_dest_t dest, uint32_t min_sz, uint32_t tmo);
+
+/**
+ * @brief Reads host data from trace buffer.
+ *
+ * @param dest Indicates HW interface to read the data on.
+ * @param data Address of buffer to put data from trace buffer.
+ * @param size Pointer to store size of read data. Before call to this function pointed memory must hold requested size of data
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinitely.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_read(esp_apptrace_dest_t dest, void *data, uint32_t *size, uint32_t tmo);
+
+/**
+ * @brief Retrieves incoming data buffer if any.
+ *        Once data in the buffer is processed, esp_apptrace_down_buffer_put must be called to indicate it.
+ *
+ * @param dest Indicates HW interface to receive data.
+ * @param size Address to store size of available data in down buffer. Must be initialized with requested value.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinitely.
+ *
+ * @return non-NULL on success, otherwise NULL.
+ */
+uint8_t *esp_apptrace_down_buffer_get(esp_apptrace_dest_t dest, uint32_t *size, uint32_t tmo);
+
+/**
+ * @brief Indicates that the data in the down buffer is processed.
+ *        This function is a counterpart of and must be preceded by esp_apptrace_down_buffer_get.
+ *
+ * @param dest Indicates HW interface to receive data. Should be identical to the same parameter in call to esp_apptrace_down_buffer_get.
+ * @param ptr  Address of trace buffer to release. Should be the value returned by call to esp_apptrace_down_buffer_get.
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinitely.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+esp_err_t esp_apptrace_down_buffer_put(esp_apptrace_dest_t dest, uint8_t *ptr, uint32_t tmo);
+
+/**
+ * @brief Checks whether host is connected.
+ *
+ * @param dest Indicates HW interface to use.
+ *
+ * @return true if host is connected, otherwise false
+ */
+bool esp_apptrace_host_is_connected(esp_apptrace_dest_t dest);
+
+/**
+ * @brief Opens file on host.
+ *		  This function has the same semantic as 'fopen' except for the first argument.
+ *
+ * @param dest Indicates HW interface to use.
+ * @param path Path to file.
+ * @param mode Mode string. See fopen for details.
+ *
+ * @return non zero file handle on success, otherwise 0
+ */
+void *esp_apptrace_fopen(esp_apptrace_dest_t dest, const char *path, const char *mode);
+
+/**
+ * @brief Closes file on host.
+ *		  This function has the same semantic as 'fclose' except for the first argument.
+ *
+ * @param dest   Indicates HW interface to use.
+ * @param stream File handle returned by esp_apptrace_fopen.
+ *
+ * @return Zero on success, otherwise non-zero. See fclose for details.
+ */
+int esp_apptrace_fclose(esp_apptrace_dest_t dest, void *stream);
+
+/**
+ * @brief Writes to file on host.
+ *		  This function has the same semantic as 'fwrite' except for the first argument.
+ *
+ * @param dest   Indicates HW interface to use.
+ * @param ptr 	 Address of data to write.
+ * @param size 	 Size of an item.
+ * @param nmemb  Number of items to write.
+ * @param stream File handle returned by esp_apptrace_fopen.
+ *
+ * @return Number of written items. See fwrite for details.
+ */
+size_t esp_apptrace_fwrite(esp_apptrace_dest_t dest, const void *ptr, size_t size, size_t nmemb, void *stream);
+
+/**
+ * @brief Read file on host.
+ *		  This function has the same semantic as 'fread' except for the first argument.
+ *
+ * @param dest   Indicates HW interface to use.
+ * @param ptr 	 Address to store read data.
+ * @param size 	 Size of an item.
+ * @param nmemb  Number of items to read.
+ * @param stream File handle returned by esp_apptrace_fopen.
+ *
+ * @return Number of read items. See fread for details.
+ */
+size_t esp_apptrace_fread(esp_apptrace_dest_t dest, void *ptr, size_t size, size_t nmemb, void *stream);
+
+/**
+ * @brief Set position indicator in file on host.
+ *		  This function has the same semantic as 'fseek' except for the first argument.
+ *
+ * @param dest   Indicates HW interface to use.
+ * @param stream File handle returned by esp_apptrace_fopen.
+ * @param offset Offset. See fseek for details.
+ * @param whence Position in file. See fseek for details.
+ *
+ * @return Zero on success, otherwise non-zero. See fseek for details.
+ */
+int esp_apptrace_fseek(esp_apptrace_dest_t dest, void *stream, long offset, int whence);
+
+/**
+ * @brief Get current position indicator for file on host.
+ *		  This function has the same semantic as 'ftell' except for the first argument.
+ *
+ * @param dest   Indicates HW interface to use.
+ * @param stream File handle returned by esp_apptrace_fopen.
+ *
+ * @return Current position in file. See ftell for details.
+ */
+int esp_apptrace_ftell(esp_apptrace_dest_t dest, void *stream);
+
+/**
+ * @brief Indicates to the host that all file operations are complete.
+ *		  This function should be called after all file operations are finished and
+ *		  indicate to the host that it can perform cleanup operations (close open files etc.).
+ *
+ * @param dest   Indicates HW interface to use.
+ *
+ * @return ESP_OK on success, otherwise see esp_err_t
+ */
+int esp_apptrace_fstop(esp_apptrace_dest_t dest);
+
+/**
+ * @brief Test end-of-file indicator on a stream.
+ *		  This function has the same semantic as 'feof' except for the first argument.
+ *
+ * @param dest   Indicates HW interface to use.
+ * @param stream File handle returned by esp_apptrace_fopen.
+ *
+ * @return Non-Zero if end-of-file indicator is set for stream. See feof for details.
+ */
+int esp_apptrace_feof(esp_apptrace_dest_t dest, void *stream);
+
+/**
+ * @brief Triggers gcov info dump.
+ *		  This function waits for the host to connect to target before dumping data.
+ */
+void esp_gcov_dump(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,192 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef ESP_APP_TRACE_UTIL_H_
+#define ESP_APP_TRACE_UTIL_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "freertos/FreeRTOS.h"
+#include "esp_err.h"
+#include "esp_timer.h"
+
+/** Infinite waiting timeout */
+#define ESP_APPTRACE_TMO_INFINITE               ((uint32_t)-1)
+
+/** Structure which holds data necessary for measuring time intervals.
+ *
+ *  After initialization via esp_apptrace_tmo_init() user needs to call esp_apptrace_tmo_check()
+ *  periodically to check timeout for expiration.
+ */
+typedef struct {
+    int64_t   start;   ///< time interval start (in us)
+    int64_t   tmo;     ///< timeout value (in us)
+    int64_t   elapsed; ///< elapsed time (in us)
+} esp_apptrace_tmo_t;
+
+/**
+ * @brief Initializes timeout structure.
+ *
+ * @param tmo       Pointer to timeout structure to be initialized.
+ * @param user_tmo  Timeout value (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinetly.
+*/
+static inline void esp_apptrace_tmo_init(esp_apptrace_tmo_t *tmo, uint32_t user_tmo)
+{
+    tmo->start = esp_timer_get_time();
+    tmo->tmo = user_tmo == ESP_APPTRACE_TMO_INFINITE ? (int64_t)-1 : (int64_t)user_tmo;
+    tmo->elapsed = 0;
+}
+
+/**
+ * @brief Checks timeout for expiration.
+ *
+ * @param tmo Pointer to timeout structure.
+ *
+ * @return number of remaining us till tmo.
+ */
+esp_err_t esp_apptrace_tmo_check(esp_apptrace_tmo_t *tmo);
+
+static inline uint32_t esp_apptrace_tmo_remaining_us(esp_apptrace_tmo_t *tmo)
+{
+    return tmo->tmo != (int64_t)-1 ? (tmo->elapsed - tmo->tmo) : ESP_APPTRACE_TMO_INFINITE;
+}
+
+/** Tracing module synchronization lock */
+typedef struct {
+    spinlock_t mux;
+    unsigned int_state;
+} esp_apptrace_lock_t;
+
+/**
+ * @brief Initializes lock structure.
+ *
+ * @param lock Pointer to lock structure to be initialized.
+ */
+static inline void esp_apptrace_lock_init(esp_apptrace_lock_t *lock)
+{
+    portMUX_INITIALIZE(&lock->mux);
+    lock->int_state = 0;
+}
+
+/**
+ * @brief Tries to acquire lock in specified time period.
+ *
+ * @param lock Pointer to lock structure.
+ * @param tmo  Pointer to timeout struct.
+ *
+ * @return ESP_OK on success, otherwise \see esp_err_t
+ */
+esp_err_t esp_apptrace_lock_take(esp_apptrace_lock_t *lock, esp_apptrace_tmo_t *tmo);
+
+/**
+ * @brief Releases lock.
+ *
+ * @param lock Pointer to lock structure.
+ *
+ * @return ESP_OK on success, otherwise \see esp_err_t
+ */
+esp_err_t esp_apptrace_lock_give(esp_apptrace_lock_t *lock);
+
+/** Ring buffer control structure.
+ *
+ * @note For purposes of application tracing module if there is no enough space for user data and write pointer can be wrapped
+ *       current ring buffer size can be temporarily shrinked in order to provide buffer with requested size.
+ */
+typedef struct {
+    uint8_t *data;      ///< pointer to data storage
+    volatile uint32_t size;      ///< size of data storage
+    volatile uint32_t cur_size;  ///< current size of data storage
+    volatile uint32_t rd;        ///< read pointer
+    volatile uint32_t wr;        ///< write pointer
+} esp_apptrace_rb_t;
+
+/**
+ * @brief Initializes ring buffer control  structure.
+ *
+ * @param rb   Pointer to ring buffer structure to be initialized.
+ * @param data Pointer to buffer to be used as ring buffer's data storage.
+ * @param size Size of buffer to be used as ring buffer's data storage.
+ */
+static inline void esp_apptrace_rb_init(esp_apptrace_rb_t *rb, uint8_t *data, uint32_t size)
+{
+    rb->data = data;
+    rb->size = rb->cur_size = size;
+    rb->rd = 0;
+    rb->wr = 0;
+}
+
+/**
+ * @brief Allocates memory chunk in ring buffer.
+ *
+ * @param rb   Pointer to ring buffer structure.
+ * @param size Size of the memory to allocate.
+ *
+ * @return Pointer to the allocated memory or NULL in case of failure.
+ */
+uint8_t *esp_apptrace_rb_produce(esp_apptrace_rb_t *rb, uint32_t size);
+
+/**
+ * @brief Consumes memory chunk in ring buffer.
+ *
+ * @param rb   Pointer to ring buffer structure.
+ * @param size Size of the memory to consume.
+ *
+ * @return Pointer to consumed memory chunk or NULL in case of failure.
+ */
+uint8_t *esp_apptrace_rb_consume(esp_apptrace_rb_t *rb, uint32_t size);
+
+/**
+ * @brief Gets size of memory which can consumed with single call to esp_apptrace_rb_consume().
+ *
+ * @param rb Pointer to ring buffer structure.
+ *
+ * @return Size of memory which can consumed.
+ *
+ * @note Due to read pointer wrapping returned size can be less then the total size of available data.
+ */
+uint32_t esp_apptrace_rb_read_size_get(esp_apptrace_rb_t *rb);
+
+/**
+ * @brief Gets size of memory which can produced with single call to esp_apptrace_rb_produce().
+ *
+ * @param rb Pointer to ring buffer structure.
+ *
+ * @return Size of memory which can produced.
+ *
+ * @note Due to write pointer wrapping returned size can be less then the total size of available data.
+ */
+uint32_t esp_apptrace_rb_write_size_get(esp_apptrace_rb_t *rb);
+
+int esp_apptrace_log_lock(void);
+void esp_apptrace_log_unlock(void);
+
+#define ESP_APPTRACE_LOG( format, ... )   \
+    do { \
+        esp_apptrace_log_lock(); \
+        esp_rom_printf(format, ##__VA_ARGS__); \
+        esp_apptrace_log_unlock(); \
+    } while(0)
+
+#define ESP_APPTRACE_LOG_LEV( _L_, level, format, ... )   \
+    do { \
+        if (LOG_LOCAL_LEVEL >= level) { \
+            ESP_APPTRACE_LOG(LOG_FORMAT(_L_, format), esp_log_early_timestamp(), TAG, ##__VA_ARGS__); \
+        } \
+    } while(0)
+
+#define ESP_APPTRACE_LOGE( format, ... )  ESP_APPTRACE_LOG_LEV(E, ESP_LOG_ERROR, format, ##__VA_ARGS__)
+#define ESP_APPTRACE_LOGW( format, ... )  ESP_APPTRACE_LOG_LEV(W, ESP_LOG_WARN, format, ##__VA_ARGS__)
+#define ESP_APPTRACE_LOGI( format, ... )  ESP_APPTRACE_LOG_LEV(I, ESP_LOG_INFO, format, ##__VA_ARGS__)
+#define ESP_APPTRACE_LOGD( format, ... )  ESP_APPTRACE_LOG_LEV(D, ESP_LOG_DEBUG, format, ##__VA_ARGS__)
+#define ESP_APPTRACE_LOGV( format, ... )  ESP_APPTRACE_LOG_LEV(V, ESP_LOG_VERBOSE, format, ##__VA_ARGS__)
+#define ESP_APPTRACE_LOGO( format, ... )  ESP_APPTRACE_LOG_LEV(E, ESP_LOG_NONE, format, ##__VA_ARGS__)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //ESP_APP_TRACE_UTIL_H_
@@ -0,0 +1,80 @@
+/*
+ * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef ESP_SYSVIEW_TRACE_H_
+#define ESP_SYSVIEW_TRACE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdarg.h>
+#include "esp_err.h"
+#include "SEGGER_RTT.h" // SEGGER_RTT_ESP_Flush
+#include "esp_app_trace_util.h" // ESP_APPTRACE_TMO_INFINITE
+
+/**
+ * @brief Flushes remaining data in SystemView trace buffer to host.
+ *
+ * @param tmo  Timeout for operation (in us). Use ESP_APPTRACE_TMO_INFINITE to wait indefinetly.
+ *
+ * @return ESP_OK.
+ */
+static inline esp_err_t esp_sysview_flush(uint32_t tmo)
+{
+    SEGGER_RTT_ESP_Flush(0, tmo);
+    return ESP_OK;
+}
+
+/**
+ * @brief vprintf-like function to sent log messages to the host.
+ *
+ * @param format  Address of format string.
+ * @param args    List of arguments.
+ *
+ * @return Number of bytes written.
+ */
+int esp_sysview_vprintf(const char * format, va_list args);
+
+/**
+ * @brief  Starts SystemView heap tracing.
+ *
+ * @param tmo Timeout (in us) to wait for the host to be connected. Use -1 to wait forever.
+ *
+ * @return ESP_OK on success, ESP_ERR_TIMEOUT if operation has been timed out.
+ */
+esp_err_t esp_sysview_heap_trace_start(uint32_t tmo);
+
+/**
+ * @brief  Stops SystemView heap tracing.
+ *
+ * @return ESP_OK.
+ */
+esp_err_t esp_sysview_heap_trace_stop(void);
+
+/**
+ * @brief Sends heap allocation event to the host.
+ *
+ * @param addr      Address of allocated block.
+ * @param size      Size of allocated block.
+ * @param callers   Pointer to array with callstack addresses.
+ *                  Array size must be CONFIG_HEAP_TRACING_STACK_DEPTH.
+ */
+void esp_sysview_heap_trace_alloc(void *addr, uint32_t size, const void *callers);
+
+/**
+ * @brief Sends heap de-allocation event to the host.
+ *
+ * @param addr      Address of de-allocated block.
+ * @param callers   Pointer to array with callstack addresses.
+ *                  Array size must be CONFIG_HEAP_TRACING_STACK_DEPTH.
+ */
+void esp_sysview_heap_trace_free(void *addr, const void *callers);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //ESP_SYSVIEW_TRACE_H_
@@ -0,0 +1,459 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _OTA_OPS_H
+#define _OTA_OPS_H
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
+#include "esp_err.h"
+#include "esp_partition.h"
+#include "esp_app_desc.h"
+#include "esp_bootloader_desc.h"
+#include "esp_flash_partitions.h"
+#include "soc/soc_caps.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define OTA_SIZE_UNKNOWN 0xffffffff /*!< Used for esp_ota_begin() if new image size is unknown */
+#define OTA_WITH_SEQUENTIAL_WRITES 0xfffffffe /*!< Used for esp_ota_begin() if new image size is unknown and erase can be done in incremental manner (assuming write operation is in continuous sequence) */
+
+#define ESP_ERR_OTA_BASE                         0x1500                     /*!< Base error code for ota_ops api */
+#define ESP_ERR_OTA_PARTITION_CONFLICT           (ESP_ERR_OTA_BASE + 0x01)  /*!< Error if request was to write or erase the current running partition */
+#define ESP_ERR_OTA_SELECT_INFO_INVALID          (ESP_ERR_OTA_BASE + 0x02)  /*!< Error if OTA data partition contains invalid content */
+#define ESP_ERR_OTA_VALIDATE_FAILED              (ESP_ERR_OTA_BASE + 0x03)  /*!< Error if OTA app image is invalid */
+#define ESP_ERR_OTA_SMALL_SEC_VER                (ESP_ERR_OTA_BASE + 0x04)  /*!< Error if the firmware has a secure version less than the running firmware. */
+#define ESP_ERR_OTA_ROLLBACK_FAILED              (ESP_ERR_OTA_BASE + 0x05)  /*!< Error if flash does not have valid firmware in passive partition and hence rollback is not possible */
+#define ESP_ERR_OTA_ROLLBACK_INVALID_STATE       (ESP_ERR_OTA_BASE + 0x06)  /*!< Error if current active firmware is still marked in pending validation state (ESP_OTA_IMG_PENDING_VERIFY), essentially first boot of firmware image post upgrade and hence firmware upgrade is not possible */
+
+
+/**
+ * @brief Opaque handle for an application OTA update
+ *
+ * esp_ota_begin() returns a handle which is then used for subsequent
+ * calls to esp_ota_write() and esp_ota_end().
+ */
+typedef uint32_t esp_ota_handle_t;
+
+/**
+ * @brief   Return esp_app_desc structure. This structure includes app version.
+ *
+ * @note This API is present for backward compatibility reasons. Alternative function
+ * with the same functionality is `esp_app_get_description`
+ *
+ * Return description for running app.
+ * @return Pointer to esp_app_desc structure.
+ */
+const esp_app_desc_t *esp_ota_get_app_description(void) __attribute__((deprecated("Please use esp_app_get_description instead")));
+
+/**
+ * @brief   Fill the provided buffer with SHA256 of the ELF file, formatted as hexadecimal, null-terminated.
+ * If the buffer size is not sufficient to fit the entire SHA256 in hex plus a null terminator,
+ * the largest possible number of bytes will be written followed by a null.
+ *
+* @note This API is present for backward compatibility reasons. Alternative function
+ * with the same functionality is `esp_app_get_elf_sha256`
+ *
+ * @param dst   Destination buffer
+ * @param size  Size of the buffer
+ * @return      Number of bytes written to dst (including null terminator)
+ */
+int esp_ota_get_app_elf_sha256(char* dst, size_t size) __attribute__((deprecated("Please use esp_app_get_elf_sha256 instead")));
+
+/**
+ * @brief   Commence an OTA update writing to the specified partition.
+
+ * The specified partition is erased to the specified image size.
+ *
+ * If image size is not yet known, pass OTA_SIZE_UNKNOWN which will
+ * cause the entire partition to be erased.
+ *
+ * On success, this function allocates memory that remains in use
+ * until esp_ota_end() is called with the returned handle.
+ *
+ * Note: If the rollback option is enabled and the running application has the ESP_OTA_IMG_PENDING_VERIFY state then
+ * it will lead to the ESP_ERR_OTA_ROLLBACK_INVALID_STATE error. Confirm the running app before to run download a new app,
+ * use esp_ota_mark_app_valid_cancel_rollback() function for it (this should be done as early as possible when you first download a new application).
+ *
+ * Note: Rollback is applicable only for app type partitions.
+ * Note: For Rollback - The OTA data slot corresponding to the last boot application partition will be invalidated.
+ *
+ * @param partition  Pointer to info for partition which will receive the OTA update. Required.
+ *                   This is considered as the staging partition (where OTA is downloaded), be default this also considered as the final partition which supposed to be updated.
+ *                   The final partition can be overwritten using esp_ota_set_final_partition() after calling esp_ota_begin() to relocate contents to the final destination partition.
+ * @param image_size Size of new OTA app image. Partition will be erased in order to receive this size of image. If 0 or OTA_SIZE_UNKNOWN, the entire partition is erased.
+ * @param out_handle On success, returns a handle which should be used for subsequent esp_ota_write() and esp_ota_end() calls.
+
+ * @return
+ *    - ESP_OK: OTA operation commenced successfully.
+ *    - ESP_ERR_INVALID_ARG: partition or out_handle arguments were NULL, or partition doesn't point to an OTA app partition.
+ *    - ESP_ERR_NO_MEM: Cannot allocate memory for OTA operation.
+ *    - ESP_ERR_OTA_PARTITION_CONFLICT: Partition holds the currently running firmware, cannot update in place.
+ *    - ESP_ERR_NOT_FOUND: Partition argument not found in partition table.
+ *    - ESP_ERR_OTA_SELECT_INFO_INVALID: The OTA data partition contains invalid data.
+ *    - ESP_ERR_INVALID_SIZE: Partition doesn't fit in configured flash size.
+ *    - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed.
+ *    - ESP_ERR_OTA_ROLLBACK_INVALID_STATE: If the running app has not confirmed state. Before performing an update, the application must be valid.
+ */
+esp_err_t esp_ota_begin(const esp_partition_t* partition, size_t image_size, esp_ota_handle_t* out_handle);
+
+/**
+ * @brief   Resume an interrupted OTA update by continuing to write to the specified partition.
+ *
+ * This function is used when an OTA update was previously started and needs to be resumed after an interruption.
+ * It continues the OTA process from the specified offset within the partition.
+ *
+ * Unlike esp_ota_begin(), this function does not erase the partition which receives the OTA update, but rather expects that part of the image
+ * has already been written correctly, and it resumes writing from the given offset.
+ *
+ * @param partition Pointer to info for the partition which is receiving the OTA update. Required.
+ * @param erase_size Specifies how much flash memory to erase before resuming OTA, depending on whether a sequential write or a bulk erase is being used.
+ * @param image_offset Offset from where to resume the OTA process. Should be set to the number of bytes already written.
+ * @param out_handle On success, returns a handle that should be used for subsequent esp_ota_write() and esp_ota_end() calls.
+ *
+ * @return
+ *    - ESP_OK: OTA operation resumed successfully.
+ *    - ESP_ERR_INVALID_ARG: partition, out_handle were NULL or image_offset arguments is negative, or partition doesn't point to an OTA app partition.
+ *    - ESP_ERR_NO_MEM: Cannot allocate memory for OTA operation.
+ *    - ESP_ERR_OTA_PARTITION_CONFLICT: Partition holds the currently running firmware, cannot update in place.
+ *    - ESP_ERR_NOT_FOUND: Partition argument not found in partition table.
+ *    - ESP_ERR_OTA_SELECT_INFO_INVALID: The OTA data partition contains invalid data.
+ *    - ESP_ERR_INVALID_SIZE: Partition doesn't fit in configured flash size.
+ *    - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed.
+ */
+esp_err_t esp_ota_resume(const esp_partition_t *partition, const size_t erase_size, const size_t image_offset, esp_ota_handle_t *out_handle);
+
+/**
+ * @brief Set the final destination partition for OTA update
+ *
+ * This function configures the specified final partition as the destination for the OTA update.
+ * It also allows setting a flag to indicate if the image should be copied from the staging
+ * partition to the final partition after the OTA update completes. Otherwise, copying will need
+ * to be handled by custom code using esp_partition_copy().
+ *
+ * @note This can be called after esp_ota_begin() and before the OTA update has started (before esp_ota_write()).
+ *
+ * @param handle OTA update handle obtained from esp_ota_begin().
+ * @param final Pointer to the final destination partition where the new image will be verified and potentially finalized.
+ *              This partition must not be NULL.
+ * @param finalize_with_copy Boolean flag indicating if the downloaded image should be copied
+ *                           from the staging partition to the final partition upon completion.
+ *                           Set to False if you intend to perform the final copy process manually later.
+ *
+ * @return
+ *      - ESP_OK: final destination partition set successfully.
+ *      - ESP_ERR_INVALID_STATE: Once the OTA update has started, changing the final destination partition is prohibited.
+ *      - ESP_ERR_INVALID_ARG: Invalid arguments were passed (e.g., final partition is NULL).
+ *      - ESP_ERR_NOT_FOUND: OTA handle not found or final partition verification failed.
+ */
+esp_err_t esp_ota_set_final_partition(esp_ota_handle_t handle, const esp_partition_t *final, bool finalize_with_copy);
+
+/**
+ * @brief   Write OTA update data to partition
+ *
+ * This function can be called multiple times as
+ * data is received during the OTA operation. Data is written
+ * sequentially to the partition.
+ *
+ * @param handle  Handle obtained from esp_ota_begin
+ * @param data    Data buffer to write
+ * @param size    Size of data buffer in bytes.
+ *
+ * @return
+ *    - ESP_OK: Data was written to flash successfully, or size = 0
+ *    - ESP_ERR_INVALID_ARG: handle is invalid.
+ *    - ESP_ERR_OTA_VALIDATE_FAILED: First byte of image contains invalid image magic byte.
+ *    - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed.
+ *    - ESP_ERR_INVALID_SIZE: if write would go out of bounds of the partition
+ *    - or one of error codes from lower-level flash driver.
+ */
+esp_err_t esp_ota_write(esp_ota_handle_t handle, const void* data, size_t size);
+
+/**
+ * @brief   Write OTA update data to partition at an offset
+ *
+ * This function can write data in non-contiguous manner.
+ * If flash encryption is enabled, data should be 16 bytes aligned.
+ *
+ * @param handle  Handle obtained from esp_ota_begin
+ * @param data    Data buffer to write
+ * @param size    Size of data buffer in bytes
+ * @param offset  Offset in flash partition
+ *
+ * @note While performing OTA, if the packets arrive out of order, esp_ota_write_with_offset() can be used to write data in non-contiguous manner.
+ *       Use of esp_ota_write_with_offset() in combination with esp_ota_write() is not recommended.
+ *
+ * @return
+ *    - ESP_OK: Data was written to flash successfully.
+ *    - ESP_ERR_INVALID_ARG: handle is invalid.
+ *    - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed.
+ */
+esp_err_t esp_ota_write_with_offset(esp_ota_handle_t handle, const void *data, size_t size, uint32_t offset);
+
+/**
+ * @brief Finish OTA update and validate newly written app image.
+ *
+ * @param handle  Handle obtained from esp_ota_begin().
+ *
+ * @note After calling esp_ota_end(), the handle is no longer valid and any memory associated with it is freed (regardless of result).
+ * @note If either the final or staging partitions were for the bootloader, then at the end of this function,
+ *       the bootloader is reset to its default offset: esp_image_bootloader_offset_set(ESP_PRIMARY_BOOTLOADER_OFFSET)
+ *
+ * If the finalize_with_copy option is set, the staging partition will be copied to the final partition at the end of this function.
+ * Otherwise, copying will need to be handled by custom code using esp_partition_copy().
+ *
+ * @return
+ *    - ESP_OK: Newly written OTA app image is valid.
+ *    - ESP_ERR_NOT_FOUND: OTA handle was not found.
+ *    - ESP_ERR_INVALID_ARG: Handle was never written to.
+ *    - ESP_ERR_OTA_VALIDATE_FAILED: OTA image is invalid (either not a valid app image, or - if secure boot is enabled - signature failed to verify.)
+ *    - ESP_ERR_INVALID_STATE: If flash encryption is enabled, this result indicates an internal error writing the final encrypted bytes to flash.
+ */
+esp_err_t esp_ota_end(esp_ota_handle_t handle);
+
+/**
+ * @brief Abort OTA update, free the handle and memory associated with it.
+ *
+ * @param handle obtained from esp_ota_begin().
+ *
+ * @return
+ *    - ESP_OK: Handle and its associated memory is freed successfully.
+ *    - ESP_ERR_NOT_FOUND: OTA handle was not found.
+ */
+esp_err_t esp_ota_abort(esp_ota_handle_t handle);
+
+
+/**
+ * @brief Configure OTA data for a new boot partition
+ *
+ * @note If this function returns ESP_OK, calling esp_restart() will boot the newly configured app partition.
+ *
+ * @param partition Pointer to info for partition containing app image to boot.
+ *
+ * @return
+ *    - ESP_OK: OTA data updated, next reboot will use specified partition.
+ *    - ESP_ERR_INVALID_ARG: partition argument was NULL or didn't point to a valid OTA partition of type "app".
+ *    - ESP_ERR_OTA_VALIDATE_FAILED: Partition contained invalid app image. Also returned if secure boot is enabled and signature validation failed.
+ *    - ESP_ERR_NOT_FOUND: OTA data partition not found.
+ *    - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash erase or write failed.
+ */
+esp_err_t esp_ota_set_boot_partition(const esp_partition_t* partition);
+
+/**
+ * @brief Get partition info of currently configured boot app
+ *
+ * If esp_ota_set_boot_partition() has been called, the partition which was set by that function will be returned.
+ *
+ * If esp_ota_set_boot_partition() has not been called, the result is usually the same as esp_ota_get_running_partition().
+ * The two results are not equal if the configured boot partition does not contain a valid app (meaning that the running partition
+ * will be an app that the bootloader chose via fallback).
+ *
+ * If the OTA data partition is not present or not valid then the result is the first app partition found in the
+ * partition table. In priority order, this means: the factory app, the first OTA app slot, or the test app partition.
+ *
+ * Note that there is no guarantee the returned partition is a valid app. Use esp_image_verify(ESP_IMAGE_VERIFY, ...) to verify if the
+ * returned partition contains a bootable image.
+ *
+ * @return Pointer to info for partition structure, or NULL if partition table is invalid or a flash read operation failed. Any returned pointer is valid for the lifetime of the application.
+ */
+const esp_partition_t* esp_ota_get_boot_partition(void);
+
+
+/**
+ * @brief Get partition info of currently running app
+ *
+ * This function is different to esp_ota_get_boot_partition() in that
+ * it ignores any change of selected boot partition caused by
+ * esp_ota_set_boot_partition(). Only the app whose code is currently
+ * running will have its partition information returned.
+ *
+ * The partition returned by this function may also differ from esp_ota_get_boot_partition() if the configured boot
+ * partition is somehow invalid, and the bootloader fell back to a different app partition at boot.
+ *
+ * @return Pointer to info for partition structure, or NULL if no partition is found or flash read operation failed. Returned pointer is valid for the lifetime of the application.
+ */
+const esp_partition_t* esp_ota_get_running_partition(void);
+
+
+/**
+ * @brief Return the next OTA app partition which should be written with a new firmware.
+ *
+ * Call this function to find an OTA app partition which can be passed to esp_ota_begin().
+ *
+ * Finds next partition round-robin, starting from the current running partition.
+ *
+ * @param start_from If set, treat this partition info as describing the current running partition. Can be NULL, in which case esp_ota_get_running_partition() is used to find the currently running partition. The result of this function is never the same as this argument.
+ *
+ * @return Pointer to info for partition which should be updated next. NULL result indicates invalid OTA data partition, or that no eligible OTA app slot partition was found.
+ *
+ */
+const esp_partition_t* esp_ota_get_next_update_partition(const esp_partition_t *start_from);
+
+/**
+ * @brief Returns esp_app_desc structure for app partition. This structure includes app version.
+ *
+ * Returns a description for the requested app partition.
+ * @param[in] partition     Pointer to app partition. (only app partition)
+ * @param[out] app_desc     Structure of info about app.
+ * @return
+ *  - ESP_OK                Successful.
+ *  - ESP_ERR_NOT_FOUND     app_desc structure is not found. Magic word is incorrect.
+ *  - ESP_ERR_NOT_SUPPORTED Partition is not application.
+ *  - ESP_ERR_INVALID_ARG   Arguments is NULL or if partition's offset exceeds partition size.
+ *  - ESP_ERR_INVALID_SIZE  Read would go out of bounds of the partition.
+ *  - or one of error codes from lower-level flash driver.
+ */
+esp_err_t esp_ota_get_partition_description(const esp_partition_t *partition, esp_app_desc_t *app_desc);
+
+/**
+ * @brief Returns the description structure of the bootloader.
+ *
+ * @param[in] bootloader_partition Pointer to bootloader partition.
+ *                                 If NULL, then the PRIMARY bootloader is used (the default location).
+ *                                 offset = CONFIG_BOOTLOADER_OFFSET_IN_FLASH,
+ *                                 size = CONFIG_PARTITION_TABLE_OFFSET - CONFIG_BOOTLOADER_OFFSET_IN_FLASH,
+ * @param[out] desc     Structure of info about bootloader.
+ * @return
+ *  - ESP_OK                Successful.
+ *  - ESP_ERR_NOT_FOUND     Description structure is not found in the bootloader image. Magic byte is incorrect.
+ *  - ESP_ERR_INVALID_ARG   Arguments is NULL.
+ *  - ESP_ERR_INVALID_SIZE  Read would go out of bounds of the partition.
+ *  - or one of error codes from lower-level flash driver.
+ */
+esp_err_t esp_ota_get_bootloader_description(const esp_partition_t *bootloader_partition, esp_bootloader_desc_t *desc);
+
+/**
+ * @brief Invalidate the OTA data slot associated with the last boot application partition.
+ *
+ * This function erases the OTA data slot corresponding to the last boot application partition,
+ * making the partition invalid for booting in future. The application partition itself
+ * is not erased, preserving its contents.
+ *
+ * @return
+ *      - ESP_OK: Successfully invalidated the OTA data slot.
+ *      - ESP_FAIL: Failed to invalidate the OTA data slot (e.g., invalid parameters, no OTA data partition, or other errors).
+ *      - Other error codes from `esp_partition_erase_range`.
+ */
+esp_err_t esp_ota_invalidate_inactive_ota_data_slot(void);
+
+/**
+ * @brief Returns number of ota partitions provided in partition table.
+ *
+ * @return
+ *  - Number of OTA partitions
+ */
+uint8_t esp_ota_get_app_partition_count(void);
+
+/**
+ * @brief This function is called to indicate that the running app is working well.
+ *
+ * @return
+ *  - ESP_OK: if successful.
+ */
+esp_err_t esp_ota_mark_app_valid_cancel_rollback(void);
+
+/**
+ * @brief This function is called to roll back to the previously workable app without reboot.
+ *
+ * Checks applications on a flash drive that can be booted in case of rollback.
+ * If the flash does not have at least one app (except the running app) then rollback is not possible.
+ * @return
+ *  - ESP_OK: if successful.
+ *  - ESP_FAIL: if not successful.
+ *  - ESP_ERR_OTA_ROLLBACK_FAILED: The rollback is not possible because the available OTA partitions
+ *    on the flash do not contain a valid application.
+ */
+esp_err_t esp_ota_mark_app_invalid_rollback(void);
+
+/**
+ * @brief This function is called to roll back to the previously workable app with reboot.
+ *
+ * Equivalent to calling esp_ota_mark_app_invalid_rollback(), and, if successful, followed by esp_restart().
+ *
+ * @return
+ *  - ESP_FAIL: if not successful.
+ *  - ESP_ERR_OTA_ROLLBACK_FAILED: The rollback is not possible due to flash does not have any apps.
+ */
+esp_err_t esp_ota_mark_app_invalid_rollback_and_reboot(void);
+
+/**
+ * @brief Returns last partition with invalid state (ESP_OTA_IMG_INVALID or ESP_OTA_IMG_ABORTED).
+ *
+ * @return partition.
+ */
+const esp_partition_t* esp_ota_get_last_invalid_partition(void);
+
+/**
+ * @brief Returns state for given partition.
+ *
+ * @param[in] partition  Pointer to partition.
+ * @param[out] ota_state state of partition (if this partition has a record in otadata).
+ * @return
+ *        - ESP_OK:                 Successful.
+ *        - ESP_ERR_INVALID_ARG:    partition or ota_state arguments were NULL.
+ *        - ESP_ERR_NOT_SUPPORTED:  partition is not ota.
+ *        - ESP_ERR_NOT_FOUND:      Partition table does not have otadata or state was not found for given partition.
+ */
+esp_err_t esp_ota_get_state_partition(const esp_partition_t *partition, esp_ota_img_states_t *ota_state);
+
+/**
+ * @brief Erase previous boot app partition and corresponding otadata select for this partition.
+ *
+ * When current app is marked to as valid then you can erase previous app partition.
+ * @return
+ *        - ESP_OK:   Successful, otherwise ESP_ERR.
+ */
+esp_err_t esp_ota_erase_last_boot_app_partition(void);
+
+/**
+ * @brief Checks applications on the slots which can be booted in case of rollback.
+ *
+ * These applications should be valid (marked in otadata as not UNDEFINED, INVALID or ABORTED and crc is good) and be able booted,
+ * and secure_version of app >= secure_version of efuse (if anti-rollback is enabled).
+ *
+ * @return
+ *        - True: Returns true if the slots have at least one app (except the running app).
+ *        - False: The rollback is not possible.
+ */
+bool esp_ota_check_rollback_is_possible(void);
+
+#if SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS > 1 && (CONFIG_SECURE_BOOT_V2_ENABLED || __DOXYGEN__)
+
+/**
+ * Secure Boot V2 public key indexes.
+ */
+typedef enum {
+    SECURE_BOOT_PUBLIC_KEY_INDEX_0,     /*!< Points to the 0th index of the Secure Boot v2 public key */
+    SECURE_BOOT_PUBLIC_KEY_INDEX_1,     /*!< Points to the 1st index of the Secure Boot v2 public key */
+    SECURE_BOOT_PUBLIC_KEY_INDEX_2      /*!< Points to the 2nd index of the Secure Boot v2 public key */
+} esp_ota_secure_boot_public_key_index_t;
+
+/**
+ * @brief Revokes the signature digest denoted by the given index. This should be called in the application only after the rollback logic otherwise the device may end up in unrecoverable state.
+ *
+ * Relevant for Secure boot v2 on ESP32-S2, ESP32-S3, ESP32-C3, ESP32-C6, ESP32-H2 where up to 3 key digests can be stored (Key \#N-1, Key \#N, Key \#N+1).
+ * When a key used to sign an app is invalidated, an OTA update is to be sent with an app signed with at least one of the other two keys which has not been revoked already.
+ * After successfully booting the OTA app should call this function to revoke Key \#N-1.
+ *
+ * @param index - The index of the signature block to be revoked
+ *
+ * @return
+ *        - ESP_OK: If revocation is successful.
+ *        - ESP_ERR_INVALID_ARG: If the index of the public key to be revoked is incorrect.
+ *        - ESP_FAIL: If secure boot v2 has not been enabled.
+ */
+esp_err_t esp_ota_revoke_secure_boot_public_key(esp_ota_secure_boot_public_key_index_t index);
+#endif /* SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS > 1 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* OTA_OPS_H */
@@ -0,0 +1,200 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org),
+ * Additions Copyright (c) 2020, Espressif Systems (Shanghai) PTE LTD
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#pragma once
+#include "tusb_option.h"
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*         */
+/* KCONFIG */
+/*         */
+
+#ifndef CONFIG_TINYUSB_CDC_ENABLED
+#   define CONFIG_TINYUSB_CDC_ENABLED 0
+#endif
+
+#ifndef CONFIG_TINYUSB_MSC_ENABLED
+#   define CONFIG_TINYUSB_MSC_ENABLED 0
+#endif
+
+#ifndef CONFIG_TINYUSB_HID_ENABLED
+#   define CONFIG_TINYUSB_HID_ENABLED 0
+#endif
+
+#ifndef CONFIG_TINYUSB_MIDI_ENABLED
+#   define CONFIG_TINYUSB_MIDI_ENABLED 0
+#endif
+
+#ifndef CONFIG_TINYUSB_VIDEO_ENABLED
+#   define CONFIG_TINYUSB_VIDEO_ENABLED 0
+#endif
+
+#ifndef CONFIG_TINYUSB_CUSTOM_CLASS_ENABLED
+#   define CONFIG_TINYUSB_CUSTOM_CLASS_ENABLED 0
+#endif
+
+#ifndef CONFIG_TINYUSB_DFU_RT_ENABLED
+#   define CONFIG_TINYUSB_DFU_RT_ENABLED 0
+#endif
+
+#ifndef CONFIG_TINYUSB_DFU_ENABLED
+#   define CONFIG_TINYUSB_DFU_ENABLED 0
+#endif
+
+#ifndef CONFIG_TINYUSB_VENDOR_ENABLED
+#   define CONFIG_TINYUSB_VENDOR_ENABLED 0
+#endif
+
+#ifndef CONFIG_TINYUSB_NCM_ENABLED
+#   define CONFIG_TINYUSB_NCM_ENABLED 0
+#endif
+
+#if CONFIG_TINYUSB_ENABLED
+#	define CFG_TUD_ENABLED 1
+#endif
+
+/*                      */
+/* COMMON CONFIGURATION */
+/*                      */
+#ifndef CFG_TUSB_MCU
+#define CFG_TUSB_MCU				OPT_MCU_ESP32S2
+#endif
+#define CFG_TUSB_RHPORT0_MODE       OPT_MODE_DEVICE
+#define CFG_TUSB_OS                 OPT_OS_FREERTOS
+#define BOARD_TUD_RHPORT			0
+
+/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
+ * Tinyusb use follows macros to declare transferring memory so that they can be put
+ * into those specific section.
+ * e.g
+ * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") ))
+ * - CFG_TUSB_MEM_ALIGN   : __attribute__ ((aligned(4)))
+ */
+#ifndef CFG_TUSB_MEM_SECTION
+#   define CFG_TUSB_MEM_SECTION
+#endif
+
+#ifndef CFG_TUSB_MEM_ALIGN
+#if CONFIG_IDF_TARGET_ESP32P4
+#   define CFG_TUSB_MEM_ALIGN       TU_ATTR_ALIGNED(64)
+#else
+#   define CFG_TUSB_MEM_ALIGN       TU_ATTR_ALIGNED(4)
+#endif
+#endif
+
+#if CONFIG_IDF_TARGET_ESP32P4
+#define CFG_TUD_MAX_SPEED OPT_MODE_HIGH_SPEED
+#else
+#define CFG_TUD_MAX_SPEED OPT_MODE_FULL_SPEED
+#endif
+
+#define BOARD_TUD_MAX_SPEED			CFG_TUD_MAX_SPEED
+
+/*                      */
+/* DEVICE CONFIGURATION */
+/*                      */
+
+#define CFG_TUD_MAINTASK_SIZE 		4096
+#define CFG_TUD_ENDOINT_SIZE 		(TUD_OPT_HIGH_SPEED ? 512 : 64)
+#define CFG_TUD_ENDOINT0_SIZE 		64
+
+// Enabled Drivers
+#ifdef CONFIG_TINYUSB_CDC_MAX_PORTS
+#define CFG_TUD_CDC 				CONFIG_TINYUSB_CDC_MAX_PORTS
+#else
+#define CFG_TUD_CDC 				0
+#endif
+#define CFG_TUD_MSC 				CONFIG_TINYUSB_MSC_ENABLED
+#define CFG_TUD_HID 				CONFIG_TINYUSB_HID_ENABLED
+#define CFG_TUD_MIDI 				CONFIG_TINYUSB_MIDI_ENABLED
+#define CFG_TUD_VIDEO               CONFIG_TINYUSB_VIDEO_ENABLED
+#define CFG_TUD_CUSTOM_CLASS 		CONFIG_TINYUSB_CUSTOM_CLASS_ENABLED
+#define CFG_TUD_DFU_RUNTIME			CONFIG_TINYUSB_DFU_RT_ENABLED
+#define CFG_TUD_DFU					CONFIG_TINYUSB_DFU_ENABLED
+#define CFG_TUD_VENDOR 				CONFIG_TINYUSB_VENDOR_ENABLED
+#define CFG_TUD_NCM 				CONFIG_TINYUSB_NCM_ENABLED
+
+// CDC FIFO size of TX and RX
+#define CFG_TUD_CDC_RX_BUFSIZE 		CONFIG_TINYUSB_CDC_RX_BUFSIZE
+#define CFG_TUD_CDC_TX_BUFSIZE 		CONFIG_TINYUSB_CDC_TX_BUFSIZE
+
+// MSC Buffer size of Device Mass storage:
+#define CFG_TUD_MSC_BUFSIZE 		CONFIG_TINYUSB_MSC_BUFSIZE
+
+// HID buffer size Should be sufficient to hold ID (if any) + Data
+#define CFG_TUD_HID_BUFSIZE 		CONFIG_TINYUSB_HID_BUFSIZE
+
+// MIDI FIFO size of TX and RX
+#define CFG_TUD_MIDI_RX_BUFSIZE		CONFIG_TINYUSB_MIDI_RX_BUFSIZE
+#define CFG_TUD_MIDI_TX_BUFSIZE		CONFIG_TINYUSB_MIDI_TX_BUFSIZE
+
+// The number of video streaming interfaces and  endpoint size
+#define CFG_TUD_VIDEO_STREAMING     CONFIG_TINYUSB_VIDEO_STREAMING_IFS
+#define CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE  CONFIG_TINYUSB_VIDEO_STREAMING_BUFSIZE
+
+// DFU buffer size
+#define CFG_TUD_DFU_XFER_BUFSIZE	CONFIG_TINYUSB_DFU_BUFSIZE
+
+// VENDOR FIFO size of TX and RX
+#define CFG_TUD_VENDOR_RX_BUFSIZE 	CONFIG_TINYUSB_VENDOR_RX_BUFSIZE
+#define CFG_TUD_VENDOR_TX_BUFSIZE 	CONFIG_TINYUSB_VENDOR_TX_BUFSIZE
+
+/*                      */
+/*  HOST CONFIGURATION  */
+/*                      */
+
+#define CFG_TUH_ENABLED             CFG_TUD_ENABLED
+#define CFG_TUSB_RHPORT1_MODE       OPT_MODE_HOST
+#define BOARD_TUH_RHPORT            1
+#define BOARD_TUH_MAX_SPEED         CFG_TUD_MAX_SPEED
+#define CFG_TUH_ENUMERATION_BUFSIZE 256
+
+#define CFG_TUH_HUB                 2 // number of supported hubs
+#define CFG_TUH_CDC                 1 // CDC ACM
+#define CFG_TUH_CDC_FTDI            1 // FTDI Serial.  FTDI is not part of CDC class, only to re-use CDC driver API
+#define CFG_TUH_CDC_CP210X          1 // CP210x Serial. CP210X is not part of CDC class, only to re-use CDC driver API
+#define CFG_TUH_CDC_CH34X           1 // CH340 or CH341 Serial. CH34X is not part of CDC class, only to re-use CDC driver API
+#define CFG_TUH_HID                 1 // typical keyboard + mouse device can have 3-4 HID interfaces
+#define CFG_TUH_MSC                 1
+//#define CFG_TUH_VENDOR              3
+
+#define CFG_TUH_DEVICE_MAX          (3*CFG_TUH_HUB + 1)
+
+//------------- HID -------------//
+#define CFG_TUH_HID_EPIN_BUFSIZE    64
+#define CFG_TUH_HID_EPOUT_BUFSIZE   64
+
+//------------- CDC -------------//
+#define CFG_TUH_CDC_LINE_CONTROL_ON_ENUM    0x03
+#define CFG_TUH_CDC_LINE_CODING_ON_ENUM   { 115200, CDC_LINE_CODING_STOP_BITS_1, CDC_LINE_CODING_PARITY_NONE, 8 }
+
+#ifdef __cplusplus
+}
+#endif
@@ -0,0 +1,474 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Ha Thach (tinyusb.org)
+ * Copyright (c) 2020 Reinhard Panhuber
+ * Copyright (c) 2023 HiFiPhile
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_AUDIO_DEVICE_H_
+#define TUSB_AUDIO_DEVICE_H_
+
+#include "audio.h"
+
+//--------------------------------------------------------------------+
+// Class Driver Configuration
+//--------------------------------------------------------------------+
+
+// All sizes are in bytes!
+
+// Size of control buffer used to receive and send control messages via EP0 - has to be big enough to hold your
+// biggest request structure e.g. range requests with multiple intervals defined or cluster descriptors
+#ifndef CFG_TUD_AUDIO_CTRL_BUF_SZ
+#define CFG_TUD_AUDIO_CTRL_BUF_SZ    64
+#endif
+
+// End point sizes IN BYTES - Limits: Full Speed <= 1023, High Speed <= 1024
+#ifndef CFG_TUD_AUDIO_ENABLE_EP_IN
+#define CFG_TUD_AUDIO_ENABLE_EP_IN 0   // TX
+#endif
+
+#ifndef CFG_TUD_AUDIO_ENABLE_EP_OUT
+#define CFG_TUD_AUDIO_ENABLE_EP_OUT 0  // RX
+#endif
+
+// Maximum EP sizes for all alternate AS interface settings - used for checks and buffer allocation
+#if CFG_TUD_AUDIO_ENABLE_EP_IN
+#ifndef CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX
+#error You must tell the driver the biggest EP IN size!
+#endif
+#if CFG_TUD_AUDIO > 1
+#ifndef CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX
+#error You must tell the driver the biggest EP IN size!
+#endif
+#endif
+#if CFG_TUD_AUDIO > 2
+#ifndef CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX
+#error You must tell the driver the biggest EP IN size!
+#endif
+#endif
+#endif // CFG_TUD_AUDIO_ENABLE_EP_IN
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+#ifndef CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX
+#error You must tell the driver the biggest EP OUT size!
+#endif
+#if CFG_TUD_AUDIO > 1
+#ifndef CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX
+#error You must tell the driver the biggest EP OUT size!
+#endif
+#endif
+#if CFG_TUD_AUDIO > 2
+#ifndef CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX
+#error You must tell the driver the biggest EP OUT size!
+#endif
+#endif
+#endif // CFG_TUD_AUDIO_ENABLE_EP_OUT
+
+// Software EP FIFO buffer sizes - must be >= max EP SIZEs!
+#ifndef CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ
+#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ                0
+#endif
+#ifndef CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ
+#define CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ                0
+#endif
+#ifndef CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ
+#define CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ                0
+#endif
+
+#ifndef CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ
+#define CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ               0
+#endif
+#ifndef CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ
+#define CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ               0
+#endif
+#ifndef CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ
+#define CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ               0
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_IN
+#if CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ < CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX
+#error EP software buffer size MUST BE at least as big as maximum EP size
+#endif
+
+#if CFG_TUD_AUDIO > 1
+#if CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ < CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX
+#error EP software buffer size MUST BE at least as big as maximum EP size
+#endif
+#endif
+
+#if CFG_TUD_AUDIO > 2
+#if CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ < CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX
+#error EP software buffer size MUST BE at least as big as maximum EP size
+#endif
+#endif
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+#if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ < CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX
+#error EP software buffer size MUST BE at least as big as maximum EP size
+#endif
+
+#if CFG_TUD_AUDIO > 1
+#if CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ < CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX
+#error EP software buffer size MUST BE at least as big as maximum EP size
+#endif
+#endif
+
+#if CFG_TUD_AUDIO > 2
+#if CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ < CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX
+#error EP software buffer size MUST BE at least as big as maximum EP size
+#endif
+#endif
+#endif
+
+// (For TYPE-I format only) Flow control is necessary to allow IN ep send correct amount of data, unless it's a
+// virtual device where data is perfectly synchronized to USB clock.
+#ifndef CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
+#define CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL  1
+#endif
+
+// Enable/disable feedback EP (required for asynchronous RX applications)
+#ifndef CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+#define CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP                    0                             // Feedback - 0 or 1
+#endif
+
+// Enable/disable interrupt EP (required for notifying host of control changes)
+#ifndef CFG_TUD_AUDIO_ENABLE_INTERRUPT_EP
+#define CFG_TUD_AUDIO_ENABLE_INTERRUPT_EP                   0                             // Feedback - 0 or 1
+#endif
+
+// Audio control interrupt EP - 6 Bytes according to UAC 2 specification (p. 74)
+#define CFG_TUD_AUDIO_INTERRUPT_EP_SZ                       6
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \addtogroup AUDIO_Serial Serial
+ *  @{
+ *  \defgroup   AUDIO_Serial_Device Device
+ *  @{ */
+
+//--------------------------------------------------------------------+
+// Application API (Multiple Interfaces)
+// CFG_TUD_AUDIO > 1
+//--------------------------------------------------------------------+
+bool tud_audio_n_mounted(uint8_t func_id);
+uint8_t tud_audio_n_version(uint8_t func_id);
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+uint16_t   tud_audio_n_available       (uint8_t func_id);
+uint16_t   tud_audio_n_read            (uint8_t func_id, void* buffer, uint16_t bufsize);
+bool       tud_audio_n_clear_ep_out_ff (uint8_t func_id);
+tu_fifo_t* tud_audio_n_get_ep_out_ff   (uint8_t func_id);
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_IN
+uint16_t   tud_audio_n_write          (uint8_t func_id, const void * data, uint16_t len);
+bool       tud_audio_n_clear_ep_in_ff (uint8_t func_id);
+tu_fifo_t* tud_audio_n_get_ep_in_ff   (uint8_t func_id);
+uint16_t   tud_audio_n_get_ep_in_fifo_threshold(uint8_t func_id);
+void       tud_audio_n_set_ep_in_fifo_threshold(uint8_t func_id, uint16_t threshold);
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_INTERRUPT_EP
+bool    tud_audio_int_n_write                     (uint8_t func_id, const audio_interrupt_data_t * data);
+#endif
+
+//--------------------------------------------------------------------+
+// Application API (Interface0)
+//--------------------------------------------------------------------+
+static inline bool         tud_audio_mounted                (void);
+static inline uint8_t      tud_audio_version                (void);
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+static inline uint16_t   tud_audio_available       (void);
+static inline bool       tud_audio_clear_ep_out_ff (void);
+static inline uint16_t   tud_audio_read            (void* buffer, uint16_t bufsize);
+static inline tu_fifo_t* tud_audio_get_ep_out_ff   (void);
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_IN
+static inline uint16_t   tud_audio_write          (const void * data, uint16_t len);
+static inline bool       tud_audio_clear_ep_in_ff (void);
+static inline tu_fifo_t* tud_audio_get_ep_in_ff   (void);
+#endif
+
+// INT CTR API
+
+#if CFG_TUD_AUDIO_ENABLE_INTERRUPT_EP
+static inline bool tud_audio_int_write                      (const audio_interrupt_data_t * data);
+#endif
+
+// Buffer control EP data and schedule a transmit
+// This function is intended to be used if you do not have a persistent buffer or memory location available
+// (e.g. non-local variables) and need to answer onto a get request. This function buffers your answer request
+// frame into the control buffer of the corresponding audio driver and schedules a transmit for sending it.
+// Since transmission is triggered via interrupts, a persistent memory location is required onto which the buffer
+// pointer in pointing. If you already have such available you may directly use 'tud_control_xfer(...)'. In this
+// case data does not need to be copied into an additional buffer and you save some time.
+// If the request's wLength is zero, a status packet is sent instead.
+bool tud_audio_buffer_and_schedule_control_xfer(uint8_t rhport, tusb_control_request_t const * p_request,
+                                                 void* data, uint16_t len);
+
+//--------------------------------------------------------------------+
+// Application Callback API
+//--------------------------------------------------------------------+
+
+#if CFG_TUD_AUDIO_ENABLE_EP_IN
+// Invoked in ISR context once an audio packet was sent successfully.
+// Normally this function is not needed, since the data transfer should be driven by audio clock (i.e. I2S clock),
+// call tud_audio_write() in I2S receive callback.
+bool tud_audio_tx_done_isr(uint8_t rhport, uint16_t n_bytes_sent, uint8_t func_id, uint8_t ep_in,
+                           uint8_t cur_alt_setting);
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+// Invoked in ISR context once an audio packet was received successfully.
+// Normally this function is not needed, since the data transfer should be driven by audio clock (i.e. I2S clock),
+// call tud_audio_read() in I2S transmit callback.
+bool tud_audio_rx_done_isr(uint8_t rhport, uint16_t n_bytes_received, uint8_t func_id, uint8_t ep_out,
+                           uint8_t cur_alt_setting);
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+
+// Note about feedback calculation
+//
+// Option 1 - AUDIO_FEEDBACK_METHOD_FIFO_COUNT
+// Feedback value is calculated within the audio driver by regulating the FIFO level to half fill.
+// Advantage: No SOF interrupt is enabled, hence the CPU need not to handle an ISR every 1ms or 125us and thus
+// less CPU load, well tested (Windows, Linux, OSX) with a reliable result so far.
+// Disadvantage: A FIFO of minimal 4 frames is needed to compensate for jitter, an average delay of 2 frames is
+// introduced.
+//
+// Option 2 - AUDIO_FEEDBACK_METHOD_FREQUENCY_FIXED / AUDIO_FEEDBACK_METHOD_FREQUENCY_FLOAT
+// Feedback value is calculated within the audio driver by use of SOF interrupt. The driver needs information
+// about the master clock f_m from which the audio sample frequency f_s is derived, f_s itself, and the cycle
+// count of f_m at time of the SOF interrupt (e.g. by use of a hardware counter).
+// See tud_audio_set_fb_params() and tud_audio_feedback_update()
+// Advantage: Reduced jitter in the feedback value computation, hence, the receive FIFO can be smaller and thus a
+// smaller delay is possible.
+// Disadvantage: higher CPU load due to SOF ISR handling every frame i.e. 1ms or 125us. (The most critical point
+// is the reading of the cycle counter value of f_m. It is read from within the SOF ISR - see: audiod_sof() -,
+// hence, the ISR must has a high priority such that no software dependent "random" delay i.e. jitter is
+// introduced). Long-term drift will cause the FIFO under/overflow, you still needs to correct it somehow.
+//
+// Option 3 - manual
+// Determined by the user itself and set by use of tud_audio_n_fb_set(). The feedback value may be determined
+// e.g. from some fill status of some FIFO buffer.
+// Advantage: No ISR interrupt is enabled, hence the CPU need not to handle an ISR every 1ms or 125us and thus
+// less CPU load.
+// Disadvantage: typically a larger FIFO is needed to compensate for jitter (e.g. 6 frames), i.e. a larger delay
+// is introduced.
+
+
+// This function is used to provide data rate feedback from an asynchronous sink. Feedback value will be sent at
+// FB endpoint interval till it's changed.
+//
+// The feedback format is specified to be 16.16 for HS and 10.14 for FS devices (see Universal Serial Bus
+// Specification Revision 2.0 5.12.4.2). For simplicity, this function always uses 16.16 format. For FS devices,
+// the driver will automatically convert the value to 10.14 format.
+//
+// Note that due to a bug in its USB Audio 2.0 driver, Windows currently requires 16.16 format for _all_ USB 2.0
+// devices. On Linux and it seems the driver can work with either format.
+//
+// Feedback value can be determined from within the SOF ISR of the audio driver. This should reduce jitter. If the
+// feature is used, the user can not set the feedback value.
+//
+// Determine feedback value - The feedback method is described in 5.12.4.2 of the USB 2.0 spec
+// Boiled down, the feedback value Ff = n_samples / (micro)frame.
+// Since an accuracy of less than 1 Sample / second is desired, at least n_frames = ceil(2^K * f_s / f_m) frames
+// need to be measured, where K = 10 for full speed and K = 13 for high speed, f_s is the sampling frequency
+// e.g. 48 kHz and f_m is the cpu clock frequency e.g. 100 MHz (or any other master clock whose clock count is
+// available and locked to f_s)
+// The update interval in the (4.10.2.1) Feedback Endpoint Descriptor must be less or equal to 2^(K - P), where
+// P = min( ceil(log2(f_m / f_s)), K)
+// feedback = n_cycles / n_frames * f_s / f_m in 16.16 format, where n_cycles are the number of main clock cycles
+// within fb_n_frames
+bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback);
+
+// Update feedback value with passed MCLK cycles since last time this update function is called.
+// Typically called within tud_audio_sof_isr(). Required tud_audio_feedback_params_cb() is implemented
+// This function will also call tud_audio_feedback_set()
+// return feedback value in 16.16 for reference (0 for error)
+// Example :
+//   binterval=3 (4ms); FS = 48kHz; MCLK = 12.288MHz
+//   In 4 SOF MCLK counted 49152 cycles
+uint32_t tud_audio_feedback_update(uint8_t func_id, uint32_t cycles);
+
+enum {
+  AUDIO_FEEDBACK_METHOD_DISABLED,
+  AUDIO_FEEDBACK_METHOD_FREQUENCY_FIXED,
+  AUDIO_FEEDBACK_METHOD_FREQUENCY_FLOAT,
+  AUDIO_FEEDBACK_METHOD_FREQUENCY_POWER_OF_2, // For driver internal use only
+  AUDIO_FEEDBACK_METHOD_FIFO_COUNT
+};
+
+typedef struct {
+  uint8_t method;
+  uint32_t sample_freq;   //  sample frequency in Hz
+
+  union {
+    struct {
+      uint32_t mclk_freq; // Main clock frequency in Hz i.e. master clock to which sample clock is based on
+    } frequency;
+    struct {
+      uint16_t fifo_threshold;  // Target FIFO threshold level, default to half FIFO if not set
+    } fifo_count;
+  };
+} audio_feedback_params_t;
+
+// Invoked when needed to set feedback parameters
+void tud_audio_feedback_params_cb(uint8_t func_id, uint8_t alt_itf, audio_feedback_params_t* feedback_param);
+
+// Callback in ISR context, invoked periodically according to feedback endpoint bInterval.
+// Could be used to compute and update feedback value, should be placed in RAM if possible
+// frame_number  : current SOF count
+// interval_shift: number of bit shift i.e log2(interval) from Feedback endpoint descriptor
+TU_ATTR_FAST_FUNC void tud_audio_feedback_interval_isr(uint8_t func_id, uint32_t frame_number, uint8_t interval_shift);
+#endif // CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+
+#if CFG_TUD_AUDIO_ENABLE_INTERRUPT_EP
+// Invoked when an interrupt notification transfer is complete
+void tud_audio_int_done_cb(uint8_t rhport);
+#endif
+
+// Invoked when audio set interface request received
+bool tud_audio_set_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request);
+
+// Invoked when audio set interface request received which closes an EP
+bool tud_audio_set_itf_close_ep_cb(uint8_t rhport, tusb_control_request_t const * p_request);
+
+// backward compatible for typo
+#define tud_audio_set_itf_close_EP_cb   tud_audio_set_itf_close_ep_cb
+
+// Invoked when audio class specific set request received for an EP
+bool tud_audio_set_req_ep_cb(uint8_t rhport, tusb_control_request_t const * p_request, uint8_t *pBuff);
+
+// Invoked when audio class specific set request received for an interface
+bool tud_audio_set_req_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request, uint8_t *pBuff);
+
+// Invoked when audio class specific set request received for an entity
+bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const * p_request, uint8_t *pBuff);
+
+// Invoked when audio class specific get request received for an EP
+bool tud_audio_get_req_ep_cb(uint8_t rhport, tusb_control_request_t const * p_request);
+
+// Invoked when audio class specific get request received for an interface
+bool tud_audio_get_req_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request);
+
+// Invoked when audio class specific get request received for an entity
+bool tud_audio_get_req_entity_cb(uint8_t rhport, tusb_control_request_t const * p_request);
+
+//--------------------------------------------------------------------+
+// Inline Functions
+//--------------------------------------------------------------------+
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_audio_mounted(void) {
+  return tud_audio_n_mounted(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tud_audio_version(void) {
+  return tud_audio_n_version(0);
+}
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tud_audio_available(void) {
+  return tud_audio_n_available(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tud_audio_read(void* buffer, uint16_t bufsize) {
+  return tud_audio_n_read(0, buffer, bufsize);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_audio_clear_ep_out_ff(void) {
+  return tud_audio_n_clear_ep_out_ff(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tu_fifo_t* tud_audio_get_ep_out_ff(void) {
+  return tud_audio_n_get_ep_out_ff(0);
+}
+
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_IN
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tud_audio_write(const void * data, uint16_t len) {
+  return tud_audio_n_write(0, data, len);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_audio_clear_ep_in_ff(void) {
+  return tud_audio_n_clear_ep_in_ff(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tu_fifo_t* tud_audio_get_ep_in_ff(void) {
+  return tud_audio_n_get_ep_in_ff(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tud_audio_get_ep_in_fifo_threshold(void)
+{
+  return tud_audio_n_get_ep_in_fifo_threshold(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tud_audio_set_ep_in_fifo_threshold(uint16_t threshold)
+{
+  tud_audio_n_set_ep_in_fifo_threshold(0, threshold);
+}
+
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_INTERRUPT_EP
+TU_ATTR_ALWAYS_INLINE static inline bool tud_audio_int_write(const audio_interrupt_data_t * data) {
+  return tud_audio_int_n_write(0, data);
+}
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+TU_ATTR_ALWAYS_INLINE static inline bool tud_audio_fb_set(uint32_t feedback) {
+  return tud_audio_n_fb_set(0, feedback);
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void     audiod_init           (void);
+bool     audiod_deinit         (void);
+void     audiod_reset          (uint8_t rhport);
+uint16_t audiod_open           (uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     audiod_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+bool     audiod_xfer_cb        (uint8_t rhport, uint8_t edpt_addr, xfer_result_t result, uint32_t xferred_bytes);
+bool     audiod_xfer_isr       (uint8_t rhport, uint8_t edpt_addr, xfer_result_t result, uint32_t xferred_bytes);
+void     audiod_sof_isr        (uint8_t rhport, uint32_t frame_count);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* TUSB_AUDIO_DEVICE_H_ */
+
+/** @} */
+/** @} */
@@ -0,0 +1,117 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jerzy Kasenberg
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_BTH_DEVICE_H_
+#define TUSB_BTH_DEVICE_H_
+
+#include <common/tusb_common.h>
+#include <device/usbd.h>
+
+//--------------------------------------------------------------------+
+// Class Driver Configuration
+//--------------------------------------------------------------------+
+#ifndef CFG_TUD_BTH_EVENT_EPSIZE
+#define CFG_TUD_BTH_EVENT_EPSIZE     16
+#endif
+
+#ifndef CFG_TUD_BTH_DATA_EPSIZE
+#define CFG_TUD_BTH_DATA_EPSIZE      64
+#endif
+
+// Allow BTH class to work in historically compatibility mode where the bRequest is always 0xe0.
+// See Bluetooth Core v5.3, Vol. 4, Part B, Section 2.2
+#ifndef CFG_TUD_BTH_HISTORICAL_COMPATIBLE
+#define CFG_TUD_BTH_HISTORICAL_COMPATIBLE 0
+#endif
+
+typedef struct TU_ATTR_PACKED
+{
+  uint16_t op_code;
+  uint8_t param_length;
+  uint8_t param[255];
+} bt_hci_cmd_t;
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Application Callback API (weak is optional)
+//--------------------------------------------------------------------+
+
+// Invoked when HCI command was received over USB from Bluetooth host.
+// Detailed format is described in Bluetooth core specification Vol 2,
+// Part E, 5.4.1.
+// Length of the command is from 3 bytes (2 bytes for OpCode,
+// 1 byte for parameter total length) to 258.
+void tud_bt_hci_cmd_cb(void *hci_cmd, size_t cmd_len);
+
+// Invoked when ACL data was received over USB from Bluetooth host.
+// Detailed format is described in Bluetooth core specification Vol 2,
+// Part E, 5.4.2.
+// Length is from 4 bytes, (12 bits for Handle, 4 bits for flags
+// and 16 bits for data total length) to endpoint size.
+void tud_bt_acl_data_received_cb(void *acl_data, uint16_t data_len);
+
+// Called when event sent with tud_bt_event_send() was delivered to BT stack.
+// Controller can release/reuse buffer with Event packet at this point.
+void tud_bt_event_sent_cb(uint16_t sent_bytes);
+
+// Called when ACL data that was sent with tud_bt_acl_data_send()
+// was delivered to BT stack.
+// Controller can release/reuse buffer with ACL packet at this point.
+void tud_bt_acl_data_sent_cb(uint16_t sent_bytes);
+
+// Bluetooth controller calls this function when it wants to send even packet
+// as described in Bluetooth core specification Vol 2, Part E, 5.4.4.
+// Event has at least 2 bytes, first is Event code second contains parameter
+// total length. Controller can release/reuse event memory after
+// tud_bt_event_sent_cb() is called.
+bool tud_bt_event_send(void *event, uint16_t event_len);
+
+// Bluetooth controller calls this to send ACL data packet
+// as described in Bluetooth core specification Vol 2, Part E, 5.4.2
+// Minimum length is 4 bytes, (12 bits for Handle, 4 bits for flags
+// and 16 bits for data total length). Upper limit is not limited
+// to endpoint size since buffer is allocate by controller
+// and must not be reused till tud_bt_acl_data_sent_cb() is called.
+bool tud_bt_acl_data_send(void *acl_data, uint16_t data_len);
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void     btd_init            (void);
+bool     btd_deinit          (void);
+void     btd_reset           (uint8_t rhport);
+uint16_t btd_open            (uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     btd_control_xfer_cb (uint8_t rhport, uint8_t stage, tusb_control_request_t const *request);
+bool     btd_xfer_cb         (uint8_t rhport, uint8_t edpt_addr, xfer_result_t result, uint32_t xferred_bytes);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* TUSB_BTH_DEVICE_H_ */
@@ -0,0 +1,472 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/** \ingroup group_class
+ *  \defgroup ClassDriver_CDC Communication Device Class (CDC)
+ *            Currently only Abstract Control Model subclass is supported
+ *  @{ */
+
+#ifndef TUSB_CDC_H__
+#define TUSB_CDC_H__
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/** \defgroup ClassDriver_CDC_Common Common Definitions
+ *  @{ */
+
+//--------------------------------------------------------------------+
+// CDC Communication Interface Class
+//--------------------------------------------------------------------+
+
+/// Communication Interface Subclass Codes
+typedef enum
+{
+  CDC_COMM_SUBCLASS_DIRECT_LINE_CONTROL_MODEL      = 0x01 , ///< Direct Line Control Model         [USBPSTN1.2]
+  CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL         = 0x02 , ///< Abstract Control Model            [USBPSTN1.2]
+  CDC_COMM_SUBCLASS_TELEPHONE_CONTROL_MODEL        = 0x03 , ///< Telephone Control Model           [USBPSTN1.2]
+  CDC_COMM_SUBCLASS_MULTICHANNEL_CONTROL_MODEL     = 0x04 , ///< Multi-Channel Control Model       [USBISDN1.2]
+  CDC_COMM_SUBCLASS_CAPI_CONTROL_MODEL             = 0x05 , ///< CAPI Control Model                [USBISDN1.2]
+  CDC_COMM_SUBCLASS_ETHERNET_CONTROL_MODEL         = 0x06 , ///< Ethernet Networking Control Model [USBECM1.2]
+  CDC_COMM_SUBCLASS_ATM_NETWORKING_CONTROL_MODEL   = 0x07 , ///< ATM Networking Control Model      [USBATM1.2]
+  CDC_COMM_SUBCLASS_WIRELESS_HANDSET_CONTROL_MODEL = 0x08 , ///< Wireless Handset Control Model    [USBWMC1.1]
+  CDC_COMM_SUBCLASS_DEVICE_MANAGEMENT              = 0x09 , ///< Device Management                 [USBWMC1.1]
+  CDC_COMM_SUBCLASS_MOBILE_DIRECT_LINE_MODEL       = 0x0A , ///< Mobile Direct Line Model          [USBWMC1.1]
+  CDC_COMM_SUBCLASS_OBEX                           = 0x0B , ///< OBEX                              [USBWMC1.1]
+  CDC_COMM_SUBCLASS_ETHERNET_EMULATION_MODEL       = 0x0C , ///< Ethernet Emulation Model          [USBEEM1.0]
+  CDC_COMM_SUBCLASS_NETWORK_CONTROL_MODEL          = 0x0D   ///< Network Control Model             [USBNCM1.0]
+} cdc_comm_sublcass_type_t;
+
+/// Communication Interface Protocol Codes
+typedef enum
+{
+  CDC_COMM_PROTOCOL_NONE                          = 0x00 , ///< No specific protocol
+  CDC_COMM_PROTOCOL_ATCOMMAND                     = 0x01 , ///< AT Commands: V.250 etc
+  CDC_COMM_PROTOCOL_ATCOMMAND_PCCA_101            = 0x02 , ///< AT Commands defined by PCCA-101
+  CDC_COMM_PROTOCOL_ATCOMMAND_PCCA_101_AND_ANNEXO = 0x03 , ///< AT Commands defined by PCCA-101 & Annex O
+  CDC_COMM_PROTOCOL_ATCOMMAND_GSM_707             = 0x04 , ///< AT Commands defined by GSM 07.07
+  CDC_COMM_PROTOCOL_ATCOMMAND_3GPP_27007          = 0x05 , ///< AT Commands defined by 3GPP 27.007
+  CDC_COMM_PROTOCOL_ATCOMMAND_CDMA                = 0x06 , ///< AT Commands defined by TIA for CDMA
+  CDC_COMM_PROTOCOL_ETHERNET_EMULATION_MODEL      = 0x07   ///< Ethernet Emulation Model
+} cdc_comm_protocol_type_t;
+
+//------------- SubType Descriptor in COMM Functional Descriptor -------------//
+/// Communication Interface SubType Descriptor
+typedef enum
+{
+  CDC_FUNC_DESC_HEADER                                           = 0x00 , ///< Header Functional Descriptor, which marks the beginning of the concatenated set of functional descriptors for the interface.
+  CDC_FUNC_DESC_CALL_MANAGEMENT                                  = 0x01 , ///< Call Management Functional Descriptor.
+  CDC_FUNC_DESC_ABSTRACT_CONTROL_MANAGEMENT                      = 0x02 , ///< Abstract Control Management Functional Descriptor.
+  CDC_FUNC_DESC_DIRECT_LINE_MANAGEMENT                           = 0x03 , ///< Direct Line Management Functional Descriptor.
+  CDC_FUNC_DESC_TELEPHONE_RINGER                                 = 0x04 , ///< Telephone Ringer Functional Descriptor.
+  CDC_FUNC_DESC_TELEPHONE_CALL_AND_LINE_STATE_REPORTING_CAPACITY = 0x05 , ///< Telephone Call and Line State Reporting Capabilities Functional Descriptor.
+  CDC_FUNC_DESC_UNION                                            = 0x06 , ///< Union Functional Descriptor
+  CDC_FUNC_DESC_COUNTRY_SELECTION                                = 0x07 , ///< Country Selection Functional Descriptor
+  CDC_FUNC_DESC_TELEPHONE_OPERATIONAL_MODES                      = 0x08 , ///< Telephone Operational ModesFunctional Descriptor
+  CDC_FUNC_DESC_USB_TERMINAL                                     = 0x09 , ///< USB Terminal Functional Descriptor
+  CDC_FUNC_DESC_NETWORK_CHANNEL_TERMINAL                         = 0x0A , ///< Network Channel Terminal Descriptor
+  CDC_FUNC_DESC_PROTOCOL_UNIT                                    = 0x0B , ///< Protocol Unit Functional Descriptor
+  CDC_FUNC_DESC_EXTENSION_UNIT                                   = 0x0C , ///< Extension Unit Functional Descriptor
+  CDC_FUNC_DESC_MULTICHANEL_MANAGEMENT                           = 0x0D , ///< Multi-Channel Management Functional Descriptor
+  CDC_FUNC_DESC_CAPI_CONTROL_MANAGEMENT                          = 0x0E , ///< CAPI Control Management Functional Descriptor
+  CDC_FUNC_DESC_ETHERNET_NETWORKING                              = 0x0F , ///< Ethernet Networking Functional Descriptor
+  CDC_FUNC_DESC_ATM_NETWORKING                                   = 0x10 , ///< ATM Networking Functional Descriptor
+  CDC_FUNC_DESC_WIRELESS_HANDSET_CONTROL_MODEL                   = 0x11 , ///< Wireless Handset Control Model Functional Descriptor
+  CDC_FUNC_DESC_MOBILE_DIRECT_LINE_MODEL                         = 0x12 , ///< Mobile Direct Line Model Functional Descriptor
+  CDC_FUNC_DESC_MOBILE_DIRECT_LINE_MODEL_DETAIL                  = 0x13 , ///< MDLM Detail Functional Descriptor
+  CDC_FUNC_DESC_DEVICE_MANAGEMENT_MODEL                          = 0x14 , ///< Device Management Model Functional Descriptor
+  CDC_FUNC_DESC_OBEX                                             = 0x15 , ///< OBEX Functional Descriptor
+  CDC_FUNC_DESC_COMMAND_SET                                      = 0x16 , ///< Command Set Functional Descriptor
+  CDC_FUNC_DESC_COMMAND_SET_DETAIL                               = 0x17 , ///< Command Set Detail Functional Descriptor
+  CDC_FUNC_DESC_TELEPHONE_CONTROL_MODEL                          = 0x18 , ///< Telephone Control Model Functional Descriptor
+  CDC_FUNC_DESC_OBEX_SERVICE_IDENTIFIER                          = 0x19 , ///< OBEX Service Identifier Functional Descriptor
+  CDC_FUNC_DESC_NCM                                              = 0x1A , ///< NCM Functional Descriptor
+}cdc_func_desc_type_t;
+
+//--------------------------------------------------------------------+
+// CDC Data Interface Class
+//--------------------------------------------------------------------+
+
+// SUBCLASS code of Data Interface is not used and should/must be zero
+
+// Data Interface Protocol Codes
+typedef enum{
+  CDC_DATA_PROTOCOL_ISDN_BRI                               = 0x30, ///< Physical interface protocol for ISDN BRI
+  CDC_DATA_PROTOCOL_HDLC                                   = 0x31, ///< HDLC
+  CDC_DATA_PROTOCOL_TRANSPARENT                            = 0x32, ///< Transparent
+  CDC_DATA_PROTOCOL_Q921_MANAGEMENT                        = 0x50, ///< Management protocol for Q.921 data link protocol
+  CDC_DATA_PROTOCOL_Q921_DATA_LINK                         = 0x51, ///< Data link protocol for Q.931
+  CDC_DATA_PROTOCOL_Q921_TEI_MULTIPLEXOR                   = 0x52, ///< TEI-multiplexor for Q.921 data link protocol
+  CDC_DATA_PROTOCOL_V42BIS_DATA_COMPRESSION                = 0x90, ///< Data compression procedures
+  CDC_DATA_PROTOCOL_EURO_ISDN                              = 0x91, ///< Euro-ISDN protocol control
+  CDC_DATA_PROTOCOL_V24_RATE_ADAPTION_TO_ISDN              = 0x92, ///< V.24 rate adaptation to ISDN
+  CDC_DATA_PROTOCOL_CAPI_COMMAND                           = 0x93, ///< CAPI Commands
+  CDC_DATA_PROTOCOL_HOST_BASED_DRIVER                      = 0xFD, ///< Host based driver. Note: This protocol code should only be used in messages between host and device to identify the host driver portion of a protocol stack.
+  CDC_DATA_PROTOCOL_IN_PROTOCOL_UNIT_FUNCTIONAL_DESCRIPTOR = 0xFE  ///< The protocol(s) are described using a ProtocolUnit Functional Descriptors on Communications Class Interface
+}cdc_data_protocol_type_t;
+
+//--------------------------------------------------------------------+
+// Management Element Request (Control Endpoint)
+//--------------------------------------------------------------------+
+
+/// Communication Interface Management Element Request Codes
+typedef enum {
+  CDC_REQUEST_SEND_ENCAPSULATED_COMMAND                    = 0x00, ///< is used to issue a command in the format of the supported control protocol of the Communications Class interface
+  CDC_REQUEST_GET_ENCAPSULATED_RESPONSE                    = 0x01, ///< is used to request a response in the format of the supported control protocol of the Communications Class interface.
+  CDC_REQUEST_SET_COMM_FEATURE                             = 0x02,
+  CDC_REQUEST_GET_COMM_FEATURE                             = 0x03,
+  CDC_REQUEST_CLEAR_COMM_FEATURE                           = 0x04,
+
+  CDC_REQUEST_SET_AUX_LINE_STATE                           = 0x10,
+  CDC_REQUEST_SET_HOOK_STATE                               = 0x11,
+  CDC_REQUEST_PULSE_SETUP                                  = 0x12,
+  CDC_REQUEST_SEND_PULSE                                   = 0x13,
+  CDC_REQUEST_SET_PULSE_TIME                               = 0x14,
+  CDC_REQUEST_RING_AUX_JACK                                = 0x15,
+
+  CDC_REQUEST_SET_LINE_CODING                              = 0x20,
+  CDC_REQUEST_GET_LINE_CODING                              = 0x21,
+  CDC_REQUEST_SET_CONTROL_LINE_STATE                       = 0x22,
+  CDC_REQUEST_SEND_BREAK                                   = 0x23,
+
+  CDC_REQUEST_SET_RINGER_PARMS                             = 0x30,
+  CDC_REQUEST_GET_RINGER_PARMS                             = 0x31,
+  CDC_REQUEST_SET_OPERATION_PARMS                          = 0x32,
+  CDC_REQUEST_GET_OPERATION_PARMS                          = 0x33,
+  CDC_REQUEST_SET_LINE_PARMS                               = 0x34,
+  CDC_REQUEST_GET_LINE_PARMS                               = 0x35,
+  CDC_REQUEST_DIAL_DIGITS                                  = 0x36,
+  CDC_REQUEST_SET_UNIT_PARAMETER                           = 0x37,
+  CDC_REQUEST_GET_UNIT_PARAMETER                           = 0x38,
+  CDC_REQUEST_CLEAR_UNIT_PARAMETER                         = 0x39,
+  CDC_REQUEST_GET_PROFILE                                  = 0x3A,
+
+  CDC_REQUEST_SET_ETHERNET_MULTICAST_FILTERS               = 0x40,
+  CDC_REQUEST_SET_ETHERNET_POWER_MANAGEMENT_PATTERN_FILTER = 0x41,
+  CDC_REQUEST_GET_ETHERNET_POWER_MANAGEMENT_PATTERN_FILTER = 0x42,
+  CDC_REQUEST_SET_ETHERNET_PACKET_FILTER                   = 0x43,
+  CDC_REQUEST_GET_ETHERNET_STATISTIC                       = 0x44,
+
+  CDC_REQUEST_SET_ATM_DATA_FORMAT                          = 0x50,
+  CDC_REQUEST_GET_ATM_DEVICE_STATISTICS                    = 0x51,
+  CDC_REQUEST_SET_ATM_DEFAULT_VC                           = 0x52,
+  CDC_REQUEST_GET_ATM_VC_STATISTICS                        = 0x53,
+
+  CDC_REQUEST_MDLM_SEMANTIC_MODEL                          = 0x60,
+} cdc_management_request_t;
+
+typedef enum {
+  CDC_CONTROL_LINE_STATE_DTR = 0x01,
+  CDC_CONTROL_LINE_STATE_RTS = 0x02,
+} cdc_control_line_state_t;
+
+typedef enum {
+  CDC_LINE_CODING_STOP_BITS_1   = 0, // 1   bit
+  CDC_LINE_CODING_STOP_BITS_1_5 = 1, // 1.5 bits
+  CDC_LINE_CODING_STOP_BITS_2   = 2, // 2   bits
+} cdc_line_coding_stopbits_t;
+
+#define CDC_LINE_CODING_STOP_BITS_TEXT(STOP_BITS) (          \
+  (STOP_BITS) == CDC_LINE_CODING_STOP_BITS_1   ? "1" :       \
+  (STOP_BITS) == CDC_LINE_CODING_STOP_BITS_1_5 ? "1.5" :     \
+  (STOP_BITS) == CDC_LINE_CODING_STOP_BITS_2   ? "2"   : "?" )
+
+// TODO Backward compatible for typos. Maybe removed in the future release
+#define CDC_LINE_CONDING_STOP_BITS_1   CDC_LINE_CODING_STOP_BITS_1
+#define CDC_LINE_CONDING_STOP_BITS_1_5 CDC_LINE_CODING_STOP_BITS_1_5
+#define CDC_LINE_CONDING_STOP_BITS_2   CDC_LINE_CODING_STOP_BITS_2
+
+typedef enum {
+  CDC_LINE_CODING_PARITY_NONE  = 0,
+  CDC_LINE_CODING_PARITY_ODD   = 1,
+  CDC_LINE_CODING_PARITY_EVEN  = 2,
+  CDC_LINE_CODING_PARITY_MARK  = 3,
+  CDC_LINE_CODING_PARITY_SPACE = 4,
+} cdc_line_coding_parity_t;
+
+#define CDC_LINE_CODING_PARITY_CHAR(PARITY) (        \
+  (PARITY) == CDC_LINE_CODING_PARITY_NONE  ? 'N' :     \
+  (PARITY) == CDC_LINE_CODING_PARITY_ODD   ? 'O' :     \
+  (PARITY) == CDC_LINE_CODING_PARITY_EVEN  ? 'E' :     \
+  (PARITY) == CDC_LINE_CODING_PARITY_MARK  ? 'M' :     \
+  (PARITY) == CDC_LINE_CODING_PARITY_SPACE ? 'S' : '?' )
+
+//--------------------------------------------------------------------+
+// Management Element Notification (Notification Endpoint)
+//--------------------------------------------------------------------+
+
+#define CDC_REQ_TYPE_NOTIF 0xA1 ///< Direction IN; Type Class; Recipient Interface
+
+/// 6.3 Notification Codes
+typedef enum {
+  CDC_NOTIF_NETWORK_CONNECTION               = 0x00, // notify the host about network connection status.
+  CDC_NOTIF_RESPONSE_AVAILABLE               = 0x01, // notify the host that a response is available.
+  CDC_NOTIF_AUX_JACK_HOOK_STATE              = 0x08,
+  CDC_NOTIF_RING_DETECT                      = 0x09,
+  CDC_NOTIF_SERIAL_STATE                     = 0x20,
+  CDC_NOTIF_CALL_STATE_CHANGE                = 0x28,
+  CDC_NOTIF_LINE_STATE_CHANGE                = 0x29,
+  CDC_NOTIF_CONNECTION_SPEED_CHANGE          = 0x2A, // notify the host-networking driver that a change in either the upstream or the downstream bit rate of the connection has occurred
+  CDC_NOTIF_MDLM_SEMANTIC_MODEL_NOTIFICATION = 0x40,
+} cdc_notify_request_t;
+
+//--------------------------------------------------------------------+
+// Class Specific Functional Descriptor (Communication Interface)
+//--------------------------------------------------------------------+
+
+// Start of all packed definitions for compiler without per-type packed
+TU_ATTR_PACKED_BEGIN
+TU_ATTR_BIT_FIELD_ORDER_BEGIN
+
+/// Header Functional Descriptor (Communication Interface)
+typedef struct TU_ATTR_PACKED {
+  uint8_t bLength            ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType    ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType one of above CDC_FUNC_DESC_
+  uint16_t bcdCDC            ; ///< CDC release number in Binary-Coded Decimal
+}cdc_desc_func_header_t;
+
+/// Union Functional Descriptor (Communication Interface)
+typedef struct TU_ATTR_PACKED {
+  uint8_t bLength                  ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType          ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType       ; ///< Descriptor SubType one of above CDC_FUCN_DESC_
+  uint8_t bControlInterface        ; ///< Interface number of Communication Interface
+  uint8_t bSubordinateInterface    ; ///< Array of Interface number of Data Interface
+}cdc_desc_func_union_t;
+
+#define cdc_desc_func_union_n_t(no_slave)\
+ struct TU_ATTR_PACKED {                   \
+  uint8_t bLength                         ;\
+  uint8_t bDescriptorType                 ;\
+  uint8_t bDescriptorSubType              ;\
+  uint8_t bControlInterface               ;\
+  uint8_t bSubordinateInterface[no_slave] ;\
+}
+
+/// Country Selection Functional Descriptor (Communication Interface)
+typedef struct TU_ATTR_PACKED {
+  uint8_t bLength             ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType     ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType  ; ///< Descriptor SubType one of above CDC_FUCN_DESC_
+  uint8_t iCountryCodeRelDate ; ///< Index of a string giving the release date for the implemented ISO 3166 Country Codes.
+  uint16_t wCountryCode       ; ///< Country code in the format as defined in [ISO3166], release date as specified inoffset 3 for the first supported country.
+} cdc_desc_func_country_selection_t;
+
+#define cdc_desc_func_country_selection_n_t(no_country) \
+  struct TU_ATTR_PACKED {            \
+  uint8_t bLength                   ;\
+  uint8_t bDescriptorType           ;\
+  uint8_t bDescriptorSubType        ;\
+  uint8_t iCountryCodeRelDate       ;\
+  uint16_t wCountryCode[no_country] ;\
+}
+
+//--------------------------------------------------------------------+
+// PUBLIC SWITCHED TELEPHONE NETWORK (PSTN) SUBCLASS
+//--------------------------------------------------------------------+
+
+/// \brief Call Management Functional Descriptor
+/// \details This functional descriptor describes the processing of calls for the Communications Class interface.
+typedef struct TU_ATTR_PACKED {
+  uint8_t bLength            ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType    ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType one of above CDC_FUCN_DESC_
+
+  struct {
+    uint8_t handle_call    : 1; ///< 0 - Device sends/receives call management information only over the Communications Class interface. 1 - Device can send/receive call management information over a Data Class interface.
+    uint8_t send_recv_call : 1; ///< 0 - Device does not handle call management itself. 1 - Device handles call management itself.
+    uint8_t TU_RESERVED    : 6;
+  } bmCapabilities;
+
+  uint8_t bDataInterface;
+}cdc_desc_func_call_management_t;
+
+typedef struct TU_ATTR_PACKED {
+  uint8_t support_comm_request                    : 1; ///< Device supports the request combination of Set_Comm_Feature, Clear_Comm_Feature, and Get_Comm_Feature.
+  uint8_t support_line_request                    : 1; ///< Device supports the request combination of Set_Line_Coding, Set_Control_Line_State, Get_Line_Coding, and the notification Serial_State.
+  uint8_t support_send_break                      : 1; ///< Device supports the request Send_Break
+  uint8_t support_notification_network_connection : 1; ///< Device supports the notification Network_Connection.
+  uint8_t TU_RESERVED                             : 4;
+}cdc_acm_capability_t;
+
+TU_VERIFY_STATIC(sizeof(cdc_acm_capability_t) == 1, "mostly problem with compiler");
+
+/// Abstract Control Management Functional Descriptor
+/// This functional descriptor describes the commands supported by by the Communications Class interface with SubClass code of \ref CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL
+typedef struct TU_ATTR_PACKED {
+  uint8_t bLength                  ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType          ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType       ; ///< Descriptor SubType one of above CDC_FUCN_DESC_
+  cdc_acm_capability_t bmCapabilities ;
+}cdc_desc_func_acm_t;
+
+/// \brief Direct Line Management Functional Descriptor
+/// \details This functional descriptor describes the commands supported by the Communications Class interface with SubClass code of \ref CDC_FUNC_DESC_DIRECT_LINE_MANAGEMENT
+typedef struct TU_ATTR_PACKED {
+  uint8_t bLength            ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType    ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType one of above CDC_FUCN_DESC_
+  struct {
+    uint8_t require_pulse_setup   : 1; ///< Device requires extra Pulse_Setup request during pulse dialing sequence to disengage holding circuit.
+    uint8_t support_aux_request   : 1; ///< Device supports the request combination of Set_Aux_Line_State, Ring_Aux_Jack, and notification Aux_Jack_Hook_State.
+    uint8_t support_pulse_request : 1; ///< Device supports the request combination of Pulse_Setup, Send_Pulse, and Set_Pulse_Time.
+    uint8_t TU_RESERVED           : 5;
+  } bmCapabilities;
+}cdc_desc_func_direct_line_management_t;
+
+/// \brief Telephone Ringer Functional Descriptor
+/// \details The Telephone Ringer functional descriptor describes the ringer capabilities supported by the Communications Class interface,
+/// with the SubClass code of \ref CDC_COMM_SUBCLASS_TELEPHONE_CONTROL_MODEL
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType    ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType one of above CDC_FUCN_DESC_
+  uint8_t bRingerVolSteps    ;
+  uint8_t bNumRingerPatterns ;
+}cdc_desc_func_telephone_ringer_t;
+
+/// \brief Telephone Operational Modes Functional Descriptor
+/// \details The Telephone Operational Modes functional descriptor describes the operational modes supported by
+/// the Communications Class interface, with the SubClass code of \ref CDC_COMM_SUBCLASS_TELEPHONE_CONTROL_MODEL
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType    ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType one of above CDC_FUCN_DESC_
+  struct {
+    uint8_t simple_mode           : 1;
+    uint8_t standalone_mode       : 1;
+    uint8_t computer_centric_mode : 1;
+    uint8_t TU_RESERVED           : 5;
+  } bmCapabilities;
+}cdc_desc_func_telephone_operational_modes_t;
+
+/// \brief Telephone Call and Line State Reporting Capabilities Descriptor
+/// \details The Telephone Call and Line State Reporting Capabilities functional descriptor describes the abilities of a
+/// telephone device to report optional call and line states.
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bLength            ; ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType    ; ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType ; ///< Descriptor SubType one of above CDC_FUCN_DESC_
+  struct {
+    uint32_t interrupted_dialtone   : 1; ///< 0 : Reports only dialtone (does not differentiate between normal and interrupted dialtone). 1 : Reports interrupted dialtone in addition to normal dialtone
+    uint32_t ringback_busy_fastbusy : 1; ///< 0 : Reports only dialing state. 1 : Reports ringback, busy, and fast busy states.
+    uint32_t caller_id              : 1; ///< 0 : Does not report caller ID. 1 : Reports caller ID information.
+    uint32_t incoming_distinctive   : 1; ///< 0 : Reports only incoming ringing. 1 : Reports incoming distinctive ringing patterns.
+    uint32_t dual_tone_multi_freq   : 1; ///< 0 : Cannot report dual tone multi-frequency (DTMF) digits input remotely over the telephone line. 1 : Can report DTMF digits input remotely over the telephone line.
+    uint32_t line_state_change      : 1; ///< 0 : Does not support line state change notification. 1 : Does support line state change notification
+    uint32_t TU_RESERVED0           : 2;
+    uint32_t TU_RESERVED1           : 16;
+    uint32_t TU_RESERVED2           : 8;
+  } bmCapabilities;
+}cdc_desc_func_telephone_call_state_reporting_capabilities_t;
+
+// TODO remove
+TU_ATTR_ALWAYS_INLINE static inline uint8_t cdc_functional_desc_typeof(uint8_t const * p_desc) {
+  return p_desc[2];
+}
+
+//--------------------------------------------------------------------+
+// Requests
+//--------------------------------------------------------------------+
+typedef struct TU_ATTR_PACKED {
+  uint32_t bit_rate;
+  uint8_t  stop_bits; ///< 0: 1 stop bit - 1: 1.5 stop bits - 2: 2 stop bits
+  uint8_t  parity;    ///< 0: None - 1: Odd - 2: Even - 3: Mark - 4: Space
+  uint8_t  data_bits; ///< can be 5, 6, 7, 8 or 16
+} cdc_line_coding_t;
+
+TU_VERIFY_STATIC(sizeof(cdc_line_coding_t) == 7, "size is not correct");
+
+typedef union TU_ATTR_PACKED {
+  struct TU_ATTR_PACKED {
+    uint8_t dtr : 1;
+    uint8_t rts : 1;
+    uint8_t     : 6;
+  };
+  uint8_t value;
+} cdc_line_control_state_t;
+
+TU_VERIFY_STATIC(sizeof(cdc_line_control_state_t) == 1, "size is not correct");
+
+//--------------------------------------------------------------------+
+// Notifications
+//--------------------------------------------------------------------+
+// PSTN 1.2 section 6.5.4 table 31
+typedef union TU_ATTR_PACKED {
+  struct TU_ATTR_PACKED {
+    uint16_t bRxCarrier  : 1; // DCD
+    uint16_t bTxCarrier  : 1; // DSR
+    uint16_t bBreak      : 1; // Break Detected
+    uint16_t bRingSignal : 1;
+    uint16_t bFraming    : 1;
+    uint16_t bParity     : 1;
+    uint16_t bOverRun    : 1;
+    uint16_t             : 9;
+  };
+  struct TU_ATTR_PACKED {
+    uint16_t dcd : 1;
+    uint16_t dsr : 1;
+    uint16_t brk : 1;
+    uint16_t     :13;
+  };
+  uint16_t value;
+} cdc_notify_uart_state_t;
+
+TU_VERIFY_STATIC(sizeof(cdc_notify_uart_state_t) == 2, "size is not correct");
+
+// CDC 1.2 section 6.3.3 table 21
+typedef struct TU_ATTR_PACKED {
+  uint32_t upstream_bitrate;
+  uint32_t downstream_bitrate;
+} cdc_notify_conn_speed_change_t;
+
+typedef struct TU_ATTR_PACKED {
+  tusb_control_request_t request;
+  union {
+    cdc_notify_uart_state_t serial_state;
+    cdc_notify_conn_speed_change_t conn_speed_change;
+  };
+} cdc_notify_msg_t;
+
+TU_VERIFY_STATIC(sizeof(cdc_notify_msg_t) == 16, "size is not correct");
+
+TU_ATTR_PACKED_END  // End of all packed definitions
+TU_ATTR_BIT_FIELD_ORDER_END
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
+
+/** @} */
@@ -0,0 +1,295 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_CDC_DEVICE_H_
+#define TUSB_CDC_DEVICE_H_
+
+#include "cdc.h"
+
+//--------------------------------------------------------------------+
+// Class Driver Configuration
+//--------------------------------------------------------------------+
+#ifndef CFG_TUD_CDC_NOTIFY
+  #define CFG_TUD_CDC_NOTIFY    0
+#endif
+
+#ifndef CFG_TUD_CDC_TX_BUFSIZE
+  #define CFG_TUD_CDC_TX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
+#endif
+
+#ifndef CFG_TUD_CDC_RX_BUFSIZE
+  #define CFG_TUD_CDC_RX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
+#endif
+
+#if !defined(CFG_TUD_CDC_EP_BUFSIZE) && defined(CFG_TUD_CDC_EPSIZE)
+  #warning CFG_TUD_CDC_EPSIZE is renamed to CFG_TUD_CDC_EP_BUFSIZE, please update to use the new name
+  #define CFG_TUD_CDC_EP_BUFSIZE    CFG_TUD_CDC_EPSIZE
+#endif
+
+#ifndef CFG_TUD_CDC_EP_BUFSIZE
+  #define CFG_TUD_CDC_EP_BUFSIZE    (TUD_OPT_HIGH_SPEED ? 512 : 64)
+#endif
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Driver Configuration
+//--------------------------------------------------------------------+
+typedef struct TU_ATTR_PACKED {
+  bool rx_persistent : 1; // keep rx fifo data even with bus reset or disconnect
+  bool tx_persistent : 1; // keep tx fifo data even with reset or disconnect
+  bool tx_overwritabe_if_not_connected : 1; // if not connected, tx fifo can be overwritten
+} tud_cdc_configure_t;
+TU_VERIFY_STATIC(sizeof(tud_cdc_configure_t) == 1, "size is not correct");
+
+#define TUD_CDC_CONFIGURE_DEFAULT() { \
+  .rx_persistent = false, \
+  .tx_persistent = false, \
+  .tx_overwritabe_if_not_connected = true, \
+}
+
+// Configure CDC driver behavior
+bool tud_cdc_configure(const tud_cdc_configure_t* driver_cfg);
+
+// Backward compatible
+#define tud_cdc_configure_fifo_t tud_cdc_configure_t
+#define tud_cdc_configure_fifo   tud_cdc_configure
+
+//--------------------------------------------------------------------+
+// Application API (Multiple Ports) i.e. CFG_TUD_CDC > 1
+//--------------------------------------------------------------------+
+
+// Check if interface is ready
+bool tud_cdc_n_ready(uint8_t itf);
+
+// Check if terminal is connected to this port
+bool tud_cdc_n_connected(uint8_t itf);
+
+// Get current line state. Bit 0:  DTR (Data Terminal Ready), Bit 1: RTS (Request to Send)
+uint8_t tud_cdc_n_get_line_state(uint8_t itf);
+
+// Get current line encoding: bit rate, stop bits parity etc ..
+void tud_cdc_n_get_line_coding(uint8_t itf, cdc_line_coding_t* coding);
+
+// Set special character that will trigger tud_cdc_rx_wanted_cb() callback on receiving
+void tud_cdc_n_set_wanted_char(uint8_t itf, char wanted);
+
+// Get the number of bytes available for reading
+uint32_t tud_cdc_n_available(uint8_t itf);
+
+// Read received bytes
+uint32_t tud_cdc_n_read(uint8_t itf, void* buffer, uint32_t bufsize);
+
+// Read a byte, return -1 if there is none
+TU_ATTR_ALWAYS_INLINE static inline int32_t tud_cdc_n_read_char(uint8_t itf) {
+  uint8_t ch;
+  return tud_cdc_n_read(itf, &ch, 1) ? (int32_t) ch : -1;
+}
+
+// Clear the received FIFO
+void tud_cdc_n_read_flush(uint8_t itf);
+
+// Get a byte from FIFO without removing it
+bool tud_cdc_n_peek(uint8_t itf, uint8_t* ui8);
+
+// Write bytes to TX FIFO, data may remain in the FIFO for a while
+uint32_t tud_cdc_n_write(uint8_t itf, void const* buffer, uint32_t bufsize);
+
+// Write a byte
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_cdc_n_write_char(uint8_t itf, char ch) {
+  return tud_cdc_n_write(itf, &ch, 1);
+}
+
+// Write a null-terminated string
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_cdc_n_write_str(uint8_t itf, char const* str) {
+  return tud_cdc_n_write(itf, str, strlen(str));
+}
+
+// Force sending data if possible, return number of forced bytes
+uint32_t tud_cdc_n_write_flush(uint8_t itf);
+
+// Return the number of bytes (characters) available for writing to TX FIFO buffer in a single n_write operation.
+uint32_t tud_cdc_n_write_available(uint8_t itf);
+
+// Clear the transmit FIFO
+bool tud_cdc_n_write_clear(uint8_t itf);
+
+
+#if CFG_TUD_CDC_NOTIFY
+bool tud_cdc_n_notify_msg(uint8_t itf, cdc_notify_msg_t *msg);
+
+// Send UART status notification: DCD, DSR etc ..
+TU_ATTR_ALWAYS_INLINE static inline bool tud_cdc_n_notify_uart_state(uint8_t                        itf,
+                                                                     const cdc_notify_uart_state_t *state) {
+  cdc_notify_msg_t notify_msg;
+  notify_msg.request.bmRequestType = CDC_REQ_TYPE_NOTIF;
+  notify_msg.request.bRequest      = CDC_NOTIF_SERIAL_STATE;
+  notify_msg.request.wValue        = 0;
+  notify_msg.request.wIndex        = 0; // filled later
+  notify_msg.request.wLength       = sizeof(cdc_notify_uart_state_t);
+  notify_msg.serial_state          = *state;
+  return tud_cdc_n_notify_msg(itf, &notify_msg);
+}
+
+// Send connection speed change notification
+TU_ATTR_ALWAYS_INLINE static inline bool
+tud_cdc_n_notify_conn_speed_change(uint8_t itf, const cdc_notify_conn_speed_change_t *conn_speed_change) {
+  cdc_notify_msg_t notify_msg;
+  notify_msg.request.bmRequestType = CDC_REQ_TYPE_NOTIF;
+  notify_msg.request.bRequest      = CDC_NOTIF_CONNECTION_SPEED_CHANGE;
+  notify_msg.request.wValue        = 0;
+  notify_msg.request.wIndex        = 0; // filled later
+  notify_msg.request.wLength       = sizeof(cdc_notify_conn_speed_change_t);
+  notify_msg.conn_speed_change     = *conn_speed_change;
+  return tud_cdc_n_notify_msg(itf, &notify_msg);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_cdc_notify_msg(cdc_notify_msg_t *msg) {
+  return tud_cdc_n_notify_msg(0, msg);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_cdc_notify_uart_state(const cdc_notify_uart_state_t* state) {
+ return tud_cdc_n_notify_uart_state(0, state);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_cdc_notify_conn_speed_change(const cdc_notify_conn_speed_change_t* conn_speed_change) {
+  return tud_cdc_n_notify_conn_speed_change(0, conn_speed_change);
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Application API (Single Port)
+//--------------------------------------------------------------------+
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_cdc_ready(void) {
+  return tud_cdc_n_ready(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_cdc_connected(void) {
+  return tud_cdc_n_connected(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tud_cdc_get_line_state(void) {
+  return tud_cdc_n_get_line_state(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tud_cdc_get_line_coding(cdc_line_coding_t* coding) {
+  tud_cdc_n_get_line_coding(0, coding);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tud_cdc_set_wanted_char(char wanted) {
+  tud_cdc_n_set_wanted_char(0, wanted);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_cdc_available(void) {
+  return tud_cdc_n_available(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline int32_t tud_cdc_read_char(void) {
+  return tud_cdc_n_read_char(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_cdc_read(void* buffer, uint32_t bufsize) {
+  return tud_cdc_n_read(0, buffer, bufsize);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tud_cdc_read_flush(void) {
+  tud_cdc_n_read_flush(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_cdc_peek(uint8_t* ui8) {
+  return tud_cdc_n_peek(0, ui8);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_cdc_write_char(char ch) {
+  return tud_cdc_n_write_char(0, ch);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_cdc_write(void const* buffer, uint32_t bufsize) {
+  return tud_cdc_n_write(0, buffer, bufsize);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_cdc_write_str(char const* str) {
+  return tud_cdc_n_write_str(0, str);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_cdc_write_flush(void) {
+  return tud_cdc_n_write_flush(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_cdc_write_available(void) {
+  return tud_cdc_n_write_available(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_cdc_write_clear(void) {
+  return tud_cdc_n_write_clear(0);
+}
+
+//--------------------------------------------------------------------+
+// Application Callback API
+//--------------------------------------------------------------------+
+
+// Invoked when received new data
+void tud_cdc_rx_cb(uint8_t itf);
+
+// Invoked when received `wanted_char`
+void tud_cdc_rx_wanted_cb(uint8_t itf, char wanted_char);
+
+// Invoked when a TX is complete and therefore space becomes available in TX buffer
+void tud_cdc_tx_complete_cb(uint8_t itf);
+
+// Invoked when a notification is sent to host
+void tud_cdc_notify_complete_cb(uint8_t itf);
+
+// Invoked when line state DTR & RTS are changed via SET_CONTROL_LINE_STATE
+void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts);
+
+// Invoked when line coding is change via SET_LINE_CODING
+void tud_cdc_line_coding_cb(uint8_t itf, cdc_line_coding_t const* p_line_coding);
+
+// Invoked when received send break
+// \param[in]  itf  interface for which send break was received.
+// \param[in]  duration_ms  the length of time, in milliseconds, of the break signal. If a value of FFFFh, then the
+//                          device will send a break until another SendBreak request is received with value 0000h.
+void tud_cdc_send_break_cb(uint8_t itf, uint16_t duration_ms);
+
+//--------------------------------------------------------------------+
+// INTERNAL USBD-CLASS DRIVER API
+//--------------------------------------------------------------------+
+void     cdcd_init            (void);
+bool     cdcd_deinit          (void);
+void     cdcd_reset           (uint8_t rhport);
+uint16_t cdcd_open            (uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     cdcd_control_xfer_cb (uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+bool     cdcd_xfer_cb         (uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* TUSB_CDC_DEVICE_H_ */
@@ -0,0 +1,267 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_CDC_HOST_H_
+#define TUSB_CDC_HOST_H_
+
+#include "cdc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Class Driver Configuration
+//--------------------------------------------------------------------+
+
+// RX FIFO size
+#ifndef CFG_TUH_CDC_RX_BUFSIZE
+  #define CFG_TUH_CDC_RX_BUFSIZE TUH_EPSIZE_BULK_MPS
+#endif
+
+// RX Endpoint size
+#ifndef CFG_TUH_CDC_RX_EPSIZE
+  #define CFG_TUH_CDC_RX_EPSIZE TUH_EPSIZE_BULK_MPS
+#endif
+
+// TX FIFO size
+#ifndef CFG_TUH_CDC_TX_BUFSIZE
+  #define CFG_TUH_CDC_TX_BUFSIZE TUH_EPSIZE_BULK_MPS
+#endif
+
+// TX Endpoint size
+#ifndef CFG_TUH_CDC_TX_EPSIZE
+  #define CFG_TUH_CDC_TX_EPSIZE TUH_EPSIZE_BULK_MPS
+#endif
+
+//--------------------------------------------------------------------+
+// Application API
+//--------------------------------------------------------------------+
+
+// Get Interface index from device address + interface number
+// return TUSB_INDEX_INVALID_8 (0xFF) if not found
+uint8_t tuh_cdc_itf_get_index(uint8_t daddr, uint8_t itf_num);
+
+// Get Interface information
+// return true if index is correct and interface is currently mounted
+bool tuh_cdc_itf_get_info(uint8_t idx, tuh_itf_info_t *info);
+
+// Check if an interface is mounted
+bool tuh_cdc_mounted(uint8_t idx);
+
+// Get local (cached) line state
+// This function should return correct values if tuh_cdc_set_control_line_state() / tuh_cdc_get_control_line_state()
+// are invoked previously or CFG_TUH_CDC_LINE_STATE_ON_ENUM is defined.
+bool tuh_cdc_get_control_line_state_local(uint8_t idx, uint16_t *line_state);
+
+// Get current DTR status
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_cdc_get_dtr(uint8_t idx) {
+  uint16_t line_state;
+  TU_VERIFY(tuh_cdc_get_control_line_state_local(idx, &line_state));
+  return (line_state & CDC_CONTROL_LINE_STATE_DTR) != 0;
+}
+
+// Get current RTS status
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_cdc_get_rts(uint8_t idx) {
+  uint16_t line_state;
+  TU_VERIFY(tuh_cdc_get_control_line_state_local(idx, &line_state));
+  return (line_state & CDC_CONTROL_LINE_STATE_RTS) != 0;
+}
+
+// Check if interface is connected (DTR active)
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_cdc_connected(uint8_t idx) {
+  return tuh_cdc_get_dtr(idx);
+}
+
+// Get local (saved/cached) version of line coding.
+// This function should return correct values if tuh_cdc_set_line_coding() / tuh_cdc_get_line_coding()
+// are invoked previously or CFG_TUH_CDC_LINE_CODING_ON_ENUM is defined.
+// NOTE: This function does not make any USB transfer request to device.
+bool tuh_cdc_get_line_coding_local(uint8_t idx, cdc_line_coding_t *line_coding);
+
+#define tuh_cdc_get_local_line_coding tuh_cdc_get_line_coding_local // backward compatibility
+
+//--------------------------------------------------------------------+
+// Write API
+//--------------------------------------------------------------------+
+
+// Get the number of bytes available for writing
+uint32_t tuh_cdc_write_available(uint8_t idx);
+
+// Write to cdc interface
+uint32_t tuh_cdc_write(uint8_t idx, const void *buffer, uint32_t bufsize);
+
+// Force sending data if possible, return number of forced bytes
+uint32_t tuh_cdc_write_flush(uint8_t idx);
+
+// Clear the transmit FIFO
+bool tuh_cdc_write_clear(uint8_t idx);
+
+//--------------------------------------------------------------------+
+// Read API
+//--------------------------------------------------------------------+
+
+// Get the number of bytes available for reading
+uint32_t tuh_cdc_read_available(uint8_t idx);
+
+// Read from cdc interface
+uint32_t tuh_cdc_read(uint8_t idx, void *buffer, uint32_t bufsize);
+
+// Get a byte from RX FIFO without removing it
+bool tuh_cdc_peek(uint8_t idx, uint8_t *ch);
+
+// Clear the received FIFO
+bool tuh_cdc_read_clear(uint8_t idx);
+
+//--------------------------------------------------------------------+
+// Control Request API
+// Each Function will make a USB control transfer request to/from device
+// - If complete_cb is provided, the function will return immediately and invoke
+// the callback when request is complete.
+// - If complete_cb is NULL, the function will block until request is complete.
+// In this case, user_data should be usb_xfer_result_t* to hold the transfer result.
+//--------------------------------------------------------------------+
+
+// Request to Set Control Line State: DTR (bit 0), RTS (bit 1)
+bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Request to Set DTR
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_cdc_set_dtr(uint8_t idx, bool dtr_state, tuh_xfer_cb_t complete_cb,
+                                                         uintptr_t user_data) {
+  cdc_line_control_state_t line_state = {.dtr = dtr_state};
+  line_state.rts                      = tuh_cdc_get_rts(idx);
+  return tuh_cdc_set_control_line_state(idx, line_state.value, complete_cb, user_data);
+}
+
+// Request to Set RTS
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_cdc_set_rts(uint8_t idx, bool rts_state, tuh_xfer_cb_t complete_cb,
+                                                         uintptr_t user_data) {
+  cdc_line_control_state_t line_state = {.rts = rts_state};
+  line_state.dtr                      = tuh_cdc_get_dtr(idx);
+  return tuh_cdc_set_control_line_state(idx, line_state.value, complete_cb, user_data);
+}
+
+// Request to set baudrate
+bool tuh_cdc_set_baudrate(uint8_t idx, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Request to set data format
+bool tuh_cdc_set_data_format(uint8_t idx, uint8_t stop_bits, uint8_t parity, uint8_t data_bits,
+                             tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Request to Set Line Coding = baudrate + data format
+// Note: only implemented by ACM and CH34x, not supported by FTDI and CP210x yet
+bool tuh_cdc_set_line_coding(uint8_t idx, const cdc_line_coding_t *line_coding, tuh_xfer_cb_t complete_cb,
+                             uintptr_t user_data);
+
+// Request to Get Line Coding (ACM only)
+// Should only use if tuh_cdc_set_line_coding() / tuh_cdc_get_line_coding() never got invoked and
+// CFG_TUH_CDC_LINE_CODING_ON_ENUM is not defined
+// bool tuh_cdc_get_line_coding(uint8_t idx, cdc_line_coding_t* coding);
+
+// Connect by set both DTR, RTS
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_cdc_connect(uint8_t idx, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  return tuh_cdc_set_control_line_state(idx, CDC_CONTROL_LINE_STATE_DTR | CDC_CONTROL_LINE_STATE_RTS, complete_cb,
+                                        user_data);
+}
+
+// Disconnect by clear both DTR, RTS
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_cdc_disconnect(uint8_t idx, tuh_xfer_cb_t complete_cb,
+                                                            uintptr_t user_data) {
+  return tuh_cdc_set_control_line_state(idx, 0x00, complete_cb, user_data);
+}
+
+//--------------------------------------------------------------------+
+// Control Request Sync API
+// Each Function will make a USB control transfer request to/from device the function will block until request is
+// complete. The function will return the transfer request result
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_set_control_line_state_sync(uint8_t  idx,
+                                                                                           uint16_t line_state) {
+  TU_API_SYNC(tuh_cdc_set_control_line_state, idx, line_state);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_set_dtr_sync(uint8_t idx, bool dtr_state) {
+  TU_API_SYNC(tuh_cdc_set_dtr, idx, dtr_state);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_set_rts_sync(uint8_t idx, bool rts_state) {
+  TU_API_SYNC(tuh_cdc_set_rts, idx, rts_state);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_set_baudrate_sync(uint8_t idx, uint32_t baudrate) {
+  TU_API_SYNC(tuh_cdc_set_baudrate, idx, baudrate);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_set_data_format_sync(uint8_t idx, uint8_t stop_bits,
+                                                                                    uint8_t parity, uint8_t data_bits) {
+  TU_API_SYNC(tuh_cdc_set_data_format, idx, stop_bits, parity, data_bits);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t
+tuh_cdc_set_line_coding_sync(uint8_t idx, const cdc_line_coding_t *line_coding) {
+  TU_API_SYNC(tuh_cdc_set_line_coding, idx, line_coding);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_connect_sync(uint8_t idx) {
+  TU_API_SYNC(tuh_cdc_connect, idx);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_disconnect_sync(uint8_t idx) {
+  TU_API_SYNC(tuh_cdc_disconnect, idx);
+}
+
+//--------------------------------------------------------------------+
+// CDC APPLICATION CALLBACKS
+//--------------------------------------------------------------------+
+
+// Invoked when a device with CDC interface is mounted
+// idx is index of cdc interface in the internal pool.
+extern void tuh_cdc_mount_cb(uint8_t idx);
+
+// Invoked when a device with CDC interface is unmounted
+extern void tuh_cdc_umount_cb(uint8_t idx);
+
+// Invoked when received new data
+extern void tuh_cdc_rx_cb(uint8_t idx);
+
+// Invoked when a TX is complete and therefore space becomes available in TX buffer
+extern void tuh_cdc_tx_complete_cb(uint8_t idx);
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+bool     cdch_init(void);
+bool     cdch_deinit(void);
+uint16_t cdch_open(uint8_t rhport, uint8_t dev_addr, const tusb_desc_interface_t *itf_desc, uint16_t max_len);
+bool     cdch_set_config(uint8_t dev_addr, uint8_t itf_num);
+bool     cdch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
+void     cdch_close(uint8_t dev_addr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* TUSB_CDC_HOST_H_ */
@@ -0,0 +1,301 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/** \ingroup ClassDriver_CDC Communication Device Class (CDC)
+ * \defgroup CDC_RNDIS Remote Network Driver Interface Specification (RNDIS)
+ *  @{
+ *  \defgroup CDC_RNDIS_Common Common Definitions
+ *  @{ */
+
+#ifndef TUSB_CDC_RNDIS_H_
+#define TUSB_CDC_RNDIS_H_
+
+#include "cdc.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#ifdef __CC_ARM
+#pragma diag_suppress 66 // Suppress Keil warnings #66-D: enumeration value is out of "int" range
+#endif
+
+/// RNDIS Message Types
+typedef enum
+{
+  RNDIS_MSG_PACKET           = 0x00000001UL, ///< The host and device use this to send network data to one another.
+
+  RNDIS_MSG_INITIALIZE       = 0x00000002UL, ///< Sent by the host to initialize the device.
+  RNDIS_MSG_INITIALIZE_CMPLT = 0x80000002UL, ///< Device response to an initialize message.
+
+  RNDIS_MSG_HALT             = 0x00000003UL, ///< Sent by the host to halt the device. This does not have a response. It is optional for the device to send this message to the host.
+
+  RNDIS_MSG_QUERY            = 0x00000004UL, ///< Sent by the host to send a query OID.
+  RNDIS_MSG_QUERY_CMPLT      = 0x80000004UL, ///< Device response to a query OID.
+
+  RNDIS_MSG_SET              = 0x00000005UL, ///< Sent by the host to send a set OID.
+  RNDIS_MSG_SET_CMPLT        = 0x80000005UL, ///< Device response to a set OID.
+
+  RNDIS_MSG_RESET            = 0x00000006UL, ///< Sent by the host to perform a soft reset on the device.
+  RNDIS_MSG_RESET_CMPLT      = 0x80000006UL, ///< Device response to reset message.
+
+  RNDIS_MSG_INDICATE_STATUS  = 0x00000007UL, ///< Sent by the device to indicate its status or an error when an unrecognized message is received.
+
+  RNDIS_MSG_KEEP_ALIVE       = 0x00000008UL, ///< During idle periods, sent every few seconds by the host to check that the device is still responsive. It is optional for the device to send this message to check if the host is active.
+  RNDIS_MSG_KEEP_ALIVE_CMPLT = 0x80000008UL  ///< The device response to a keepalivemessage. The host can respond with this message to a keepalive message from the device when the device implements the optional KeepAliveTimer.
+}rndis_msg_type_t;
+
+/// RNDIS Message Status Values
+typedef enum
+{
+  RNDIS_STATUS_SUCCESS          = 0x00000000UL, ///< Success
+  RNDIS_STATUS_FAILURE          = 0xC0000001UL, ///< Unspecified error
+  RNDIS_STATUS_INVALID_DATA     = 0xC0010015UL, ///< Invalid data error
+  RNDIS_STATUS_NOT_SUPPORTED    = 0xC00000BBUL, ///< Unsupported request error
+  RNDIS_STATUS_MEDIA_CONNECT    = 0x4001000BUL, ///< Device is connected to a network medium.
+  RNDIS_STATUS_MEDIA_DISCONNECT = 0x4001000CUL  ///< Device is disconnected from the medium.
+}rndis_msg_status_t;
+
+#ifdef __CC_ARM
+#pragma diag_default 66 // return Keil 66 to normal severity
+#endif
+
+//--------------------------------------------------------------------+
+// MESSAGE STRUCTURE
+//--------------------------------------------------------------------+
+
+//------------- Initialize -------------//
+/// \brief Initialize Message
+/// \details This message MUST be sent by the host to initialize the device.
+typedef struct {
+  uint32_t type          ; ///< Message type, must be \ref RNDIS_MSG_INITIALIZE
+  uint32_t length        ; ///< Message length in bytes, must be 0x18
+  uint32_t request_id    ; ///< A 32-bit integer value, generated by the host, used to match the host's sent request to the response from the device.
+  uint32_t major_version ; ///< The major version of the RNDIS Protocol implemented by the host.
+  uint32_t minor_version ; ///< The minor version of the RNDIS Protocol implemented by the host
+  uint32_t max_xfer_size ; ///< The maximum size, in bytes, of any single bus data transfer that the host expects to receive from the device.
+}rndis_msg_initialize_t;
+
+/// \brief Initialize Complete Message
+/// \details This message MUST be sent by the device in response to an initialize message.
+typedef struct {
+  uint32_t type                    ; ///< Message Type, must be \ref RNDIS_MSG_INITIALIZE_CMPLT
+  uint32_t length                  ; ///< Message length in bytes, must be 0x30
+  uint32_t request_id              ; ///< A 32-bit integer value from \a request_id field of the \ref rndis_msg_initialize_t to which this message is a response.
+  uint32_t status                  ; ///< The initialization status of the device, has value from \ref rndis_msg_status_t
+  uint32_t major_version           ; ///< the highest-numbered RNDIS Protocol version supported by the device.
+  uint32_t minor_version           ; ///< the highest-numbered RNDIS Protocol version supported by the device.
+  uint32_t device_flags            ; ///< MUST be set to 0x000000010. Other values are reserved for future use.
+  uint32_t medium                  ; ///< is 0x00 for RNDIS_MEDIUM_802_3
+  uint32_t max_packet_per_xfer     ; ///< The maximum number of concatenated \ref RNDIS_MSG_PACKET messages that the device can handle in a single bus transfer to it. This value MUST be at least 1.
+  uint32_t max_xfer_size           ; ///< The maximum size, in bytes, of any single bus data transfer that the device expects to receive from the host.
+  uint32_t packet_alignment_factor ; ///< The byte alignment the device expects for each RNDIS message that is part of a multimessage transfer to it. The value is specified as an exponent of 2; for example, the host uses 2<SUP>{PacketAlignmentFactor}</SUP> as the alignment value.
+  uint32_t reserved[2]             ;
+} rndis_msg_initialize_cmplt_t;
+
+//------------- Query -------------//
+/// \brief Query Message
+/// \details This message MUST be sent by the host to query an OID.
+typedef struct {
+  uint32_t type          ; ///< Message Type, must be \ref RNDIS_MSG_QUERY
+  uint32_t length        ; ///< Message length in bytes, including the header and the \a oid_buffer
+  uint32_t request_id    ; ///< A 32-bit integer value, generated by the host, used to match the host's sent request to the response from the device.
+  uint32_t oid           ; ///< The integer value of the host operating system-defined identifier, for the parameter of the device being queried for.
+  uint32_t buffer_length ; ///< The length, in bytes, of the input data required for the OID query. This MUST be set to 0 when there is no input data associated with the OID.
+  uint32_t buffer_offset ; ///< The offset, in bytes, from the beginning of \a request_id field where the input data for the query is located in the message. This value MUST be set to 0 when there is no input data associated with the OID.
+  uint32_t reserved      ;
+  uint8_t  oid_buffer[]  ; ///< Flexible array contains the input data supplied by the host, required for the OID query request processing by the device, as per the host NDIS specification.
+} rndis_msg_query_t, rndis_msg_set_t;
+
+TU_VERIFY_STATIC(sizeof(rndis_msg_query_t) == 28, "Make sure flexible array member does not affect layout");
+
+/// \brief Query Complete Message
+/// \details This message MUST be sent by the device in response to a query OID message.
+typedef struct {
+  uint32_t type          ; ///< Message Type, must be \ref RNDIS_MSG_QUERY_CMPLT
+  uint32_t length        ; ///< Message length in bytes, including the header and the \a oid_buffer
+  uint32_t request_id    ; ///< A 32-bit integer value from \a request_id field of the \ref rndis_msg_query_t to which this message is a response.
+  uint32_t status        ; ///< The status of processing for the query request, has value from \ref rndis_msg_status_t.
+  uint32_t buffer_length ; ///< The length, in bytes, of the data in the response to the query. This MUST be set to 0 when there is no OIDInputBuffer.
+  uint32_t buffer_offset ; ///< The offset, in bytes, from the beginning of \a request_id field where the response data for the query is located in the message. This MUST be set to 0 when there is no \ref oid_buffer.
+  uint8_t  oid_buffer[]  ; ///< Flexible array member contains the response data to the OID query request as specified by the host.
+} rndis_msg_query_cmplt_t;
+
+TU_VERIFY_STATIC(sizeof(rndis_msg_query_cmplt_t) == 24, "Make sure flexible array member does not affect layout");
+
+//------------- Reset -------------//
+/// \brief Reset Message
+/// \details This message MUST be sent by the host to perform a soft reset on the device.
+typedef struct {
+  uint32_t type     ; ///< Message Type, must be \ref RNDIS_MSG_RESET
+  uint32_t length   ; ///< Message length in bytes, MUST be 0x06
+  uint32_t reserved ;
+} rndis_msg_reset_t;
+
+/// \brief Reset Complete Message
+/// \details This message MUST be sent by the device in response to a reset message.
+typedef struct {
+  uint32_t type             ; ///< Message Type, must be \ref RNDIS_MSG_RESET_CMPLT
+  uint32_t length           ; ///< Message length in bytes, MUST be 0x10
+  uint32_t status           ; ///< The status of processing for the \ref rndis_msg_reset_t, has value from \ref rndis_msg_status_t.
+  uint32_t addressing_reset ; ///< This field indicates whether the addressing information, which is the multicast address list or packet filter, has been lost during the reset operation. This MUST be set to 0x00000001 if the device requires that the host to resend addressing information or MUST be set to zero otherwise.
+} rndis_msg_reset_cmplt_t;
+
+//typedef struct {
+//  uint32_t type;
+//  uint32_t length;
+//  uint32_t status;
+//  uint32_t buffer_length;
+//  uint32_t buffer_offset;
+//  uint32_t diagnostic_status; // optional
+//  uint32_t diagnostic_error_offset; // optional
+//  uint32_t status_buffer[0]; // optional
+//} rndis_msg_indicate_status_t;
+
+/// \brief Keep Alive Message
+/// \details This message MUST be sent by the host to check that device is still responsive. It is optional for the device to send this message to check if the host is active
+typedef struct {
+  uint32_t type       ; ///< Message Type
+  uint32_t length     ; ///< Message length in bytes, MUST be 0x10
+  uint32_t request_id ;
+} rndis_msg_keep_alive_t, rndis_msg_halt_t;
+
+/// \brief Set Complete Message
+/// \brief This message MUST be sent in response to a the request message
+typedef struct {
+  uint32_t type       ; ///< Message Type
+  uint32_t length     ; ///< Message length in bytes, MUST be 0x10
+  uint32_t request_id ; ///< must be the same as requesting message
+  uint32_t status     ; ///< The status of processing for the request message request by the device to which this message is the response.
+} rndis_msg_set_cmplt_t, rndis_msg_keep_alive_cmplt_t;
+
+/// \brief Packet Data Message
+/// \brief This message MUST be used by the host and the device to send network data to one another.
+typedef struct {
+  uint32_t type                          ; ///< Message Type, must be \ref RNDIS_MSG_PACKET
+  uint32_t length                        ; ///< Message length in bytes, The total length of this RNDIS message including the header, payload, and padding.
+  uint32_t data_offset                   ; ///< Specifies the offset, in bytes, from the start of this \a data_offset field of this message to the start of the data. This MUST be an integer multiple of 4.
+  uint32_t data_length                   ; ///< Specifies the number of bytes in the payload of this message.
+  uint32_t out_of_band_data_offet        ; ///< Specifies the offset, in bytes, of the first out-of-band data record from the start of the DataOffset field in this message. MUST be an integer multiple of 4 when out-of-band data is present or set to 0 otherwise. When there are multiple out-ofband data records, each subsequent record MUST immediately follow the previous out-of-band data record.
+  uint32_t out_of_band_data_length       ; ///< Specifies, in bytes, the total length of the out-of-band data.
+  uint32_t num_out_of_band_data_elements ; ///< Specifies the number of out-of-band records in this message.
+  uint32_t per_packet_info_offset        ; ///< Specifies the offset, in bytes, of the start of per-packet-info data record from the start of the \a data_offset field in this message. MUST be an integer multiple of 4 when per-packet-info data record is present or MUST be set to 0 otherwise. When there are multiple per-packet-info data records, each subsequent record MUST immediately follow the previous record.
+  uint32_t per_packet_info_length        ; ///< Specifies, in bytes, the total length of per-packetinformation contained in this message.
+  uint32_t reserved[2]                   ;
+  uint32_t payload[0]                    ; ///< Network data contained in this message.
+
+  // uint8_t  padding[0]
+  // Additional bytes of zeros added at the end of the message to comply with
+  // the internal and external padding requirements. Internal padding SHOULD be as per the
+  // specification of the out-of-band data record and per-packet-info data record. The external
+  //padding size SHOULD be determined based on the PacketAlignmentFactor field specification
+  //in REMOTE_NDIS_INITIALIZE_CMPLT message by the device, when multiple
+  //REMOTE_NDIS_PACKET_MSG messages are bundled together in a single bus-native message.
+  //In this case, all but the very last REMOTE_NDIS_PACKET_MSG MUST respect the
+  //PacketAlignmentFactor field.
+
+  // rndis_msg_packet_t [0] : (optional) more packet if multiple packet per bus transaction is supported
+} rndis_msg_packet_t;
+
+
+typedef struct {
+  uint32_t size    ; ///< Length, in bytes, of this header and appended data and padding. This value MUST be an integer multiple of 4.
+  uint32_t type    ; ///< MUST be as per host operating system specification.
+  uint32_t offset  ; ///< The byte offset from the beginning of this record to the beginning of data.
+  uint32_t data[0] ; ///< Flexible array contains data
+} rndis_msg_out_of_band_data_t, rndis_msg_per_packet_info_t;
+
+//--------------------------------------------------------------------+
+// NDIS Object ID
+//--------------------------------------------------------------------+
+
+/// NDIS Object ID
+typedef enum
+{
+  //------------- General Required OIDs -------------//
+  RNDIS_OID_GEN_SUPPORTED_LIST          = 0x00010101, ///< List of supported OIDs
+  RNDIS_OID_GEN_HARDWARE_STATUS         = 0x00010102, ///< Hardware status
+  RNDIS_OID_GEN_MEDIA_SUPPORTED         = 0x00010103, ///< Media types supported (encoded)
+  RNDIS_OID_GEN_MEDIA_IN_USE            = 0x00010104, ///< Media types in use (encoded)
+  RNDIS_OID_GEN_MAXIMUM_LOOKAHEAD       = 0x00010105, ///<
+  RNDIS_OID_GEN_MAXIMUM_FRAME_SIZE      = 0x00010106, ///< Maximum frame size in bytes
+  RNDIS_OID_GEN_LINK_SPEED              = 0x00010107, ///< Link speed in units of 100 bps
+  RNDIS_OID_GEN_TRANSMIT_BUFFER_SPACE   = 0x00010108, ///< Transmit buffer space
+  RNDIS_OID_GEN_RECEIVE_BUFFER_SPACE    = 0x00010109, ///< Receive buffer space
+  RNDIS_OID_GEN_TRANSMIT_BLOCK_SIZE     = 0x0001010A, ///< Minimum amount of storage, in bytes, that a single packet occupies in the transmit buffer space of the NIC
+  RNDIS_OID_GEN_RECEIVE_BLOCK_SIZE      = 0x0001010B, ///< Amount of storage, in bytes, that a single packet occupies in the receive buffer space of the NIC
+  RNDIS_OID_GEN_VENDOR_ID               = 0x0001010C, ///< Vendor NIC code
+  RNDIS_OID_GEN_VENDOR_DESCRIPTION      = 0x0001010D, ///< Vendor network card description
+  RNDIS_OID_GEN_CURRENT_PACKET_FILTER   = 0x0001010E, ///< Current packet filter (encoded)
+  RNDIS_OID_GEN_CURRENT_LOOKAHEAD       = 0x0001010F, ///< Current lookahead size in bytes
+  RNDIS_OID_GEN_DRIVER_VERSION          = 0x00010110, ///< NDIS version number used by the driver
+  RNDIS_OID_GEN_MAXIMUM_TOTAL_SIZE      = 0x00010111, ///< Maximum total packet length in bytes
+  RNDIS_OID_GEN_PROTOCOL_OPTIONS        = 0x00010112, ///< Optional protocol flags (encoded)
+  RNDIS_OID_GEN_MAC_OPTIONS             = 0x00010113, ///< Optional NIC flags (encoded)
+  RNDIS_OID_GEN_MEDIA_CONNECT_STATUS    = 0x00010114, ///< Whether the NIC is connected to the network
+  RNDIS_OID_GEN_MAXIMUM_SEND_PACKETS    = 0x00010115, ///< The maximum number of send packets the driver can accept per call to its MiniportSendPacketsfunction
+
+  //------------- General Optional OIDs -------------//
+  RNDIS_OID_GEN_VENDOR_DRIVER_VERSION   = 0x00010116, ///< Vendor-assigned version number of the driver
+  RNDIS_OID_GEN_SUPPORTED_GUIDS         = 0x00010117, ///< The custom GUIDs (Globally Unique Identifier) supported by the miniport driver
+  RNDIS_OID_GEN_NETWORK_LAYER_ADDRESSES = 0x00010118, ///< List of network-layer addresses associated with the binding between a transport and the driver
+  RNDIS_OID_GEN_TRANSPORT_HEADER_OFFSET = 0x00010119, ///< Size of packets' additional headers
+  RNDIS_OID_GEN_MEDIA_CAPABILITIES      = 0x00010201, ///<
+  RNDIS_OID_GEN_PHYSICAL_MEDIUM         = 0x00010202, ///< Physical media supported by the miniport driver (encoded)
+
+  //------------- 802.3 Objects (Ethernet) -------------//
+  RNDIS_OID_802_3_PERMANENT_ADDRESS     = 0x01010101, ///< Permanent station address
+  RNDIS_OID_802_3_CURRENT_ADDRESS       = 0x01010102, ///< Current station address
+  RNDIS_OID_802_3_MULTICAST_LIST        = 0x01010103, ///< Current multicast address list
+  RNDIS_OID_802_3_MAXIMUM_LIST_SIZE     = 0x01010104, ///< Maximum size of multicast address list
+} rndis_oid_type_t;
+
+/// RNDIS Packet Filter Bits \ref RNDIS_OID_GEN_CURRENT_PACKET_FILTER.
+typedef enum
+{
+  RNDIS_PACKET_TYPE_DIRECTED              = 0x00000001, ///< Directed packets. Directed packets contain a destination address equal to the station address of the NIC.
+  RNDIS_PACKET_TYPE_MULTICAST             = 0x00000002, ///< Multicast address packets sent to addresses in the multicast address list.
+  RNDIS_PACKET_TYPE_ALL_MULTICAST         = 0x00000004, ///< All multicast address packets, not just the ones enumerated in the multicast address list.
+  RNDIS_PACKET_TYPE_BROADCAST             = 0x00000008, ///< Broadcast packets.
+  RNDIS_PACKET_TYPE_SOURCE_ROUTING        = 0x00000010, ///< All source routing packets. If the protocol driver sets this bit, the NDIS library attempts to act as a source routing bridge.
+  RNDIS_PACKET_TYPE_PROMISCUOUS           = 0x00000020, ///< Specifies all packets regardless of whether VLAN filtering is enabled or not and whether the VLAN identifier matches or not.
+  RNDIS_PACKET_TYPE_SMT                   = 0x00000040, ///< SMT packets that an FDDI NIC receives.
+  RNDIS_PACKET_TYPE_ALL_LOCAL             = 0x00000080, ///< All packets sent by installed protocols and all packets indicated by the NIC that is identified by a given NdisBindingHandle.
+  RNDIS_PACKET_TYPE_GROUP                 = 0x00001000, ///< Packets sent to the current group address.
+  RNDIS_PACKET_TYPE_ALL_FUNCTIONAL        = 0x00002000, ///< All functional address packets, not just the ones in the current functional address.
+  RNDIS_PACKET_TYPE_FUNCTIONAL            = 0x00004000, ///< Functional address packets sent to addresses included in the current functional address.
+  RNDIS_PACKET_TYPE_MAC_FRAME             = 0x00008000, ///< NIC driver frames that a Token Ring NIC receives.
+  RNDIS_PACKET_TYPE_NO_LOCAL              = 0x00010000,
+} rndis_packet_filter_type_t;
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* TUSB_CDC_RNDIS_H_ */
+
+/** @} */
+/** @} */
@@ -0,0 +1,84 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Heiko Kuester
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_CH34X_H
+#define TUSB_CH34X_H
+
+// There is no official documentation for the CH34x (CH340, CH341) chips. Reference can be found
+// - https://github.com/WCHSoftGroup/ch341ser_linux
+// - https://github.com/torvalds/linux/blob/master/drivers/usb/serial/ch341.c
+// - https://github.com/freebsd/freebsd-src/blob/main/sys/dev/usb/serial/uchcom.c
+
+// set line_coding @ enumeration
+#ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
+  #define CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X CFG_TUH_CDC_LINE_CODING_ON_ENUM
+#else // this default is necessary to work properly
+  #define CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X { 9600, CDC_LINE_CONDING_STOP_BITS_1, CDC_LINE_CODING_PARITY_NONE, 8 }
+#endif
+
+// USB requests
+#define CH34X_REQ_READ_VERSION        0x5F // dec  95
+#define CH34X_REQ_WRITE_REG           0x9A // dec 154
+#define CH34X_REQ_READ_REG            0x95 // dec 149
+#define CH34X_REQ_SERIAL_INIT         0xA1 // dec 161
+#define CH34X_REQ_MODEM_CTRL          0xA4 // dev 164
+
+// registers
+#define CH34X_REG_BREAK               0x05
+#define CH34X_REG_PRESCALER           0x12
+#define CH34X_REG_DIVISOR             0x13
+#define CH34X_REG_LCR                 0x18
+#define CH34X_REG_LCR2                0x25
+#define CH34X_REG_MCR_MSR             0x06
+#define CH34X_REG_MCR_MSR2            0x07
+#define CH34X_NBREAK_BITS             0x01
+
+#define CH341_REG_0x0F                0x0F // undocumented register
+#define CH341_REG_0x2C                0x2C // undocumented register
+#define CH341_REG_0x27                0x27 // hardware flow control (cts/rts)
+
+#define CH34X_REG16_DIVISOR_PRESCALER TU_U16(CH34X_REG_DIVISOR, CH34X_REG_PRESCALER)
+#define CH32X_REG16_LCR2_LCR          TU_U16(CH34X_REG_LCR2, CH34X_REG_LCR)
+
+// modem control bits
+#define CH34X_BIT_RTS                 (1 << 6)
+#define CH34X_BIT_DTR                 (1 << 5)
+
+// line control bits
+#define CH34X_LCR_ENABLE_RX           0x80
+#define CH34X_LCR_ENABLE_TX           0x40
+#define CH34X_LCR_MARK_SPACE          0x20
+#define CH34X_LCR_PAR_EVEN            0x10
+#define CH34X_LCR_ENABLE_PAR          0x08
+#define CH34X_LCR_PAR_MASK            0x38 // all parity bits
+#define CH34X_LCR_STOP_BITS_2         0x04
+#define CH34X_LCR_CS8                 0x03
+#define CH34X_LCR_CS7                 0x02
+#define CH34X_LCR_CS6                 0x01
+#define CH34X_LCR_CS5                 0x00
+#define CH34X_LCR_CS_MASK             0x03 // all CSx bits
+
+#endif // TUSB_CH34X_H
@@ -0,0 +1,114 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (thach@tinyusb.org) for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef TUSB_CP210X_H
+#define TUSB_CP210X_H
+
+// Protocol details can be found at AN571: CP210x Virtual COM Port Interface
+// https://www.silabs.com/documents/public/application-notes/AN571.pdf
+
+// parts are overtaken from vendors driver
+// https://www.silabs.com/documents/public/software/cp210x-3.1.0.tar.gz
+
+// Config request codes
+#define CP210X_IFC_ENABLE      0x00
+#define CP210X_SET_BAUDDIV     0x01
+#define CP210X_GET_BAUDDIV     0x02
+#define CP210X_SET_LINE_CTL    0x03 // Set parity, data bits, stop bits
+#define CP210X_GET_LINE_CTL    0x04
+#define CP210X_SET_BREAK       0x05
+#define CP210X_IMM_CHAR        0x06
+#define CP210X_SET_MHS         0x07 // Set DTR, RTS
+#define CP210X_GET_MDMSTS      0x08 // Get modem status (DTR, RTS, CTS, DSR, RI, DCD)
+#define CP210X_SET_XON         0x09
+#define CP210X_SET_XOFF        0x0A
+#define CP210X_SET_EVENTMASK   0x0B
+#define CP210X_GET_EVENTMASK   0x0C
+#define CP210X_SET_CHAR        0x0D
+#define CP210X_GET_CHARS       0x0E
+#define CP210X_GET_PROPS       0x0F
+#define CP210X_GET_COMM_STATUS 0x10
+#define CP210X_RESET           0x11
+#define CP210X_PURGE           0x12
+#define CP210X_SET_FLOW        0x13
+#define CP210X_GET_FLOW        0x14
+#define CP210X_EMBED_EVENTS    0x15
+#define CP210X_GET_EVENTSTATE  0x16
+#define CP210X_SET_CHARS       0x19
+#define CP210X_GET_BAUDRATE    0x1D
+#define CP210X_SET_BAUDRATE    0x1E
+#define CP210X_VENDOR_SPECIFIC 0xFF // GPIO, Recipient must be Device
+
+// SILABSER_IFC_ENABLE_REQUEST_CODE
+#define CP210X_UART_ENABLE              0x0001
+#define CP210X_UART_DISABLE             0x0000
+
+// SILABSER_SET_BAUDDIV_REQUEST_CODE
+#define CP210X_BAUD_RATE_GEN_FREQ     0x384000
+
+// SILABSER_SET_LINE_CTL_REQUEST_CODE
+#define CP210X_BITS_DATA_MASK           0x0f00
+#define CP210X_BITS_DATA_5              0x0500
+#define CP210X_BITS_DATA_6              0x0600
+#define CP210X_BITS_DATA_7              0x0700
+#define CP210X_BITS_DATA_8              0x0800
+#define CP210X_BITS_DATA_9              0x0900
+
+#define CP210X_BITS_PARITY_MASK         0x00f0
+#define CP210X_BITS_PARITY_NONE         0x0000
+#define CP210X_BITS_PARITY_ODD          0x0010
+#define CP210X_BITS_PARITY_EVEN         0x0020
+#define CP210X_BITS_PARITY_MARK         0x0030
+#define CP210X_BITS_PARITY_SPACE        0x0040
+
+#define CP210X_BITS_STOP_MASK           0x000f
+#define CP210X_BITS_STOP_1              0x0000
+#define CP210X_BITS_STOP_1_5            0x0001
+#define CP210X_BITS_STOP_2              0x0002
+
+// SILABSER_SET_BREAK_REQUEST_CODE
+#define CP210X_BREAK_ON                 0x0001
+#define CP210X_BREAK_OFF                0x0000
+
+// SILABSER_SET_MHS_REQUEST_CODE
+#define CP210X_MCR_DTR                  0x0001
+#define CP210X_MCR_RTS                  0x0002
+#define CP210X_MCR_ALL                  0x0003
+#define CP210X_MSR_CTS                  0x0010
+#define CP210X_MSR_DSR                  0x0020
+#define CP210X_MSR_RING                 0x0040
+#define CP210X_MSR_DCD                  0x0080
+#define CP210X_MSR_ALL                  0x00F0
+
+#define CP210X_CONTROL_WRITE_DTR        0x0100UL
+#define CP210X_CONTROL_WRITE_RTS        0x0200UL
+
+#define CP210X_LSR_BREAK                0x0001
+#define CP210X_LSR_FRAMING_ERROR        0x0002
+#define CP210X_LSR_HW_OVERRUN           0x0004
+#define CP210X_LSR_QUEUE_OVERRUN        0x0008
+#define CP210X_LSR_PARITY_ERROR         0x0010
+#define CP210X_LSR_ALL                  0x001F
+
+#endif //TUSB_CP210X_H
@@ -0,0 +1,218 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (thach@tinyusb.org) for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef TUSB_FTDI_SIO_H
+#define TUSB_FTDI_SIO_H
+
+#include <stdint.h>
+
+// Commands
+#define FTDI_SIO_RESET                0 // Reset the port
+#define FTDI_SIO_MODEM_CTRL           1 // Set the modem control register
+#define FTDI_SIO_SET_FLOW_CTRL        2 // Set flow control register
+#define FTDI_SIO_SET_BAUD_RATE        3 // Set baud rate
+#define FTDI_SIO_SET_DATA             4 // Set the data characteristics of the port
+#define FTDI_SIO_GET_MODEM_STATUS     5 // Retrieve current value of modem status register
+#define FTDI_SIO_SET_EVENT_CHAR       6 // Set the event character
+#define FTDI_SIO_SET_ERROR_CHAR       7 // Set the error character
+#define FTDI_SIO_SET_LATENCY_TIMER    9 // Set the latency timer
+#define FTDI_SIO_GET_LATENCY_TIMER   10 // Get the latency timer
+#define FTDI_SIO_SET_BITMODE         11 // Set bitbang mode
+#define FTDI_SIO_READ_PINS           12 // Read immediate value of pins
+#define FTDI_SIO_READ_EEPROM       0x90 // Read EEPROM
+
+// Channel indices for FT2232, FT2232H and FT4232H devices
+#define CHANNEL_A 1
+#define CHANNEL_B 2
+#define CHANNEL_C 3
+#define CHANNEL_D 4
+
+// Port Identifier Table
+#define PIT_DEFAULT  0 // SIOA
+#define PIT_SIOA     1 // SIOA
+// The device this driver is tested with one has only one port
+#define PIT_SIOB     2 // SIOB
+#define PIT_PARALLEL 3 // Parallel
+
+// FTDI_SIO_RESET
+#define FTDI_SIO_RESET_REQUEST                    FTDI_SIO_RESET
+#define FTDI_SIO_RESET_REQUEST_TYPE               0x40
+#define FTDI_SIO_RESET_SIO                        0
+#define FTDI_SIO_RESET_PURGE_RX                   1
+#define FTDI_SIO_RESET_PURGE_TX                   2
+
+// FTDI_SIO_SET_BAUDRATE
+#define FTDI_SIO_SET_BAUDRATE_REQUEST_TYPE        0x40
+#define FTDI_SIO_SET_BAUDRATE_REQUEST             3
+
+enum ftdi_sio_baudrate {
+  ftdi_sio_b300 = 0,
+  ftdi_sio_b600 = 1,
+  ftdi_sio_b1200 = 2,
+  ftdi_sio_b2400 = 3,
+  ftdi_sio_b4800 = 4,
+  ftdi_sio_b9600 = 5,
+  ftdi_sio_b19200 = 6,
+  ftdi_sio_b38400 = 7,
+  ftdi_sio_b57600 = 8,
+  ftdi_sio_b115200 = 9
+};
+
+// FTDI_SIO_SET_DATA
+#define FTDI_SIO_SET_DATA_REQUEST                 FTDI_SIO_SET_DATA
+#define FTDI_SIO_SET_DATA_REQUEST_TYPE            0x40
+#define FTDI_SIO_SET_DATA_PARITY_NONE             (0x0 << 8)
+#define FTDI_SIO_SET_DATA_PARITY_ODD              (0x1 << 8)
+#define FTDI_SIO_SET_DATA_PARITY_EVEN             (0x2 << 8)
+#define FTDI_SIO_SET_DATA_PARITY_MARK             (0x3 << 8)
+#define FTDI_SIO_SET_DATA_PARITY_SPACE            (0x4 << 8)
+#define FTDI_SIO_SET_DATA_STOP_BITS_1             (0x0 << 11) // same coding as ACM
+#define FTDI_SIO_SET_DATA_STOP_BITS_15            (0x1 << 11) // 1.5 not supported, for future use?
+#define FTDI_SIO_SET_DATA_STOP_BITS_2             (0x2 << 11)
+#define FTDI_SIO_SET_BREAK                        (0x1 << 14)
+
+// FTDI_SIO_MODEM_CTRL
+#define FTDI_SIO_SET_MODEM_CTRL_REQUEST_TYPE      0x40
+#define FTDI_SIO_SET_MODEM_CTRL_REQUEST           FTDI_SIO_MODEM_CTRL
+
+#define FTDI_SIO_SET_DTR_MASK                     0x1UL
+#define FTDI_SIO_SET_DTR_HIGH                     ((FTDI_SIO_SET_DTR_MASK << 8) | 1UL)
+#define FTDI_SIO_SET_DTR_LOW                      ((FTDI_SIO_SET_DTR_MASK << 8) | 0UL)
+#define FTDI_SIO_SET_RTS_MASK                     0x2UL
+#define FTDI_SIO_SET_RTS_HIGH                     ((FTDI_SIO_SET_RTS_MASK << 8) | 2UL)
+#define FTDI_SIO_SET_RTS_LOW                      ((FTDI_SIO_SET_RTS_MASK << 8) | 0UL)
+
+// FTDI_SIO_SET_FLOW_CTRL
+#define FTDI_SIO_SET_FLOW_CTRL_REQUEST_TYPE       0x40
+#define FTDI_SIO_SET_FLOW_CTRL_REQUEST            FTDI_SIO_SET_FLOW_CTRL
+#define FTDI_SIO_DISABLE_FLOW_CTRL                0x0
+#define FTDI_SIO_RTS_CTS_HS                       (0x1 << 8)
+#define FTDI_SIO_DTR_DSR_HS                       (0x2 << 8)
+#define FTDI_SIO_XON_XOFF_HS                      (0x4 << 8)
+
+// FTDI_SIO_GET_LATENCY_TIMER
+#define  FTDI_SIO_GET_LATENCY_TIMER_REQUEST       FTDI_SIO_GET_LATENCY_TIMER
+#define  FTDI_SIO_GET_LATENCY_TIMER_REQUEST_TYPE  0xC0
+
+// FTDI_SIO_SET_LATENCY_TIMER
+#define  FTDI_SIO_SET_LATENCY_TIMER_REQUEST       FTDI_SIO_SET_LATENCY_TIMER
+#define  FTDI_SIO_SET_LATENCY_TIMER_REQUEST_TYPE  0x40
+
+// FTDI_SIO_SET_EVENT_CHAR
+#define  FTDI_SIO_SET_EVENT_CHAR_REQUEST          FTDI_SIO_SET_EVENT_CHAR
+#define  FTDI_SIO_SET_EVENT_CHAR_REQUEST_TYPE     0x40
+
+// FTDI_SIO_GET_MODEM_STATUS
+#define FTDI_SIO_GET_MODEM_STATUS_REQUEST_TYPE    0xc0
+#define FTDI_SIO_GET_MODEM_STATUS_REQUEST         FTDI_SIO_GET_MODEM_STATUS
+#define FTDI_SIO_CTS_MASK                         0x10
+#define FTDI_SIO_DSR_MASK                         0x20
+#define FTDI_SIO_RI_MASK                          0x40
+#define FTDI_SIO_RLSD_MASK                        0x80
+
+// FTDI_SIO_SET_BITMODE
+#define FTDI_SIO_SET_BITMODE_REQUEST_TYPE         0x40
+#define FTDI_SIO_SET_BITMODE_REQUEST              FTDI_SIO_SET_BITMODE
+
+// Possible bitmodes for FTDI_SIO_SET_BITMODE_REQUEST
+#define FTDI_SIO_BITMODE_RESET                    0x00
+#define FTDI_SIO_BITMODE_CBUS                     0x20
+
+// FTDI_SIO_READ_PINS
+#define FTDI_SIO_READ_PINS_REQUEST_TYPE           0xc0
+#define FTDI_SIO_READ_PINS_REQUEST                FTDI_SIO_READ_PINS
+
+// FTDI_SIO_READ_EEPROM
+#define FTDI_SIO_READ_EEPROM_REQUEST_TYPE         0xc0
+#define FTDI_SIO_READ_EEPROM_REQUEST              FTDI_SIO_READ_EEPROM
+
+#define FTDI_FTX_CBUS_MUX_GPIO    0x8
+#define FTDI_FT232R_CBUS_MUX_GPIO 0xa
+
+#define FTDI_RS0_CTS  (1 << 4)
+#define FTDI_RS0_DSR  (1 << 5)
+#define FTDI_RS0_RI   (1 << 6)
+#define FTDI_RS0_RLSD (1 << 7)
+
+#define FTDI_RS_DR    1
+#define FTDI_RS_OE    (1 << 1)
+#define FTDI_RS_PE    (1 << 2)
+#define FTDI_RS_FE    (1 << 3)
+#define FTDI_RS_BI    (1 << 4)
+#define FTDI_RS_THRE  (1 << 5)
+#define FTDI_RS_TEMT  (1 << 6)
+#define FTDI_RS_FIFO  (1 << 7)
+
+// chip types and names
+typedef enum ftdi_chip_type {
+  FTDI_SIO = 0,
+//  FTDI_FT232A,
+  FTDI_FT232B,
+  FTDI_FT2232C,
+  FTDI_FT232R,
+  FTDI_FT232H,
+  FTDI_FT2232H,
+  FTDI_FT4232H,
+  FTDI_FT4232HA,
+  FTDI_FT232HP,
+  FTDI_FT233HP,
+  FTDI_FT2232HP,
+  FTDI_FT2233HP,
+  FTDI_FT4232HP,
+  FTDI_FT4233HP,
+  FTDI_FTX,
+  FTDI_UNKNOWN
+} ftdi_chip_type_t;
+
+#define FTDI_CHIP_NAMES \
+  [FTDI_SIO]       = "SIO", /* the serial part of FT8U100AX */ \
+/*  [FTDI_FT232A]    = "FT232A", */ \
+  [FTDI_FT232B]    = "FT232B", \
+  [FTDI_FT2232C]   = "FT2232C/D", \
+  [FTDI_FT232R]    = "FT232R", \
+  [FTDI_FT232H]    = "FT232H", \
+  [FTDI_FT2232H]   = "FTDI_FT2232H", \
+  [FTDI_FT4232H]   = "FT4232H", \
+  [FTDI_FT4232HA]  = "FT4232HA", \
+  [FTDI_FT232HP]   = "FT232HP", \
+  [FTDI_FT233HP]   = "FT233HP", \
+  [FTDI_FT2232HP]  = "FT2232HP", \
+  [FTDI_FT2233HP]  = "FT2233HP", \
+  [FTDI_FT4232HP]  = "FT4232HP", \
+  [FTDI_FT4233HP]  = "FT4233HP", \
+  [FTDI_FTX]       = "FT-X", \
+  [FTDI_UNKNOWN]   = "UNKNOWN"
+
+// private interface data
+typedef struct ftdi_private {
+  ftdi_chip_type_t chip_type;
+  uint8_t channel;                  // channel index, or 0 for legacy types
+} ftdi_private_t;
+
+#define FTDI_OK           true
+#define FTDI_FAIL         false
+#define FTDI_NOT_POSSIBLE -1
+#define FTDI_REQUESTED    -2
+
+#endif //TUSB_FTDI_SIO_H
@@ -0,0 +1,159 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 Heiko Kuester
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_PL2303_H
+#define TUSB_PL2303_H
+
+#include <stdbool.h>
+#include <stdint.h>
+
+// There is no official documentation for the PL2303 chips.
+// Reference can be found
+// - https://github.com/torvalds/linux/blob/master/drivers/usb/serial/pl2303.h and
+//   https://github.com/torvalds/linux/blob/master/drivers/usb/serial/pl2303.c
+// - https://github.com/freebsd/freebsd-src/blob/main/sys/dev/usb/serial/uplcom.c
+
+// quirks
+#define PL2303_QUIRK_UART_STATE_IDX0      1
+#define PL2303_QUIRK_LEGACY               2
+#define PL2303_QUIRK_ENDPOINT_HACK        4
+
+// requests and bits
+#define PL2303_SET_LINE_REQUEST_TYPE      0x21    // class request host to device interface
+#define PL2303_SET_LINE_REQUEST           0x20    // dec 32
+
+#define PL2303_SET_CONTROL_REQUEST_TYPE   0x21    // class request host to device interface
+#define PL2303_SET_CONTROL_REQUEST        0x22    // dec 34
+#define PL2303_CONTROL_DTR                0x01    // dec 1
+#define PL2303_CONTROL_RTS                0x02    // dec 2
+
+#define PL2303_BREAK_REQUEST_TYPE         0x21    // class request host to device interface
+#define PL2303_BREAK_REQUEST              0x23    // dec 35
+#define PL2303_BREAK_ON                   0xffff
+#define PL2303_BREAK_OFF                  0x0000
+
+#define PL2303_GET_LINE_REQUEST_TYPE      0xa1    // class request device to host interface
+#define PL2303_GET_LINE_REQUEST           0x21    // dec 33
+
+#define PL2303_VENDOR_WRITE_REQUEST_TYPE  0x40    // vendor request host to device interface
+#define PL2303_VENDOR_WRITE_REQUEST       0x01    // dec 1
+#define PL2303_VENDOR_WRITE_NREQUEST      0x80    // dec 128
+
+#define PL2303_VENDOR_READ_REQUEST_TYPE   0xc0    // vendor request device to host interface
+#define PL2303_VENDOR_READ_REQUEST        0x01    // dec 1
+#define PL2303_VENDOR_READ_NREQUEST       0x81    // dec 129
+
+#define PL2303_UART_STATE_INDEX           8
+#define PL2303_UART_STATE_MSR_MASK        0x8b
+#define PL2303_UART_STATE_TRANSIENT_MASK  0x74
+#define PL2303_UART_DCD                   0x01
+#define PL2303_UART_DSR                   0x02
+#define PL2303_UART_BREAK_ERROR           0x04
+#define PL2303_UART_RING                  0x08
+#define PL2303_UART_FRAME_ERROR           0x10
+#define PL2303_UART_PARITY_ERROR          0x20
+#define PL2303_UART_OVERRUN_ERROR         0x40
+#define PL2303_UART_CTS                   0x80
+
+#define PL2303_FLOWCTRL_MASK              0xf0
+
+#define PL2303_CLEAR_HALT_REQUEST_TYPE    0x02    // standard request host to device endpoint
+
+// registers via vendor read/write requests
+#define PL2303_READ_TYPE_HX_STATUS        0x8080
+
+#define PL2303_HXN_RESET_REG              0x07
+#define PL2303_HXN_RESET_UPSTREAM_PIPE    0x02
+#define PL2303_HXN_RESET_DOWNSTREAM_PIPE  0x01
+
+#define PL2303_HXN_FLOWCTRL_REG           0x0a
+#define PL2303_HXN_FLOWCTRL_MASK          0x1c
+#define PL2303_HXN_FLOWCTRL_NONE          0x1c
+#define PL2303_HXN_FLOWCTRL_RTS_CTS       0x18
+#define PL2303_HXN_FLOWCTRL_XON_XOFF      0x0c
+
+// type data
+typedef enum pl2303_type {
+  PL2303_TYPE_H = 0, // 0
+  PL2303_TYPE_HX,    // 1
+  PL2303_TYPE_TA,    // 2
+  PL2303_TYPE_TB,    // 3
+  PL2303_TYPE_HXD,   // 4
+  PL2303_TYPE_HXN,   // 5
+  PL2303_TYPE_COUNT,
+  PL2303_TYPE_NEED_SUPPORTS_HX_STATUS,
+  PL2303_TYPE_UNKNOWN,
+} pl2303_type_t;
+
+typedef struct pl2303_type_data {
+  uint32_t max_baud_rate;
+  uint8_t  quirks;
+  uint8_t  no_autoxonxoff : 1;
+  uint8_t  no_divisors    : 1;
+  uint8_t  alt_divisors   : 1;
+} pl2303_type_data_t;
+
+#define PL2303_TYPE_DATA \
+  [PL2303_TYPE_H] = { \
+    .max_baud_rate = 1228800, .quirks = PL2303_QUIRK_LEGACY, \
+    .no_autoxonxoff = 1, .no_divisors = 0, .alt_divisors = 0 \
+  }, \
+  [PL2303_TYPE_HX] = { \
+    .max_baud_rate = 6000000, .quirks = 0, \
+    .no_autoxonxoff = 0, .no_divisors = 0, .alt_divisors = 0 \
+  }, \
+  [PL2303_TYPE_TA] = { \
+    .max_baud_rate = 6000000, .quirks = 0, \
+    .no_autoxonxoff = 0, .no_divisors = 0, .alt_divisors = 1 \
+  }, \
+  [PL2303_TYPE_TB] = { \
+    .max_baud_rate = 12000000, .quirks = 0, \
+    .no_autoxonxoff = 0, .no_divisors = 0, .alt_divisors = 1 \
+  }, \
+  [PL2303_TYPE_HXD] = { \
+    .max_baud_rate = 12000000, .quirks = 0, \
+    .no_autoxonxoff = 0, .no_divisors = 0, .alt_divisors = 0 \
+  }, \
+  [PL2303_TYPE_HXN] = { \
+    .max_baud_rate = 12000000, .quirks = 0, \
+    .no_autoxonxoff = 0, .no_divisors = 1, .alt_divisors = 0 \
+  }
+
+typedef struct TU_ATTR_PACKED {
+  pl2303_type_t type;
+  uint8_t quirks;
+  bool supports_hx_status;
+} pl2303_private_t;
+
+// buffer sizes for line coding data
+#define PL2303_LINE_CODING_BUFSIZE          7
+#define PL2303_LINE_CODING_BAUDRATE_BUFSIZE 4
+
+// bulk endpoints
+#define PL2303_OUT_EP                       0x02
+#define PL2303_IN_EP                        0x83
+
+#endif // TUSB_PL2303_H
@@ -0,0 +1,119 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 XMOS LIMITED
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_DFU_H_
+#define TUSB_DFU_H_
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+  extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Common Definitions
+//--------------------------------------------------------------------+
+
+// DFU Protocol
+typedef enum
+{
+  DFU_PROTOCOL_RT  = 0x01,
+  DFU_PROTOCOL_DFU = 0x02,
+} dfu_protocol_type_t;
+
+// DFU Descriptor Type
+typedef enum
+{
+  DFU_DESC_FUNCTIONAL = 0x21,
+} dfu_descriptor_type_t;
+
+// DFU Requests
+typedef enum {
+  DFU_REQUEST_DETACH         = 0,
+  DFU_REQUEST_DNLOAD         = 1,
+  DFU_REQUEST_UPLOAD         = 2,
+  DFU_REQUEST_GETSTATUS      = 3,
+  DFU_REQUEST_CLRSTATUS      = 4,
+  DFU_REQUEST_GETSTATE       = 5,
+  DFU_REQUEST_ABORT          = 6,
+} dfu_requests_t;
+
+// DFU States
+typedef enum {
+  APP_IDLE                   = 0,
+  APP_DETACH                 = 1,
+  DFU_IDLE                   = 2,
+  DFU_DNLOAD_SYNC            = 3,
+  DFU_DNBUSY                 = 4,
+  DFU_DNLOAD_IDLE            = 5,
+  DFU_MANIFEST_SYNC          = 6,
+  DFU_MANIFEST               = 7,
+  DFU_MANIFEST_WAIT_RESET    = 8,
+  DFU_UPLOAD_IDLE            = 9,
+  DFU_ERROR                  = 10,
+} dfu_state_t;
+
+// DFU Status
+typedef enum {
+  DFU_STATUS_OK               = 0x00,
+  DFU_STATUS_ERR_TARGET       = 0x01,
+  DFU_STATUS_ERR_FILE         = 0x02,
+  DFU_STATUS_ERR_WRITE        = 0x03,
+  DFU_STATUS_ERR_ERASE        = 0x04,
+  DFU_STATUS_ERR_CHECK_ERASED = 0x05,
+  DFU_STATUS_ERR_PROG         = 0x06,
+  DFU_STATUS_ERR_VERIFY       = 0x07,
+  DFU_STATUS_ERR_ADDRESS      = 0x08,
+  DFU_STATUS_ERR_NOTDONE      = 0x09,
+  DFU_STATUS_ERR_FIRMWARE     = 0x0A,
+  DFU_STATUS_ERR_VENDOR       = 0x0B,
+  DFU_STATUS_ERR_USBR         = 0x0C,
+  DFU_STATUS_ERR_POR          = 0x0D,
+  DFU_STATUS_ERR_UNKNOWN      = 0x0E,
+  DFU_STATUS_ERR_STALLEDPKT   = 0x0F,
+} dfu_status_t;
+
+#define DFU_ATTR_CAN_DOWNLOAD              (1u << 0)
+#define DFU_ATTR_CAN_UPLOAD                (1u << 1)
+#define DFU_ATTR_MANIFESTATION_TOLERANT    (1u << 2)
+#define DFU_ATTR_WILL_DETACH               (1u << 3)
+
+// DFU Status Request Payload
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bStatus;
+  uint8_t bwPollTimeout[3];
+  uint8_t bState;
+  uint8_t iString;
+} dfu_status_response_t;
+
+TU_VERIFY_STATIC( sizeof(dfu_status_response_t) == 6, "size is not correct");
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* TUSB_DFU_H_ */
@@ -0,0 +1,99 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 XMOS LIMITED
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_DFU_DEVICE_H_
+#define TUSB_DFU_DEVICE_H_
+
+#include "dfu.h"
+
+#ifdef __cplusplus
+  extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Class Driver Default Configure & Validation
+//--------------------------------------------------------------------+
+
+#if !defined(CFG_TUD_DFU_XFER_BUFSIZE)
+  #error "CFG_TUD_DFU_XFER_BUFSIZE must be defined, it has to be set to the buffer size used in TUD_DFU_DESCRIPTOR"
+#endif
+
+//--------------------------------------------------------------------+
+// Application API
+//--------------------------------------------------------------------+
+
+// Must be called when the application is done with flashing started by
+// tud_dfu_download_cb() and tud_dfu_manifest_cb().
+// status is DFU_STATUS_OK if successful, any other error status will cause state to enter dfuError
+void tud_dfu_finish_flashing(uint8_t status);
+
+//--------------------------------------------------------------------+
+// Application Callback API (weak is optional)
+//--------------------------------------------------------------------+
+
+// Note: alt is used as the partition number, in order to support multiple partitions like FLASH, EEPROM, etc.
+
+// Invoked right before tud_dfu_download_cb() (state=DFU_DNBUSY) or tud_dfu_manifest_cb() (state=DFU_MANIFEST)
+// Application return timeout in milliseconds (bwPollTimeout) for the next download/manifest operation.
+// During this period, USB host won't try to communicate with us.
+uint32_t tud_dfu_get_timeout_cb(uint8_t alt, uint8_t state);
+
+// Invoked when received DFU_DNLOAD (wLength>0) following by DFU_GETSTATUS (state=DFU_DNBUSY) requests
+// This callback could be returned before flashing op is complete (async).
+// Once finished flashing, application must call tud_dfu_finish_flashing()
+void tud_dfu_download_cb (uint8_t alt, uint16_t block_num, uint8_t const *data, uint16_t length);
+
+// Invoked when download process is complete, received DFU_DNLOAD (wLength=0) following by DFU_GETSTATUS (state=Manifest)
+// Application can do checksum, or actual flashing if buffered entire image previously.
+// Once finished flashing, application must call tud_dfu_finish_flashing()
+void tud_dfu_manifest_cb(uint8_t alt);
+
+// Invoked when received DFU_UPLOAD request
+// Application must populate data with up to length bytes and
+// Return the number of written bytes
+uint16_t tud_dfu_upload_cb(uint8_t alt, uint16_t block_num, uint8_t* data, uint16_t length);
+
+// Invoked when a DFU_DETACH request is received
+void tud_dfu_detach_cb(void);
+
+// Invoked when the Host has terminated a download or upload transfer
+void tud_dfu_abort_cb(uint8_t alt);
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void     dfu_moded_init(void);
+bool     dfu_moded_deinit(void);
+void     dfu_moded_reset(uint8_t rhport);
+uint16_t dfu_moded_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* TUSB_DFU_MODE_DEVICE_H_ */
@@ -0,0 +1,55 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Sylvain Munaut <tnt@246tNt.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_DFU_RT_DEVICE_H_
+#define TUSB_DFU_RT_DEVICE_H_
+
+#include "dfu.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Application Callback API (weak is optional)
+//--------------------------------------------------------------------+
+// Invoked when a DFU_DETACH request is received and bitWillDetach is set
+void tud_dfu_runtime_reboot_to_dfu_cb(void);
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void     dfu_rtd_init(void);
+bool     dfu_rtd_deinit(void);
+void     dfu_rtd_reset(uint8_t rhport);
+uint16_t dfu_rtd_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     dfu_rtd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* TUSB_DFU_RT_DEVICE_H_ */
@@ -0,0 +1,673 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_HID_DEVICE_H_
+#define TUSB_HID_DEVICE_H_
+
+#include "hid.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Class Driver Default Configure & Validation
+//--------------------------------------------------------------------+
+
+#if !defined(CFG_TUD_HID_EP_BUFSIZE) & defined(CFG_TUD_HID_BUFSIZE)
+  // TODO warn user to use new name later on
+  // #warning CFG_TUD_HID_BUFSIZE is renamed to CFG_TUD_HID_EP_BUFSIZE, please update to use the new name
+  #define CFG_TUD_HID_EP_BUFSIZE  CFG_TUD_HID_BUFSIZE
+#endif
+
+#ifndef CFG_TUD_HID_EP_BUFSIZE
+  #define CFG_TUD_HID_EP_BUFSIZE     64
+#endif
+
+//--------------------------------------------------------------------+
+// Application API (Multiple Instances) i.e. CFG_TUD_HID > 1
+//--------------------------------------------------------------------+
+
+// Check if the interface is ready to use
+bool tud_hid_n_ready(uint8_t instance);
+
+// Get interface supported protocol (bInterfaceProtocol) check out hid_interface_protocol_enum_t for possible values
+uint8_t tud_hid_n_interface_protocol(uint8_t instance);
+
+// Get current active protocol: HID_PROTOCOL_BOOT (0) or HID_PROTOCOL_REPORT (1)
+uint8_t tud_hid_n_get_protocol(uint8_t instance);
+
+// Send report to host
+bool tud_hid_n_report(uint8_t instance, uint8_t report_id, void const* report, uint16_t len);
+
+// KEYBOARD: convenient helper to send keyboard report if application
+// use template layout report as defined by hid_keyboard_report_t
+bool tud_hid_n_keyboard_report(uint8_t instance, uint8_t report_id, uint8_t modifier, const uint8_t keycode[6]);
+
+// MOUSE: convenient helper to send mouse report if application
+// use template layout report as defined by hid_mouse_report_t
+bool tud_hid_n_mouse_report(uint8_t instance, uint8_t report_id, uint8_t buttons, int8_t x, int8_t y, int8_t vertical, int8_t horizontal);
+
+// ABSOLUTE MOUSE: convenient helper to send absolute mouse report if application
+// use template layout report as defined by hid_abs_mouse_report_t
+bool tud_hid_n_abs_mouse_report(uint8_t instance, uint8_t report_id, uint8_t buttons, int16_t x, int16_t y, int8_t vertical, int8_t horizontal);
+
+// Gamepad: convenient helper to send gamepad report if application
+// use template layout report TUD_HID_REPORT_DESC_GAMEPAD
+bool tud_hid_n_gamepad_report(uint8_t instance, uint8_t report_id, int8_t x, int8_t y, int8_t z, int8_t rz, int8_t rx, int8_t ry, uint8_t hat, uint32_t buttons);
+
+// STYLUS PEN: convenient helper to send absolute stylus pen report if application
+bool tud_hid_n_stylus_report(uint8_t instance, uint8_t report_id, uint8_t attrs, uint16_t x, uint16_t y);
+
+//--------------------------------------------------------------------+
+// Application API (Single Port)
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_hid_ready(void) {
+  return tud_hid_n_ready(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tud_hid_interface_protocol(void) {
+  return tud_hid_n_interface_protocol(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tud_hid_get_protocol(void) {
+  return tud_hid_n_get_protocol(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_hid_report(uint8_t report_id, void const* report, uint16_t len) {
+  return tud_hid_n_report(0, report_id, report, len);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_hid_keyboard_report(uint8_t report_id, uint8_t modifier, const uint8_t keycode[6]) {
+  return tud_hid_n_keyboard_report(0, report_id, modifier, keycode);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_hid_mouse_report(uint8_t report_id, uint8_t buttons, int8_t x, int8_t y, int8_t vertical, int8_t horizontal) {
+  return tud_hid_n_mouse_report(0, report_id, buttons, x, y, vertical, horizontal);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_hid_abs_mouse_report(uint8_t report_id, uint8_t buttons, int16_t x, int16_t y, int8_t vertical, int8_t horizontal) {
+  return tud_hid_n_abs_mouse_report(0, report_id, buttons, x, y, vertical, horizontal);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_hid_gamepad_report(uint8_t report_id, int8_t x, int8_t y, int8_t z, int8_t rz, int8_t rx, int8_t ry, uint8_t hat, uint32_t buttons) {
+  return tud_hid_n_gamepad_report(0, report_id, x, y, z, rz, rx, ry, hat, buttons);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_hid_stylus_report(uint8_t report_id, uint8_t attrs, uint16_t x, uint16_t y) {
+  return tud_hid_n_stylus_report(0, report_id, attrs, x, y);
+}
+
+//--------------------------------------------------------------------+
+// Application Callbacks
+//--------------------------------------------------------------------+
+
+// Invoked when received GET HID REPORT DESCRIPTOR request
+// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
+uint8_t const * tud_hid_descriptor_report_cb(uint8_t instance);
+
+// Invoked when received GET_REPORT control request
+// Application must fill buffer report's content and return its length.
+// Return zero will cause the stack to STALL request
+uint16_t tud_hid_get_report_cb(uint8_t instance, uint8_t report_id, hid_report_type_t report_type, uint8_t* buffer, uint16_t reqlen);
+
+// Invoked when received SET_REPORT control request or
+// received data on OUT endpoint (Report ID = 0, Type = OUTPUT)
+void tud_hid_set_report_cb(uint8_t instance, uint8_t report_id, hid_report_type_t report_type, uint8_t const* buffer, uint16_t bufsize);
+
+// Invoked when received SET_PROTOCOL request
+// protocol is either HID_PROTOCOL_BOOT (0) or HID_PROTOCOL_REPORT (1)
+void tud_hid_set_protocol_cb(uint8_t instance, uint8_t protocol);
+
+// Invoked when received SET_IDLE request. return false will stall the request
+// - Idle Rate = 0 : only send report if there is changes, i.e. skip duplication
+// - Idle Rate > 0 : skip duplication, but send at least 1 report every idle rate (in unit of 4 ms).
+bool tud_hid_set_idle_cb(uint8_t instance, uint8_t idle_rate);
+
+// Invoked when sent REPORT successfully to host
+// Application can use this to send the next report
+// Note: For composite reports, report[0] is report ID
+void tud_hid_report_complete_cb(uint8_t instance, uint8_t const* report, uint16_t len);
+
+// Invoked when a transfer wasn't successful
+void tud_hid_report_failed_cb(uint8_t instance, hid_report_type_t report_type, uint8_t const* report, uint16_t xferred_bytes);
+
+/* --------------------------------------------------------------------+
+ * HID Report Descriptor Template
+ *
+ * Convenient for declaring popular HID device (keyboard, mouse, consumer,
+ * gamepad etc...). Templates take "HID_REPORT_ID(n)" as input, leave
+ * empty if multiple reports is not used
+ *
+ * - Only 1 report: no parameter
+ *      uint8_t const report_desc[] = { TUD_HID_REPORT_DESC_KEYBOARD() };
+ *
+ * - Multiple Reports: "HID_REPORT_ID(ID)" must be passed to template
+ *      uint8_t const report_desc[] =
+ *      {
+ *          TUD_HID_REPORT_DESC_KEYBOARD( HID_REPORT_ID(1) ) ,
+ *          TUD_HID_REPORT_DESC_MOUSE   ( HID_REPORT_ID(2) )
+ *      };
+ *--------------------------------------------------------------------*/
+
+// Keyboard Report Descriptor Template
+#define TUD_HID_REPORT_DESC_KEYBOARD(...) \
+  HID_USAGE_PAGE ( HID_USAGE_PAGE_DESKTOP     )                    ,\
+  HID_USAGE      ( HID_USAGE_DESKTOP_KEYBOARD )                    ,\
+  HID_COLLECTION ( HID_COLLECTION_APPLICATION )                    ,\
+    /* Report ID if any */\
+    __VA_ARGS__ \
+    /* 8 bits Modifier Keys (Shift, Control, Alt) */ \
+    HID_USAGE_PAGE ( HID_USAGE_PAGE_KEYBOARD )                     ,\
+      HID_USAGE_MIN    ( 224                                    )  ,\
+      HID_USAGE_MAX    ( 231                                    )  ,\
+      HID_LOGICAL_MIN  ( 0                                      )  ,\
+      HID_LOGICAL_MAX  ( 1                                      )  ,\
+      HID_REPORT_COUNT ( 8                                      )  ,\
+      HID_REPORT_SIZE  ( 1                                      )  ,\
+      HID_INPUT        ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE )  ,\
+      /* 8 bit reserved */ \
+      HID_REPORT_COUNT ( 1                                      )  ,\
+      HID_REPORT_SIZE  ( 8                                      )  ,\
+      HID_INPUT        ( HID_CONSTANT                           )  ,\
+    /* Output 5-bit LED Indicator Kana | Compose | ScrollLock | CapsLock | NumLock */ \
+    HID_USAGE_PAGE  ( HID_USAGE_PAGE_LED                   )       ,\
+      HID_USAGE_MIN    ( 1                                       ) ,\
+      HID_USAGE_MAX    ( 5                                       ) ,\
+      HID_REPORT_COUNT ( 5                                       ) ,\
+      HID_REPORT_SIZE  ( 1                                       ) ,\
+      HID_OUTPUT       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE  ) ,\
+      /* led padding */ \
+      HID_REPORT_COUNT ( 1                                       ) ,\
+      HID_REPORT_SIZE  ( 3                                       ) ,\
+      HID_OUTPUT       ( HID_CONSTANT                            ) ,\
+    /* 6-byte Keycodes */ \
+    HID_USAGE_PAGE ( HID_USAGE_PAGE_KEYBOARD )                     ,\
+      HID_USAGE_MIN    ( 0                                   )     ,\
+      HID_USAGE_MAX_N  ( 255, 2                              )     ,\
+      HID_LOGICAL_MIN  ( 0                                   )     ,\
+      HID_LOGICAL_MAX_N( 255, 2                              )     ,\
+      HID_REPORT_COUNT ( 6                                   )     ,\
+      HID_REPORT_SIZE  ( 8                                   )     ,\
+      HID_INPUT        ( HID_DATA | HID_ARRAY | HID_ABSOLUTE )     ,\
+  HID_COLLECTION_END \
+
+// Mouse Report Descriptor Template
+#define TUD_HID_REPORT_DESC_MOUSE(...) \
+  HID_USAGE_PAGE ( HID_USAGE_PAGE_DESKTOP      )                   ,\
+  HID_USAGE      ( HID_USAGE_DESKTOP_MOUSE     )                   ,\
+  HID_COLLECTION ( HID_COLLECTION_APPLICATION  )                   ,\
+    /* Report ID if any */\
+    __VA_ARGS__ \
+    HID_USAGE      ( HID_USAGE_DESKTOP_POINTER )                   ,\
+    HID_COLLECTION ( HID_COLLECTION_PHYSICAL   )                   ,\
+      HID_USAGE_PAGE  ( HID_USAGE_PAGE_BUTTON  )                   ,\
+        HID_USAGE_MIN   ( 1                                      ) ,\
+        HID_USAGE_MAX   ( 5                                      ) ,\
+        HID_LOGICAL_MIN ( 0                                      ) ,\
+        HID_LOGICAL_MAX ( 1                                      ) ,\
+        /* Left, Right, Middle, Backward, Forward buttons */ \
+        HID_REPORT_COUNT( 5                                      ) ,\
+        HID_REPORT_SIZE ( 1                                      ) ,\
+        HID_INPUT       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ) ,\
+        /* 3 bit padding */ \
+        HID_REPORT_COUNT( 1                                      ) ,\
+        HID_REPORT_SIZE ( 3                                      ) ,\
+        HID_INPUT       ( HID_CONSTANT                           ) ,\
+      HID_USAGE_PAGE  ( HID_USAGE_PAGE_DESKTOP )                   ,\
+        /* X, Y position [-127, 127] */ \
+        HID_USAGE       ( HID_USAGE_DESKTOP_X                    ) ,\
+        HID_USAGE       ( HID_USAGE_DESKTOP_Y                    ) ,\
+        HID_LOGICAL_MIN ( 0x81                                   ) ,\
+        HID_LOGICAL_MAX ( 0x7f                                   ) ,\
+        HID_REPORT_COUNT( 2                                      ) ,\
+        HID_REPORT_SIZE ( 8                                      ) ,\
+        HID_INPUT       ( HID_DATA | HID_VARIABLE | HID_RELATIVE ) ,\
+        /* Verital wheel scroll [-127, 127] */ \
+        HID_USAGE       ( HID_USAGE_DESKTOP_WHEEL                )  ,\
+        HID_LOGICAL_MIN ( 0x81                                   )  ,\
+        HID_LOGICAL_MAX ( 0x7f                                   )  ,\
+        HID_REPORT_COUNT( 1                                      )  ,\
+        HID_REPORT_SIZE ( 8                                      )  ,\
+        HID_INPUT       ( HID_DATA | HID_VARIABLE | HID_RELATIVE )  ,\
+      HID_USAGE_PAGE  ( HID_USAGE_PAGE_CONSUMER ), \
+       /* Horizontal wheel scroll [-127, 127] */ \
+        HID_USAGE_N     ( HID_USAGE_CONSUMER_AC_PAN, 2           ), \
+        HID_LOGICAL_MIN ( 0x81                                   ), \
+        HID_LOGICAL_MAX ( 0x7f                                   ), \
+        HID_REPORT_COUNT( 1                                      ), \
+        HID_REPORT_SIZE ( 8                                      ), \
+        HID_INPUT       ( HID_DATA | HID_VARIABLE | HID_RELATIVE ), \
+    HID_COLLECTION_END                                            , \
+  HID_COLLECTION_END \
+
+// Stylus Pen Report Descriptor Template
+#define TUD_HID_REPORT_DESC_STYLUS_PEN(...) \
+  HID_USAGE_PAGE ( HID_USAGE_PAGE_DIGITIZER )                     , \
+  HID_USAGE      ( HID_USAGE_DIGITIZER_PEN )                      , \
+  HID_COLLECTION ( HID_COLLECTION_APPLICATION  )                  , \
+    /* Report ID if any */\
+    __VA_ARGS__ \
+    HID_USAGE    ( HID_USAGE_DIGITIZER_STYLUS                    ), \
+    HID_COLLECTION ( HID_COLLECTION_PHYSICAL                     ), \
+        HID_USAGE  ( HID_USAGE_DIGITIZER_TIP_SWITCH              ), \
+        HID_USAGE  ( HID_USAGE_DIGITIZER_IN_RANGE                ), \
+        HID_LOGICAL_MIN ( 0                                      ), \
+        HID_LOGICAL_MAX ( 1                                      ), \
+        HID_REPORT_SIZE ( 1                                      ), \
+        HID_REPORT_COUNT( 2                                      ), \
+        HID_INPUT       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ), \
+        HID_REPORT_SIZE ( 1                                      ), \
+        HID_REPORT_COUNT( 6                                      ), \
+        HID_INPUT       ( HID_CONSTANT | HID_ARRAY | HID_ABSOLUTE), \
+      HID_USAGE_PAGE    ( HID_USAGE_PAGE_DESKTOP                 ), \
+        HID_PHYSICAL_MAX_N( 0x7fff, 2                            ), \
+        HID_LOGICAL_MAX_N ( 0x7fff, 2                            ), \
+        HID_REPORT_SIZE ( 16                                     ), \
+        HID_REPORT_COUNT( 1                                      ), \
+        HID_UNIT_EXPONENT( 0x0f                                  ), \
+        HID_UNIT        ( HID_VARIABLE | HID_NONLINEAR           ), \
+        HID_PHYSICAL_MIN( 0                                      ), \
+        HID_PHYSICAL_MAX( 0                                      ), \
+        HID_USAGE       ( HID_USAGE_DESKTOP_X                    ), \
+        HID_INPUT       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ), \
+        HID_USAGE       ( HID_USAGE_DESKTOP_Y                    ), \
+        HID_INPUT       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ), \
+    HID_COLLECTION_END                                          , \
+  HID_COLLECTION_END \
+
+// Absolute Mouse Report Descriptor Template
+#define TUD_HID_REPORT_DESC_ABSMOUSE(...) \
+  HID_USAGE_PAGE ( HID_USAGE_PAGE_DESKTOP      )                   ,\
+  HID_USAGE      ( HID_USAGE_DESKTOP_MOUSE     )                   ,\
+  HID_COLLECTION ( HID_COLLECTION_APPLICATION  )                   ,\
+    /* Report ID if any */\
+    __VA_ARGS__ \
+    HID_USAGE      ( HID_USAGE_DESKTOP_POINTER )                   ,\
+    HID_COLLECTION ( HID_COLLECTION_PHYSICAL   )                   ,\
+      HID_USAGE_PAGE  ( HID_USAGE_PAGE_BUTTON  )                   ,\
+        HID_USAGE_MIN   ( 1                                      ) ,\
+        HID_USAGE_MAX   ( 5                                      ) ,\
+        HID_LOGICAL_MIN ( 0                                      ) ,\
+        HID_LOGICAL_MAX ( 1                                      ) ,\
+        /* Left, Right, Middle, Backward, Forward buttons */ \
+        HID_REPORT_COUNT( 5                                      ) ,\
+        HID_REPORT_SIZE ( 1                                      ) ,\
+        HID_INPUT       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ) ,\
+        /* 3 bit padding */ \
+        HID_REPORT_COUNT( 1                                      ) ,\
+        HID_REPORT_SIZE ( 3                                      ) ,\
+        HID_INPUT       ( HID_CONSTANT                           ) ,\
+      HID_USAGE_PAGE  ( HID_USAGE_PAGE_DESKTOP )                   ,\
+        /* X, Y absolute position [0, 32767] */ \
+        HID_USAGE       ( HID_USAGE_DESKTOP_X                    ) ,\
+        HID_USAGE       ( HID_USAGE_DESKTOP_Y                    ) ,\
+        HID_LOGICAL_MIN  ( 0x00                                ) ,\
+        HID_LOGICAL_MAX_N( 0x7FFF, 2                           ) ,\
+        HID_REPORT_SIZE  ( 16                                  ) ,\
+        HID_REPORT_COUNT ( 2                                   ) ,\
+        HID_INPUT       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ) ,\
+        /* Vertical wheel scroll [-127, 127] */ \
+        HID_USAGE       ( HID_USAGE_DESKTOP_WHEEL                )  ,\
+        HID_LOGICAL_MIN ( 0x81                                   )  ,\
+        HID_LOGICAL_MAX ( 0x7f                                   )  ,\
+        HID_REPORT_COUNT( 1                                      )  ,\
+        HID_REPORT_SIZE ( 8                                      )  ,\
+        HID_INPUT       ( HID_DATA | HID_VARIABLE | HID_RELATIVE )  ,\
+      HID_USAGE_PAGE  ( HID_USAGE_PAGE_CONSUMER ), \
+       /* Horizontal wheel scroll [-127, 127] */ \
+        HID_USAGE_N     ( HID_USAGE_CONSUMER_AC_PAN, 2           ), \
+        HID_LOGICAL_MIN ( 0x81                                   ), \
+        HID_LOGICAL_MAX ( 0x7f                                   ), \
+        HID_REPORT_COUNT( 1                                      ), \
+        HID_REPORT_SIZE ( 8                                      ), \
+        HID_INPUT       ( HID_DATA | HID_VARIABLE | HID_RELATIVE ), \
+    HID_COLLECTION_END                                            , \
+  HID_COLLECTION_END \
+
+// Consumer Control Report Descriptor Template
+#define TUD_HID_REPORT_DESC_CONSUMER(...) \
+  HID_USAGE_PAGE ( HID_USAGE_PAGE_CONSUMER    )              ,\
+  HID_USAGE      ( HID_USAGE_CONSUMER_CONTROL )              ,\
+  HID_COLLECTION ( HID_COLLECTION_APPLICATION )              ,\
+    /* Report ID if any */\
+    __VA_ARGS__ \
+    HID_LOGICAL_MIN  ( 0x00                                ) ,\
+    HID_LOGICAL_MAX_N( 0x03FF, 2                           ) ,\
+    HID_USAGE_MIN    ( 0x00                                ) ,\
+    HID_USAGE_MAX_N  ( 0x03FF, 2                           ) ,\
+    HID_REPORT_COUNT ( 1                                   ) ,\
+    HID_REPORT_SIZE  ( 16                                  ) ,\
+    HID_INPUT        ( HID_DATA | HID_ARRAY | HID_ABSOLUTE ) ,\
+  HID_COLLECTION_END \
+
+/* System Control Report Descriptor Template
+ * 0x00 - do nothing
+ * 0x01 - Power Off
+ * 0x02 - Standby
+ * 0x03 - Wake Host
+ */
+#define TUD_HID_REPORT_DESC_SYSTEM_CONTROL(...) \
+  HID_USAGE_PAGE ( HID_USAGE_PAGE_DESKTOP           )        ,\
+  HID_USAGE      ( HID_USAGE_DESKTOP_SYSTEM_CONTROL )        ,\
+  HID_COLLECTION ( HID_COLLECTION_APPLICATION       )        ,\
+    /* Report ID if any */\
+    __VA_ARGS__ \
+    /* 2 bit system power control */ \
+    HID_LOGICAL_MIN  ( 1                                   ) ,\
+    HID_LOGICAL_MAX  ( 3                                   ) ,\
+    HID_REPORT_COUNT ( 1                                   ) ,\
+    HID_REPORT_SIZE  ( 2                                   ) ,\
+    HID_USAGE        ( HID_USAGE_DESKTOP_SYSTEM_POWER_DOWN ) ,\
+    HID_USAGE        ( HID_USAGE_DESKTOP_SYSTEM_SLEEP      ) ,\
+    HID_USAGE        ( HID_USAGE_DESKTOP_SYSTEM_WAKE_UP    ) ,\
+    HID_INPUT        ( HID_DATA | HID_ARRAY | HID_ABSOLUTE ) ,\
+    /* 6 bit padding */ \
+    HID_REPORT_COUNT ( 1                                   ) ,\
+    HID_REPORT_SIZE  ( 6                                   ) ,\
+    HID_INPUT        ( HID_CONSTANT                        ) ,\
+  HID_COLLECTION_END \
+
+// Gamepad Report Descriptor Template
+// with 32 buttons, 2 joysticks and 1 hat/dpad with following layout
+// | X | Y | Z | Rz | Rx | Ry (1 byte each) | hat/DPAD (1 byte) | Button Map (4 bytes) |
+#define TUD_HID_REPORT_DESC_GAMEPAD(...) \
+  HID_USAGE_PAGE ( HID_USAGE_PAGE_DESKTOP     )                 ,\
+  HID_USAGE      ( HID_USAGE_DESKTOP_GAMEPAD  )                 ,\
+  HID_COLLECTION ( HID_COLLECTION_APPLICATION )                 ,\
+    /* Report ID if any */\
+    __VA_ARGS__ \
+    /* 8 bit X, Y, Z, Rz, Rx, Ry (min -127, max 127 ) */ \
+    HID_USAGE_PAGE     ( HID_USAGE_PAGE_DESKTOP                 ) ,\
+    HID_USAGE          ( HID_USAGE_DESKTOP_X                    ) ,\
+    HID_USAGE          ( HID_USAGE_DESKTOP_Y                    ) ,\
+    HID_USAGE          ( HID_USAGE_DESKTOP_Z                    ) ,\
+    HID_USAGE          ( HID_USAGE_DESKTOP_RZ                   ) ,\
+    HID_USAGE          ( HID_USAGE_DESKTOP_RX                   ) ,\
+    HID_USAGE          ( HID_USAGE_DESKTOP_RY                   ) ,\
+    HID_LOGICAL_MIN    ( 0x81                                   ) ,\
+    HID_LOGICAL_MAX    ( 0x7f                                   ) ,\
+    HID_REPORT_COUNT   ( 6                                      ) ,\
+    HID_REPORT_SIZE    ( 8                                      ) ,\
+    HID_INPUT          ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ) ,\
+    /* 8 bit DPad/Hat Button Map  */ \
+    HID_USAGE_PAGE     ( HID_USAGE_PAGE_DESKTOP                 ) ,\
+    HID_USAGE          ( HID_USAGE_DESKTOP_HAT_SWITCH           ) ,\
+    HID_LOGICAL_MIN    ( 1                                      ) ,\
+    HID_LOGICAL_MAX    ( 8                                      ) ,\
+    HID_PHYSICAL_MIN   ( 0                                      ) ,\
+    HID_PHYSICAL_MAX_N ( 315, 2                                 ) ,\
+    HID_REPORT_COUNT   ( 1                                      ) ,\
+    HID_REPORT_SIZE    ( 8                                      ) ,\
+    HID_INPUT          ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ) ,\
+    /* 32 bit Button Map */ \
+    HID_USAGE_PAGE     ( HID_USAGE_PAGE_BUTTON                  ) ,\
+    HID_USAGE_MIN      ( 1                                      ) ,\
+    HID_USAGE_MAX      ( 32                                     ) ,\
+    HID_LOGICAL_MIN    ( 0                                      ) ,\
+    HID_LOGICAL_MAX    ( 1                                      ) ,\
+    HID_REPORT_COUNT   ( 32                                     ) ,\
+    HID_REPORT_SIZE    ( 1                                      ) ,\
+    HID_INPUT          ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ) ,\
+  HID_COLLECTION_END \
+
+// FIDO U2F Authenticator Descriptor Template
+// - 1st parameter is report size, which is 64 bytes maximum in U2F
+// - 2nd parameter is HID_REPORT_ID(n) (optional)
+#define TUD_HID_REPORT_DESC_FIDO_U2F(report_size, ...) \
+  HID_USAGE_PAGE_N ( HID_USAGE_PAGE_FIDO, 2                    ) ,\
+  HID_USAGE      ( HID_USAGE_FIDO_U2FHID                       ) ,\
+  HID_COLLECTION ( HID_COLLECTION_APPLICATION                  ) ,\
+    /* Report ID if any */ \
+    __VA_ARGS__ \
+    /* Usage Data In */ \
+    HID_USAGE         ( HID_USAGE_FIDO_DATA_IN                 ) ,\
+    HID_LOGICAL_MIN   ( 0                                      ) ,\
+    HID_LOGICAL_MAX_N ( 0xff, 2                                ) ,\
+    HID_REPORT_SIZE   ( 8                                      ) ,\
+    HID_REPORT_COUNT  ( report_size                            ) ,\
+    HID_INPUT         ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ) ,\
+    /* Usage Data Out */ \
+    HID_USAGE         ( HID_USAGE_FIDO_DATA_OUT                ) ,\
+    HID_LOGICAL_MIN   ( 0                                      ) ,\
+    HID_LOGICAL_MAX_N ( 0xff, 2                                ) ,\
+    HID_REPORT_SIZE   ( 8                                      ) ,\
+    HID_REPORT_COUNT  ( report_size                            ) ,\
+    HID_OUTPUT        ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ) ,\
+  HID_COLLECTION_END \
+
+// HID Generic Input & Output
+// - 1st parameter is report size (mandatory)
+// - 2nd parameter is report id HID_REPORT_ID(n) (optional)
+#define TUD_HID_REPORT_DESC_GENERIC_INOUT(report_size, ...) \
+    HID_USAGE_PAGE_N ( HID_USAGE_PAGE_VENDOR, 2   ),\
+    HID_USAGE        ( 0x01                       ),\
+    HID_COLLECTION   ( HID_COLLECTION_APPLICATION ),\
+      /* Report ID if any */\
+      __VA_ARGS__ \
+      /* Input */ \
+      HID_USAGE       ( 0x02                                   ),\
+      HID_LOGICAL_MIN ( 0x00                                   ),\
+      HID_LOGICAL_MAX_N ( 0xff, 2                              ),\
+      HID_REPORT_SIZE ( 8                                      ),\
+      HID_REPORT_COUNT( report_size                            ),\
+      HID_INPUT       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ),\
+      /* Output */ \
+      HID_USAGE       ( 0x03                                    ),\
+      HID_LOGICAL_MIN ( 0x00                                    ),\
+      HID_LOGICAL_MAX_N ( 0xff, 2                               ),\
+      HID_REPORT_SIZE ( 8                                       ),\
+      HID_REPORT_COUNT( report_size                             ),\
+      HID_OUTPUT      ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE  ),\
+    HID_COLLECTION_END \
+
+// HID Lighting and Illumination Report Descriptor Template
+// - 1st parameter is report id (required)
+//   Creates 6 report ids for lighting HID usages in the following order:
+//     report_id+0: HID_USAGE_LIGHTING_LAMP_ARRAY_ATTRIBUTES_REPORT
+//     report_id+1: HID_USAGE_LIGHTING_LAMP_ATTRIBUTES_REQUEST_REPORT
+//     report_id+2: HID_USAGE_LIGHTING_LAMP_ATTRIBUTES_RESPONSE_REPORT
+//     report_id+3: HID_USAGE_LIGHTING_LAMP_MULTI_UPDATE_REPORT
+//     report_id+4: HID_USAGE_LIGHTING_LAMP_RANGE_UPDATE_REPORT
+//     report_id+5: HID_USAGE_LIGHTING_LAMP_ARRAY_CONTROL_REPORT
+#define TUD_HID_REPORT_DESC_LIGHTING(report_id) \
+  HID_USAGE_PAGE ( HID_USAGE_PAGE_LIGHTING_AND_ILLUMINATION ),\
+  HID_USAGE      ( HID_USAGE_LIGHTING_LAMP_ARRAY            ),\
+  HID_COLLECTION ( HID_COLLECTION_APPLICATION               ),\
+    /* Lamp Array Attributes Report */ \
+    HID_REPORT_ID (report_id                                    ) \
+    HID_USAGE ( HID_USAGE_LIGHTING_LAMP_ARRAY_ATTRIBUTES_REPORT ),\
+    HID_COLLECTION ( HID_COLLECTION_LOGICAL                     ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_LAMP_COUNT                          ),\
+      HID_LOGICAL_MIN   ( 0                                                      ),\
+      HID_LOGICAL_MAX_N ( 65535, 3                                               ),\
+      HID_REPORT_SIZE   ( 16                                                     ),\
+      HID_REPORT_COUNT  ( 1                                                      ),\
+      HID_FEATURE       ( HID_CONSTANT | HID_VARIABLE | HID_ABSOLUTE             ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_BOUNDING_BOX_WIDTH_IN_MICROMETERS   ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_BOUNDING_BOX_HEIGHT_IN_MICROMETERS  ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_BOUNDING_BOX_DEPTH_IN_MICROMETERS   ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_LAMP_ARRAY_KIND                     ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_MIN_UPDATE_INTERVAL_IN_MICROSECONDS ),\
+      HID_LOGICAL_MIN   ( 0                                                      ),\
+      HID_LOGICAL_MAX_N ( 2147483647, 3                                          ),\
+      HID_REPORT_SIZE   ( 32                                                     ),\
+      HID_REPORT_COUNT  ( 5                                                      ),\
+      HID_FEATURE       ( HID_CONSTANT | HID_VARIABLE | HID_ABSOLUTE             ),\
+    HID_COLLECTION_END ,\
+    /* Lamp Attributes Request Report */ \
+    HID_REPORT_ID       ( report_id + 1                                     ) \
+    HID_USAGE           ( HID_USAGE_LIGHTING_LAMP_ATTRIBUTES_REQUEST_REPORT ),\
+    HID_COLLECTION      ( HID_COLLECTION_LOGICAL                            ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_LAMP_ID             ),\
+      HID_LOGICAL_MIN   ( 0                                      ),\
+      HID_LOGICAL_MAX_N ( 65535, 3                               ),\
+      HID_REPORT_SIZE   ( 16                                     ),\
+      HID_REPORT_COUNT  ( 1                                      ),\
+      HID_FEATURE       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ),\
+    HID_COLLECTION_END ,\
+    /* Lamp Attributes Response Report */ \
+    HID_REPORT_ID       ( report_id + 2                                      ) \
+    HID_USAGE           ( HID_USAGE_LIGHTING_LAMP_ATTRIBUTES_RESPONSE_REPORT ),\
+    HID_COLLECTION      ( HID_COLLECTION_LOGICAL                             ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_LAMP_ID                        ),\
+      HID_LOGICAL_MIN   ( 0                                                 ),\
+      HID_LOGICAL_MAX_N ( 65535, 3                                          ),\
+      HID_REPORT_SIZE   ( 16                                                ),\
+      HID_REPORT_COUNT  ( 1                                                 ),\
+      HID_FEATURE       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE            ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_POSITION_X_IN_MICROMETERS      ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_POSITION_Y_IN_MICROMETERS      ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_POSITION_Z_IN_MICROMETERS      ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_UPDATE_LATENCY_IN_MICROSECONDS ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_LAMP_PURPOSES                  ),\
+      HID_LOGICAL_MIN   ( 0                                                 ),\
+      HID_LOGICAL_MAX_N ( 2147483647, 3                                     ),\
+      HID_REPORT_SIZE   ( 32                                                ),\
+      HID_REPORT_COUNT  ( 5                                                 ),\
+      HID_FEATURE       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE            ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_RED_LEVEL_COUNT                ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_GREEN_LEVEL_COUNT              ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_BLUE_LEVEL_COUNT               ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_INTENSITY_LEVEL_COUNT          ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_IS_PROGRAMMABLE                ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_INPUT_BINDING                  ),\
+      HID_LOGICAL_MIN   ( 0                                                 ),\
+      HID_LOGICAL_MAX_N ( 255, 2                                            ),\
+      HID_REPORT_SIZE   ( 8                                                 ),\
+      HID_REPORT_COUNT  ( 6                                                 ),\
+      HID_FEATURE       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE            ),\
+    HID_COLLECTION_END ,\
+    /* Lamp Multi-Update Report */ \
+    HID_REPORT_ID       ( report_id + 3                               ) \
+    HID_USAGE           ( HID_USAGE_LIGHTING_LAMP_MULTI_UPDATE_REPORT ),\
+    HID_COLLECTION      ( HID_COLLECTION_LOGICAL                      ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_LAMP_COUNT               ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_LAMP_UPDATE_FLAGS        ),\
+      HID_LOGICAL_MIN   ( 0                                           ),\
+      HID_LOGICAL_MAX   ( 8                                           ),\
+      HID_REPORT_SIZE   ( 8                                           ),\
+      HID_REPORT_COUNT  ( 2                                           ),\
+      HID_FEATURE       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE      ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_LAMP_ID                  ),\
+      HID_LOGICAL_MIN   ( 0                                           ),\
+      HID_LOGICAL_MAX_N ( 65535, 3                                    ),\
+      HID_REPORT_SIZE   ( 16                                          ),\
+      HID_REPORT_COUNT  ( 8                                           ),\
+      HID_FEATURE       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE      ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_RED_UPDATE_CHANNEL       ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_GREEN_UPDATE_CHANNEL     ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_BLUE_UPDATE_CHANNEL      ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_INTENSITY_UPDATE_CHANNEL ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_RED_UPDATE_CHANNEL       ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_GREEN_UPDATE_CHANNEL     ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_BLUE_UPDATE_CHANNEL      ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_INTENSITY_UPDATE_CHANNEL ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_RED_UPDATE_CHANNEL       ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_GREEN_UPDATE_CHANNEL     ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_BLUE_UPDATE_CHANNEL      ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_INTENSITY_UPDATE_CHANNEL ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_RED_UPDATE_CHANNEL       ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_GREEN_UPDATE_CHANNEL     ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_BLUE_UPDATE_CHANNEL      ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_INTENSITY_UPDATE_CHANNEL ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_RED_UPDATE_CHANNEL       ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_GREEN_UPDATE_CHANNEL     ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_BLUE_UPDATE_CHANNEL      ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_INTENSITY_UPDATE_CHANNEL ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_RED_UPDATE_CHANNEL       ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_GREEN_UPDATE_CHANNEL     ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_BLUE_UPDATE_CHANNEL      ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_INTENSITY_UPDATE_CHANNEL ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_RED_UPDATE_CHANNEL       ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_GREEN_UPDATE_CHANNEL     ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_BLUE_UPDATE_CHANNEL      ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_INTENSITY_UPDATE_CHANNEL ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_RED_UPDATE_CHANNEL       ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_GREEN_UPDATE_CHANNEL     ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_BLUE_UPDATE_CHANNEL      ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_INTENSITY_UPDATE_CHANNEL ),\
+      HID_LOGICAL_MIN   ( 0                                           ),\
+      HID_LOGICAL_MAX_N ( 255, 2                                      ),\
+      HID_REPORT_SIZE   ( 8                                           ),\
+      HID_REPORT_COUNT  ( 32                                          ),\
+      HID_FEATURE       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE      ),\
+    HID_COLLECTION_END ,\
+    /* Lamp Range Update Report */ \
+    HID_REPORT_ID       ( report_id + 4 ) \
+    HID_USAGE           ( HID_USAGE_LIGHTING_LAMP_RANGE_UPDATE_REPORT ),\
+    HID_COLLECTION      ( HID_COLLECTION_LOGICAL                      ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_LAMP_UPDATE_FLAGS        ),\
+      HID_LOGICAL_MIN   ( 0                                           ),\
+      HID_LOGICAL_MAX   ( 8                                           ),\
+      HID_REPORT_SIZE   ( 8                                           ),\
+      HID_REPORT_COUNT  ( 1                                           ),\
+      HID_FEATURE       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE      ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_LAMP_ID_START            ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_LAMP_ID_END              ),\
+      HID_LOGICAL_MIN   ( 0                                           ),\
+      HID_LOGICAL_MAX_N ( 65535, 3                                    ),\
+      HID_REPORT_SIZE   ( 16                                          ),\
+      HID_REPORT_COUNT  ( 2                                           ),\
+      HID_FEATURE       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE      ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_RED_UPDATE_CHANNEL       ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_GREEN_UPDATE_CHANNEL     ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_BLUE_UPDATE_CHANNEL      ),\
+      HID_USAGE         ( HID_USAGE_LIGHTING_INTENSITY_UPDATE_CHANNEL ),\
+      HID_LOGICAL_MIN   ( 0                                           ),\
+      HID_LOGICAL_MAX_N ( 255, 2                                      ),\
+      HID_REPORT_SIZE   ( 8                                           ),\
+      HID_REPORT_COUNT  ( 4                                           ),\
+      HID_FEATURE       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE      ),\
+    HID_COLLECTION_END ,\
+    /* Lamp Array Control Report */ \
+    HID_REPORT_ID      ( report_id + 5                                ) \
+    HID_USAGE          ( HID_USAGE_LIGHTING_LAMP_ARRAY_CONTROL_REPORT ),\
+    HID_COLLECTION     ( HID_COLLECTION_LOGICAL                       ),\
+      HID_USAGE        ( HID_USAGE_LIGHTING_AUTONOMOUS_MODE     ),\
+      HID_LOGICAL_MIN  ( 0                                      ),\
+      HID_LOGICAL_MAX  ( 1                                      ),\
+      HID_REPORT_SIZE  ( 8                                      ),\
+      HID_REPORT_COUNT ( 1                                      ),\
+      HID_FEATURE      ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ),\
+    HID_COLLECTION_END ,\
+  HID_COLLECTION_END \
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void     hidd_init            (void);
+bool     hidd_deinit          (void);
+void     hidd_reset           (uint8_t rhport);
+uint16_t hidd_open            (uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     hidd_control_xfer_cb (uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+bool     hidd_xfer_cb         (uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
@@ -0,0 +1,189 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_HID_HOST_H_
+#define TUSB_HID_HOST_H_
+
+#include "hid.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Class Driver Configuration
+//--------------------------------------------------------------------+
+
+// TODO Highspeed interrupt can be up to 512 bytes
+#ifndef CFG_TUH_HID_EPIN_BUFSIZE
+  #define CFG_TUH_HID_EPIN_BUFSIZE 64
+#endif
+
+#ifndef CFG_TUH_HID_EPOUT_BUFSIZE
+  #define CFG_TUH_HID_EPOUT_BUFSIZE 64
+#endif
+
+
+typedef struct {
+  uint8_t  report_id;
+  uint8_t  usage;
+  uint16_t usage_page;
+
+  // TODO still use the endpoint size for now
+  //  uint8_t in_len;      // length of IN report
+  //  uint8_t out_len;     // length of OUT report
+} tuh_hid_report_info_t;
+
+//--------------------------------------------------------------------+
+// Interface API
+//--------------------------------------------------------------------+
+
+// Get the total number of mounted HID interfaces of a device
+uint8_t tuh_hid_itf_get_count(uint8_t dev_addr);
+
+// Get all mounted interfaces across devices
+uint8_t tuh_hid_itf_get_total_count(void);
+
+// backward compatible rename
+#define tuh_hid_instance_count tuh_hid_itf_get_count
+
+// Get Interface information
+bool tuh_hid_itf_get_info(uint8_t daddr, uint8_t idx, tuh_itf_info_t *itf_info);
+
+// Get Interface index from device address + interface number
+// return TUSB_INDEX_INVALID_8 (0xFF) if not found
+uint8_t tuh_hid_itf_get_index(uint8_t daddr, uint8_t itf_num);
+
+// Get interface supported protocol (bInterfaceProtocol) check out hid_interface_protocol_enum_t for possible values
+uint8_t tuh_hid_interface_protocol(uint8_t dev_addr, uint8_t idx);
+
+// Check if HID interface is mounted
+bool tuh_hid_mounted(uint8_t dev_addr, uint8_t idx);
+
+// Parse report descriptor into array of report_info struct and return number of reports.
+// For complicated report, application should write its own parser.
+TU_ATTR_UNUSED uint8_t tuh_hid_parse_report_descriptor(tuh_hid_report_info_t *reports_info_arr, uint8_t arr_count,
+                                                       const uint8_t *desc_report, uint16_t desc_len);
+
+//--------------------------------------------------------------------+
+// Control Endpoint API
+//--------------------------------------------------------------------+
+
+// Get current protocol: HID_PROTOCOL_BOOT (0) or HID_PROTOCOL_REPORT (1)
+// Note: Device will be initialized in Boot protocol for simplicity.
+//       Application can use set_protocol() to switch back to Report protocol.
+uint8_t tuh_hid_get_protocol(uint8_t dev_addr, uint8_t idx);
+
+// Device by default is enumerated in Boot protocol for simplicity. Application
+// can use this to modify the default protocol for next enumeration.
+void tuh_hid_set_default_protocol(uint8_t protocol);
+
+// Set protocol to HID_PROTOCOL_BOOT (0) or HID_PROTOCOL_REPORT (1)
+// This function is only supported by Boot interface (tuh_n_hid_interface_protocol() != NONE)
+bool tuh_hid_set_protocol(uint8_t dev_addr, uint8_t idx, uint8_t protocol);
+
+// Get Report using control endpoint
+// report_type is either Input, Output or Feature, (value from hid_report_type_t)
+bool tuh_hid_get_report(uint8_t dev_addr, uint8_t idx, uint8_t report_id, uint8_t report_type, void *report,
+                        uint16_t len);
+
+// Set Report using control endpoint
+// report_type is either Input, Output or Feature, (value from hid_report_type_t)
+bool tuh_hid_set_report(uint8_t dev_addr, uint8_t idx, uint8_t report_id, uint8_t report_type, void *report,
+                        uint16_t len);
+
+//--------------------------------------------------------------------+
+// Interrupt Endpoint API
+//--------------------------------------------------------------------+
+
+// Check if HID interface is ready to receive report
+bool tuh_hid_receive_ready(uint8_t dev_addr, uint8_t idx);
+
+// Try to receive next report on Interrupt Endpoint. Immediately return
+// - true If succeeded, tuh_hid_report_received_cb() callback will be invoked when report is available
+// - false if failed to queue the transfer e.g endpoint is busy
+bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t idx);
+
+// Abort receiving report on Interrupt Endpoint
+bool tuh_hid_receive_abort(uint8_t dev_addr, uint8_t idx);
+
+// Check if HID interface is ready to send report
+bool tuh_hid_send_ready(uint8_t dev_addr, uint8_t idx);
+
+// Send report using interrupt endpoint
+// If report_id > 0 (composite), it will be sent as 1st byte, then report contents. Otherwise only report content is
+// sent.
+bool tuh_hid_send_report(uint8_t dev_addr, uint8_t idx, uint8_t report_id, const void *report, uint16_t len);
+
+//--------------------------------------------------------------------+
+// Callbacks (Weak is optional)
+//--------------------------------------------------------------------+
+
+// Invoked when device with hid interface is mounted
+// Report descriptor is also available for use. tuh_hid_parse_report_descriptor()
+// can be used to parse common/simple enough descriptor.
+// Note: if report descriptor length > CFG_TUH_ENUMERATION_BUFSIZE, it will be skipped
+// therefore report_desc = NULL, desc_len = 0
+void tuh_hid_mount_cb(uint8_t dev_addr, uint8_t idx, const uint8_t *report_desc, uint16_t desc_len);
+
+// Invoked when device with hid interface is un-mounted
+void tuh_hid_umount_cb(uint8_t dev_addr, uint8_t idx);
+
+// Invoked when received report from device via interrupt endpoint
+// Note: if there is report ID (composite), it is 1st byte of report
+void tuh_hid_report_received_cb(uint8_t dev_addr, uint8_t idx, const uint8_t *report, uint16_t len);
+
+// Invoked when sent report to device successfully via interrupt endpoint
+void tuh_hid_report_sent_cb(uint8_t dev_addr, uint8_t idx, const uint8_t *report, uint16_t len);
+
+// Invoked when Get Report to device via either control endpoint
+// len = 0 indicate there is error in the transfer e.g stalled response
+void tuh_hid_get_report_complete_cb(uint8_t dev_addr, uint8_t idx, uint8_t report_id, uint8_t report_type,
+                                    uint16_t len);
+
+// Invoked when Sent Report to device via either control endpoint
+// len = 0 indicate there is error in the transfer e.g stalled response
+void tuh_hid_set_report_complete_cb(uint8_t dev_addr, uint8_t idx, uint8_t report_id, uint8_t report_type,
+                                    uint16_t len);
+
+// Invoked when Set Protocol request is complete
+void tuh_hid_set_protocol_complete_cb(uint8_t dev_addr, uint8_t idx, uint8_t protocol);
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+bool     hidh_init(void);
+bool     hidh_deinit(void);
+uint16_t hidh_open(uint8_t rhport, uint8_t dev_addr, const tusb_desc_interface_t *desc_itf, uint16_t max_len);
+bool     hidh_set_config(uint8_t dev_addr, uint8_t itf_num);
+bool     hidh_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
+void     hidh_close(uint8_t dev_addr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* TUSB_HID_HOST_H_ */
@@ -0,0 +1,201 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_MIDI_H_
+#define TUSB_MIDI_H_
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Constants
+//--------------------------------------------------------------------+
+enum {
+  MIDI_VERSION_1_0 = 0x0100,
+  MIDI_VERSION_2_0 = 0x0200,
+};
+
+typedef enum {
+  MIDI_CS_INTERFACE_HEADER    = 0x01,
+  MIDI_CS_INTERFACE_IN_JACK   = 0x02,
+  MIDI_CS_INTERFACE_OUT_JACK  = 0x03,
+  MIDI_CS_INTERFACE_ELEMENT   = 0x04,
+} midi_cs_interface_subtype_t;
+
+typedef enum {
+  MIDI_CS_ENDPOINT_GENERAL = 0x01,
+  MIDI_CS_ENDPOINT_GENERAL_2_0 = 0x02,
+} midi_cs_endpoint_subtype_t;
+
+typedef enum {
+  MIDI_JACK_EMBEDDED = 0x01,
+  MIDI_JACK_EXTERNAL = 0x02
+} midi_jack_type_t;
+
+typedef enum {
+  MIDI_CIN_MISC              = 0,
+  MIDI_CIN_CABLE_EVENT       = 1,
+  MIDI_CIN_SYSCOM_2BYTE      = 2, // 2 byte system common message e.g MTC, SongSelect
+  MIDI_CIN_SYSCOM_3BYTE      = 3, // 3 byte system common message e.g SPP
+  MIDI_CIN_SYSEX_START       = 4, // SysEx starts or continue
+  MIDI_CIN_SYSEX_END_1BYTE   = 5, // SysEx ends with 1 data, or 1 byte system common message
+  MIDI_CIN_SYSEX_END_2BYTE   = 6, // SysEx ends with 2 data
+  MIDI_CIN_SYSEX_END_3BYTE   = 7, // SysEx ends with 3 data
+  MIDI_CIN_NOTE_OFF          = 8,
+  MIDI_CIN_NOTE_ON           = 9,
+  MIDI_CIN_POLY_KEYPRESS     = 10,
+  MIDI_CIN_CONTROL_CHANGE    = 11,
+  MIDI_CIN_PROGRAM_CHANGE    = 12,
+  MIDI_CIN_CHANNEL_PRESSURE  = 13,
+  MIDI_CIN_PITCH_BEND_CHANGE = 14,
+  MIDI_CIN_1BYTE_DATA = 15
+} midi_code_index_number_t;
+
+// MIDI 1.0 status byte
+enum {
+  //------------- System Exclusive -------------//
+  MIDI_STATUS_SYSEX_START                    = 0xF0,
+  MIDI_STATUS_SYSEX_END                      = 0xF7,
+
+  //------------- System Common -------------//
+  MIDI_STATUS_SYSCOM_TIME_CODE_QUARTER_FRAME = 0xF1,
+  MIDI_STATUS_SYSCOM_SONG_POSITION_POINTER   = 0xF2,
+  MIDI_STATUS_SYSCOM_SONG_SELECT             = 0xF3,
+  // F4, F5 is undefined
+  MIDI_STATUS_SYSCOM_TUNE_REQUEST            = 0xF6,
+
+  //------------- System RealTime  -------------//
+  MIDI_STATUS_SYSREAL_TIMING_CLOCK           = 0xF8,
+  // 0xF9 is undefined
+  MIDI_STATUS_SYSREAL_START                  = 0xFA,
+  MIDI_STATUS_SYSREAL_CONTINUE               = 0xFB,
+  MIDI_STATUS_SYSREAL_STOP                   = 0xFC,
+  // 0xFD is undefined
+  MIDI_STATUS_SYSREAL_ACTIVE_SENSING         = 0xFE,
+  MIDI_STATUS_SYSREAL_SYSTEM_RESET           = 0xFF,
+};
+
+enum {
+  MIDI_MAX_DATA_VAL = 0x7F,
+};
+
+//--------------------------------------------------------------------+
+// Class Specific Descriptor
+//--------------------------------------------------------------------+
+
+/// MIDI Interface Header Descriptor
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength;           ///< Size of this descriptor in bytes.
+  uint8_t  bDescriptorType;   ///< must be TUSB_DESC_CS_INTERFACE
+  uint8_t  bDescriptorSubType;///< Descriptor SubType
+  uint16_t bcdMSC;            ///< MidiStreaming SubClass release number in Binary-Coded Decimal
+  uint16_t wTotalLength;
+} midi_desc_header_t;
+TU_VERIFY_STATIC(sizeof(midi_desc_header_t) == 7, "size is not correct");
+
+/// MIDI In Jack Descriptor
+typedef struct TU_ATTR_PACKED {
+  uint8_t bLength;           ///< Size of this descriptor in bytes.
+  uint8_t bDescriptorType;   ///< Descriptor Type, must be Class-Specific
+  uint8_t bDescriptorSubType;///< Descriptor SubType
+  uint8_t bJackType;         ///< Embedded or External
+  uint8_t bJackID;           ///< Unique ID for MIDI IN Jack
+  uint8_t iJack;             ///< string descriptor
+} midi_desc_in_jack_t;
+TU_VERIFY_STATIC(sizeof(midi_desc_in_jack_t) == 6, "size is not correct");
+
+/// MIDI Out Jack Descriptor with multiple input pins
+#define midi_desc_out_jack_n_t(input_num) \
+  struct TU_ATTR_PACKED {                 \
+    uint8_t bLength;                      \
+    uint8_t bDescriptorType;              \
+    uint8_t bDescriptorSubType;           \
+    uint8_t bJackType;                    \
+    uint8_t bJackID;                      \
+    uint8_t bNrInputPins;                 \
+    struct TU_ATTR_PACKED {               \
+      uint8_t baSourceID;                 \
+      uint8_t baSourcePin;                \
+    } input[input_num];                    \
+    uint8_t iJack;                        \
+  }
+
+typedef midi_desc_out_jack_n_t(1)  midi_desc_out_jack_1in_t; // 1 input
+typedef midi_desc_out_jack_1in_t midi_desc_out_jack_t; // backward compatible
+TU_VERIFY_STATIC(sizeof(midi_desc_out_jack_1in_t) == 7 + 2 * 1, "size is not correct");
+
+/// MIDI Element Descriptor with multiple pins
+#define midi_desc_element_n_t(input_num) \
+  struct TU_ATTR_PACKED {       \
+    uint8_t bLength;            \
+    uint8_t bDescriptorType;    \
+    uint8_t bDescriptorSubType; \
+    uint8_t bElementID;         \
+    uint8_t bNrInputPins;       \
+    struct TU_ATTR_PACKED {     \
+        uint8_t baSourceID;     \
+        uint8_t baSourcePin;    \
+    } pins[input_num];          \
+    uint8_t bNrOutputPins;      \
+    uint8_t bInTerminalLink;    \
+    uint8_t bOutTerminalLink;   \
+    uint8_t bElCapsSize;        \
+    uint16_t bmElementCaps;     \
+    uint8_t  iElement;          \
+ }
+
+// This descriptor follows the standard bulk data endpoint descriptor
+#define midi_desc_cs_endpoint_n_t(jack_num) \
+  struct TU_ATTR_PACKED {                   \
+    uint8_t bLength;                        \
+    uint8_t bDescriptorType;                \
+    uint8_t bDescriptorSubType;             \
+    uint8_t bNumEmbMIDIJack;                \
+    uint8_t baAssocJackID[jack_num];        \
+  }
+
+typedef midi_desc_cs_endpoint_n_t() midi_desc_cs_endpoint_t; // empty/flexible jack list
+typedef midi_desc_cs_endpoint_n_t(1) midi_desc_cs_endpoint_1jack_t;
+
+TU_VERIFY_STATIC(sizeof(midi_desc_cs_endpoint_1jack_t) == 4+1, "size is not correct");
+
+//--------------------------------------------------------------------+
+// For Internal Driver Use
+//--------------------------------------------------------------------+
+typedef struct {
+  uint8_t buffer[4];
+  uint8_t index;
+  uint8_t total;
+} midi_driver_stream_t;
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
@@ -0,0 +1,134 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_MIDI_DEVICE_H_
+#define TUSB_MIDI_DEVICE_H_
+
+#include "class/audio/audio.h"
+#include "midi.h"
+
+//--------------------------------------------------------------------+
+// Class Driver Configuration
+//--------------------------------------------------------------------+
+
+#if !defined(CFG_TUD_MIDI_EP_BUFSIZE) && defined(CFG_TUD_MIDI_EPSIZE)
+  #warning CFG_TUD_MIDI_EPSIZE is renamed to CFG_TUD_MIDI_EP_BUFSIZE, please update to use the new name
+  #define CFG_TUD_MIDI_EP_BUFSIZE CFG_TUD_MIDI_EPSIZE
+#endif
+
+#ifndef CFG_TUD_MIDI_EP_BUFSIZE
+  #define CFG_TUD_MIDI_EP_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Application Callback API (optional)
+//--------------------------------------------------------------------+
+void tud_midi_rx_cb(uint8_t itf);
+
+//--------------------------------------------------------------------+
+// Application API (Multiple Interfaces)
+// CFG_TUD_MIDI > 1
+//--------------------------------------------------------------------+
+
+// Check if midi interface is mounted
+bool tud_midi_n_mounted(uint8_t itf);
+
+// Get the number of bytes available for reading
+uint32_t tud_midi_n_available(uint8_t itf, uint8_t cable_num);
+
+// Read byte stream (legacy)
+uint32_t tud_midi_n_stream_read(uint8_t itf, uint8_t cable_num, void *buffer, uint32_t bufsize);
+
+// Write byte Stream (legacy)
+uint32_t tud_midi_n_stream_write(uint8_t itf, uint8_t cable_num, const uint8_t *buffer, uint32_t bufsize);
+
+// Read an event 4-byte packet
+bool tud_midi_n_packet_read(uint8_t itf, uint8_t packet[4]);
+
+// Read multiple event packets, return number of read packets
+uint32_t tud_midi_n_packet_read_n(uint8_t itf, uint8_t packets[], uint32_t max_packets);
+
+// Write an event 4-byte packet
+bool tud_midi_n_packet_write(uint8_t itf, const uint8_t packet[4]);
+
+// Write multiple event packets, return number of written packets
+uint32_t tud_midi_n_packet_write_n(uint8_t itf, const uint8_t packets[], uint32_t n_packets);
+
+//--------------------------------------------------------------------+
+// Application API (Single Interface)
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_midi_mounted(void) {
+  return tud_midi_n_mounted(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_midi_available(void) {
+  return tud_midi_n_available(0, 0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_midi_stream_read(void *buffer, uint32_t bufsize) {
+  return tud_midi_n_stream_read(0, 0, buffer, bufsize);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t
+tud_midi_stream_write(uint8_t cable_num, const uint8_t *buffer, uint32_t bufsize) {
+  return tud_midi_n_stream_write(0, cable_num, buffer, bufsize);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_midi_packet_read(uint8_t packet[4]) {
+  return tud_midi_n_packet_read(0, packet);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_midi_packet_read_n(uint8_t packets[], uint32_t max_packets) {
+  return tud_midi_n_packet_read_n(0, packets, max_packets);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_midi_packet_write(const uint8_t packet[4]) {
+  return tud_midi_n_packet_write(0, packet);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_midi_packet_write_n(const uint8_t packets[], uint32_t n_packets) {
+  return tud_midi_n_packet_write_n(0, packets, n_packets);
+}
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void     midid_init(void);
+bool     midid_deinit(void);
+void     midid_reset(uint8_t rhport);
+uint16_t midid_open(uint8_t rhport, const tusb_desc_interface_t *itf_desc, uint16_t max_len);
+bool     midid_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_request_t *request);
+bool     midid_xfer_cb(uint8_t rhport, uint8_t edpt_addr, xfer_result_t result, uint32_t xferred_bytes);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,191 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_MIDI_HOST_H_
+#define TUSB_MIDI_HOST_H_
+
+#include "class/audio/audio.h"
+#include "midi.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Class Driver Configuration
+//--------------------------------------------------------------------+
+#ifndef CFG_TUH_MIDI_RX_BUFSIZE
+  #define CFG_TUH_MIDI_RX_BUFSIZE TUH_EPSIZE_BULK_MPS
+#endif
+
+#ifndef CFG_TUH_MIDI_TX_BUFSIZE
+  #define CFG_TUH_MIDI_TX_BUFSIZE TUH_EPSIZE_BULK_MPS
+#endif
+
+#ifndef CFG_TUH_MIDI_EP_BUFSIZE
+  #define CFG_TUH_MIDI_EP_BUFSIZE TUH_EPSIZE_BULK_MPS
+#endif
+
+// Enable the MIDI stream read/write API. Some library can work with raw USB MIDI packet
+// Disable this can save driver footprint.
+#ifndef CFG_TUH_MIDI_STREAM_API
+  #define CFG_TUH_MIDI_STREAM_API 1
+#endif
+
+//--------------------------------------------------------------------+
+// Application Types
+//--------------------------------------------------------------------+
+typedef struct {
+  const tusb_desc_interface_t *desc_audio_control;
+  const tusb_desc_interface_t *desc_midi; // start of whole midi interface descriptor
+  uint16_t                     desc_midi_total_len;
+
+  const uint8_t              *desc_header;
+  const uint8_t              *desc_element;
+  const tusb_desc_endpoint_t *desc_epin;  // endpoint IN descriptor, CS_ENDPOINT is right after
+  const tusb_desc_endpoint_t *desc_epout; // endpoint OUT descriptor, CS_ENDPOINT is right after
+
+  uint8_t        jack_num;
+  const uint8_t *desc_jack[32];           // list of jack descriptors (embedded + external)
+} tuh_midi_descriptor_cb_t;
+
+typedef struct {
+  uint8_t daddr;
+  uint8_t bInterfaceNumber; // interface number of MIDI streaming
+  uint8_t rx_cable_count;
+  uint8_t tx_cable_count;
+} tuh_midi_mount_cb_t;
+
+//--------------------------------------------------------------------+
+// Application API
+//--------------------------------------------------------------------+
+
+// Check if MIDI interface is mounted
+bool tuh_midi_mounted(uint8_t idx);
+
+// Get Interface index from device address + interface number
+// return TUSB_INDEX_INVALID_8 (0xFF) if not found
+uint8_t tuh_midi_itf_get_index(uint8_t daddr, uint8_t itf_num);
+
+// Get Interface information
+// return true if index is correct and interface is currently mounted
+bool tuh_midi_itf_get_info(uint8_t idx, tuh_itf_info_t *info);
+
+// return the number of virtual midi cables on the device's IN endpoint
+uint8_t tuh_midi_get_rx_cable_count(uint8_t idx);
+
+// return the number of virtual midi cables on the device's OUT endpoint
+uint8_t tuh_midi_get_tx_cable_count(uint8_t idx);
+
+// return the raw number of bytes available.
+// Note: this is related but not the same as number of stream bytes available.
+uint32_t tuh_midi_read_available(uint8_t idx);
+
+// Send any queued packets to the device if the host hardware is able to do it
+// Returns the number of bytes flushed to the host hardware or 0 if
+// the host hardware is busy or there is nothing in queue to send.
+uint32_t tuh_midi_write_flush(uint8_t idx);
+
+//--------------------------------------------------------------------+
+// Packet API
+//--------------------------------------------------------------------+
+
+// Read all available MIDI packets from the connected device
+// Return number of bytes read (always multiple of 4)
+uint32_t tuh_midi_packet_read_n(uint8_t idx, uint8_t *buffer, uint32_t bufsize);
+
+// Read a raw MIDI packet from the connected device
+// Return true if a packet was returned
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_midi_packet_read(uint8_t idx, uint8_t packet[4]) {
+  return 4 == tuh_midi_packet_read_n(idx, packet, 4);
+}
+
+// Write all 4-byte packets, data is locally buffered and only transferred when buffered bytes
+// reach the endpoint packet size or tuh_midi_write_flush() is called
+uint32_t tuh_midi_packet_write_n(uint8_t idx, const uint8_t *buffer, uint32_t bufsize);
+
+// Write a 4-bytes packet to the device.
+// Returns true if the packet was successfully queued.
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_midi_packet_write(uint8_t idx, const uint8_t packet[4]) {
+  return 4 == tuh_midi_packet_write_n(idx, packet, 4);
+}
+
+//--------------------------------------------------------------------+
+// Stream API
+//--------------------------------------------------------------------+
+#if CFG_TUH_MIDI_STREAM_API
+
+// Queue a message to the device using stream API. data is locally buffered and only transferred when buffered bytes
+// reach the endpoint packet size or tuh_midi_write_flush() is called
+// Returns number of bytes was successfully queued.
+uint32_t tuh_midi_stream_write(uint8_t idx, uint8_t cable_num, const uint8_t *p_buffer, uint32_t bufsize);
+
+// Get the MIDI stream from the device. Set the value pointed
+// to by p_cable_num to the MIDI cable number intended to receive it.
+// The MIDI stream will be stored in the buffer pointed to by p_buffer.
+// Return the number of bytes added to the buffer.
+// Note that this function ignores the CIN field of the MIDI packet
+// because a number of commercial devices out there do not encode
+// it properly.
+uint32_t tuh_midi_stream_read(uint8_t idx, uint8_t *p_cable_num, uint8_t *p_buffer, uint16_t bufsize);
+
+#endif
+
+//--------------------------------------------------------------------+
+// Callbacks (Weak is optional)
+//--------------------------------------------------------------------+
+
+// Invoked when MIDI interface is detected in enumeration. Application can copy/parse descriptor if needed.
+// Note: may be fired before tuh_midi_mount_cb(), therefore midi interface is not mounted/ready.
+void tuh_midi_descriptor_cb(uint8_t idx, const tuh_midi_descriptor_cb_t *desc_cb_data);
+
+// Invoked when device with MIDI interface is mounted.
+void tuh_midi_mount_cb(uint8_t idx, const tuh_midi_mount_cb_t *mount_cb_data);
+
+// Invoked when device with MIDI interface is un-mounted
+void tuh_midi_umount_cb(uint8_t idx);
+
+// Invoked when received new data
+void tuh_midi_rx_cb(uint8_t idx, uint32_t xferred_bytes);
+
+// Invoked when a TX is complete and therefore space becomes available in TX buffer
+void tuh_midi_tx_cb(uint8_t idx, uint32_t xferred_bytes);
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+bool     midih_init(void);
+bool     midih_deinit(void);
+uint16_t midih_open(uint8_t rhport, uint8_t dev_addr, const tusb_desc_interface_t *desc_itf, uint16_t max_len);
+bool     midih_set_config(uint8_t dev_addr, uint8_t itf_num);
+bool     midih_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
+void     midih_close(uint8_t daddr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,401 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_MSC_H_
+#define TUSB_MSC_H_
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Mass Storage Class Constant
+//--------------------------------------------------------------------+
+/// MassStorage Subclass
+typedef enum
+{
+  MSC_SUBCLASS_RBC = 1 , ///< Reduced Block Commands (RBC) T10 Project 1240-D
+  MSC_SUBCLASS_SFF_MMC , ///< SFF-8020i, MMC-2 (ATAPI). Typically used by a CD/DVD device
+  MSC_SUBCLASS_QIC     , ///< QIC-157. Typically used by a tape device
+  MSC_SUBCLASS_UFI     , ///< UFI. Typically used by Floppy Disk Drive (FDD) device
+  MSC_SUBCLASS_SFF     , ///< SFF-8070i. Can be used by Floppy Disk Drive (FDD) device
+  MSC_SUBCLASS_SCSI      ///< SCSI transparent command set
+}msc_subclass_type_t;
+
+enum {
+  MSC_CBW_SIGNATURE = 0x43425355, ///< Constant value of 43425355h (little endian)
+  MSC_CSW_SIGNATURE = 0x53425355  ///< Constant value of 53425355h (little endian)
+};
+
+/// \brief MassStorage Protocol.
+/// \details CBI only approved to use with full-speed floppy disk & should not used with highspeed or device other than floppy
+typedef enum
+{
+  MSC_PROTOCOL_CBI              = 0 ,  ///< Control/Bulk/Interrupt protocol (with command completion interrupt)
+  MSC_PROTOCOL_CBI_NO_INTERRUPT = 1 ,  ///< Control/Bulk/Interrupt protocol (without command completion interrupt)
+  MSC_PROTOCOL_BOT              = 0x50 ///< Bulk-Only Transport
+}msc_protocol_type_t;
+
+/// MassStorage Class-Specific Control Request
+typedef enum
+{
+  MSC_REQ_GET_MAX_LUN = 254, ///< The Get Max LUN device request is used to determine the number of logical units supported by the device. Logical Unit Numbers on the device shall be numbered contiguously starting from LUN 0 to a maximum LUN of 15
+  MSC_REQ_RESET       = 255  ///< This request is used to reset the mass storage device and its associated interface. This class-specific request shall ready the device for the next CBW from the host.
+}msc_request_type_t;
+
+/// \brief Command Block Status Values
+/// \details Indicates the success or failure of the command. The device shall set this byte to zero if the command completed
+/// successfully. A non-zero value shall indicate a failure during command execution according to the following
+typedef enum
+{
+  MSC_CSW_STATUS_PASSED = 0 , ///< MSC_CSW_STATUS_PASSED
+  MSC_CSW_STATUS_FAILED     , ///< MSC_CSW_STATUS_FAILED
+  MSC_CSW_STATUS_PHASE_ERROR  ///< MSC_CSW_STATUS_PHASE_ERROR
+}msc_csw_status_t;
+
+/// Command Block Wrapper
+typedef struct TU_ATTR_PACKED
+{
+  uint32_t signature;   ///< Signature that helps identify this data packet as a CBW. The signature field shall contain the value 43425355h (little endian), indicating a CBW.
+  uint32_t tag;         ///< Tag sent by the host. The device shall echo the contents of this field back to the host in the dCSWTagfield of the associated CSW. The dCSWTagpositively associates a CSW with the corresponding CBW.
+  uint32_t total_bytes; ///< The number of bytes of data that the host expects to transfer on the Bulk-In or Bulk-Out endpoint (as indicated by the Direction bit) during the execution of this command. If this field is zero, the device and the host shall transfer no data between the CBW and the associated CSW, and the device shall ignore the value of the Direction bit in bmCBWFlags.
+  uint8_t dir;          ///< Bit 7 of this field define transfer direction \n - 0 : Data-Out from host to the device. \n - 1 : Data-In from the device to the host.
+  uint8_t lun;          ///< The device Logical Unit Number (LUN) to which the command block is being sent. For devices that support multiple LUNs, the host shall place into this field the LUN to which this command block is addressed. Otherwise, the host shall set this field to zero.
+  uint8_t cmd_len;      ///< The valid length of the CBWCBin bytes. This defines the valid length of the command block. The only legal values are 1 through 16
+  uint8_t command[16];  ///< The command block to be executed by the device. The device shall interpret the first cmd_len bytes in this field as a command block
+}msc_cbw_t;
+
+TU_VERIFY_STATIC(sizeof(msc_cbw_t) == 31, "size is not correct");
+
+/// Command Status Wrapper
+typedef struct TU_ATTR_PACKED
+{
+  uint32_t signature    ; ///< Signature that helps identify this data packet as a CSW. The signature field shall contain the value 53425355h (little endian), indicating CSW.
+  uint32_t tag          ; ///< The device shall set this field to the value received in the dCBWTag of the associated CBW.
+  uint32_t data_residue ; ///< For Data-Out the device shall report in the dCSWDataResidue the difference between the amount of data expected as stated in the dCBWDataTransferLength, and the actual amount of data processed by the device. For Data-In the device shall report in the dCSWDataResiduethe difference between the amount of data expected as stated in the dCBWDataTransferLengthand the actual amount of relevant data sent by the device
+  uint8_t  status       ; ///< indicates the success or failure of the command. Values from \ref msc_csw_status_t
+}msc_csw_t;
+
+TU_VERIFY_STATIC(sizeof(msc_csw_t) == 13, "size is not correct");
+
+//--------------------------------------------------------------------+
+// SCSI Constant
+//--------------------------------------------------------------------+
+
+/// SCSI Command Operation Code
+typedef enum {
+  SCSI_CMD_TEST_UNIT_READY              = 0x00, ///< The SCSI Test Unit Ready command is used to determine if a device is ready to transfer data (read/write), i.e. if a disk has spun up, if a tape is loaded and ready etc. The device does not perform a self-test operation.
+  SCSI_CMD_INQUIRY                      = 0x12, ///< The SCSI Inquiry command is used to obtain basic information from a target device.
+  SCSI_CMD_MODE_SELECT_6                = 0x15, ///<  provides a means for the application client to specify medium, logical unit, or peripheral device parameters to the device server. Device servers that implement the MODE SELECT(6) command shall also implement the MODE SENSE(6) command. Application clients should issue MODE SENSE(6) prior to each MODE SELECT(6) to determine supported mode pages, page lengths, and other parameters.
+  SCSI_CMD_MODE_SENSE_6                 = 0x1A, ///< provides a means for a device server to report parameters to an application client. It is a complementary command to the MODE SELECT(6) command. Device servers that implement the MODE SENSE(6) command shall also implement the MODE SELECT(6) command.
+  SCSI_CMD_START_STOP_UNIT              = 0x1B,
+  SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL = 0x1E,
+  SCSI_CMD_READ_CAPACITY_10             = 0x25, ///< The SCSI Read Capacity command is used to obtain data capacity information from a target device.
+  SCSI_CMD_REQUEST_SENSE                = 0x03, ///< The SCSI Request Sense command is part of the SCSI computer protocol standard. This command is used to obtain sense data -- status/error information -- from a target device.
+  SCSI_CMD_READ_FORMAT_CAPACITY         = 0x23, ///< The command allows the Host to request a list of the possible format capacities for an installed writable media. This command also has the capability to report the writable capacity for a media when it is installed
+  SCSI_CMD_READ_10                      = 0x28, ///< The READ (10) command requests that the device server read the specified logical block(s) and transfer them to the data-in buffer.
+  SCSI_CMD_WRITE_10                     = 0x2A, ///< The WRITE (10) command requests that the device server transfer the specified logical block(s) from the data-out buffer and write them.
+}scsi_cmd_type_t;
+
+/// SCSI Sense Key
+typedef enum {
+  SCSI_SENSE_NONE            = 0x00, ///< no specific Sense Key. This would be the case for a successful command
+  SCSI_SENSE_RECOVERED_ERROR = 0x01, ///< Indicates the last command completed successfully with some recovery action performed by the disc drive.
+  SCSI_SENSE_NOT_READY       = 0x02, ///< Indicates the logical unit addressed cannot be accessed.
+  SCSI_SENSE_MEDIUM_ERROR    = 0x03, ///< Indicates the command terminated with a non-recovered error condition.
+  SCSI_SENSE_HARDWARE_ERROR  = 0x04, ///< Indicates the disc drive detected a nonrecoverable hardware failure while performing the command or during a self test.
+  SCSI_SENSE_ILLEGAL_REQUEST = 0x05, ///< Indicates an illegal parameter in the command descriptor block or in the additional parameters
+  SCSI_SENSE_UNIT_ATTENTION  = 0x06, ///< Indicates the disc drive may have been reset.
+  SCSI_SENSE_DATA_PROTECT    = 0x07, ///< Indicates that a command that reads or writes the medium was attempted on a block that is protected from this operation. The read or write operation is not performed.
+  SCSI_SENSE_FIRMWARE_ERROR  = 0x08, ///< Vendor specific sense key.
+  SCSI_SENSE_ABORTED_COMMAND = 0x0b, ///< Indicates the disc drive aborted the command.
+  SCSI_SENSE_EQUAL           = 0x0c, ///< Indicates a SEARCH DATA command has satisfied an equal comparison.
+  SCSI_SENSE_VOLUME_OVERFLOW = 0x0d, ///< Indicates a buffered peripheral device has reached the end of medium partition and data remains in the buffer that has not been written to the medium.
+  SCSI_SENSE_MISCOMPARE      = 0x0e  ///< Indicates that the source data did not match the data read from the medium.
+}scsi_sense_key_type_t;
+
+
+typedef enum {
+  SCSI_PDT_DIRECT_ACCESS = 0x0,
+  SCSI_PDT_SEQUENTIAL_ACCESS = 0x1,
+  SCSI_PDT_PRINTER = 0x2,
+  SCSI_PDT_PROCESSOR = 0x3,
+  SCSI_PDT_WRITE_ONCE = 0x4,
+  SCSI_PDT_CD_DVD = 0x5,
+  SCSI_PDT_SCANNER = 0x6,
+  SCSI_PDT_OPTICAL_DEVICE = 0x7,
+  SCSI_PDT_MEDIUM_CHANGER = 0x8,
+  SCSI_PDT_COMMUNICATIONS = 0x9, // obsolete
+  SCSI_PDT_RAID = 0x0c,
+  SCSI_PDT_ENCLOSURE_SERVICES = 0x0d,
+  SCSI_PDT_SIMPLIFIED_DIRECT_ACCESS = 0x0e,
+  SCSI_PDT_OPTICAL_CARD_READER = 0x0f,
+  SCSI_PDT_BRIDGE = 0x10, ///< Bridge device, e.g. USB to SCSI bridge
+  SCSI_PDT_OBJECT_BASED_STORAGE = 0x11, ///< Object-based storage device
+  SCSI_PDT_AUTOMATION_DRIVE_INTERFACE = 0x12, ///< Automation/Drive Interface (ADI) device
+} scsi_peripheral_device_type_t;
+
+//--------------------------------------------------------------------+
+// SCSI Primary Command (SPC-4)
+//--------------------------------------------------------------------+
+
+/// SCSI Test Unit Ready Command
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t cmd_code    ; ///< SCSI OpCode for \ref SCSI_CMD_TEST_UNIT_READY
+  uint8_t lun         ; ///< Logical Unit
+  uint8_t reserved[3] ;
+  uint8_t control     ;
+} scsi_test_unit_ready_t;
+
+TU_VERIFY_STATIC(sizeof(scsi_test_unit_ready_t) == 6, "size is not correct");
+
+/// SCSI Inquiry Command
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t cmd_code     ; ///< SCSI OpCode for \ref SCSI_CMD_INQUIRY
+  uint8_t reserved1    ;
+  uint8_t page_code    ;
+  uint8_t reserved2    ;
+  uint8_t alloc_length ; ///< specifies the maximum number of bytes that USB host has allocated in the Data-In Buffer. An allocation length of zero specifies that no data shall be transferred.
+  uint8_t control      ;
+} scsi_inquiry_t, scsi_request_sense_t;
+
+TU_VERIFY_STATIC(sizeof(scsi_inquiry_t) == 6, "size is not correct");
+
+/// SCSI Inquiry Response Data
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t peripheral_device_type     : 5;
+  uint8_t peripheral_qualifier       : 3;
+
+  uint8_t                            : 7;
+  uint8_t is_removable               : 1;
+
+  uint8_t version;
+
+  uint8_t response_data_format       : 4;
+  uint8_t hierarchical_support       : 1;
+  uint8_t normal_aca                 : 1;
+  uint8_t                            : 2;
+
+  uint8_t additional_length;
+
+  uint8_t protect                    : 1;
+  uint8_t                            : 2;
+  uint8_t third_party_copy           : 1;
+  uint8_t target_port_group_support  : 2;
+  uint8_t access_control_coordinator : 1;
+  uint8_t scc_support                : 1;
+
+  uint8_t addr16                     : 1;
+  uint8_t                            : 3;
+  uint8_t multi_port                 : 1;
+  uint8_t                            : 1; // vendor specific
+  uint8_t enclosure_service          : 1;
+  uint8_t                            : 1;
+
+  uint8_t                            : 1; // vendor specific
+  uint8_t cmd_que                    : 1;
+  uint8_t                            : 2;
+  uint8_t sync                       : 1;
+  uint8_t wbus16                     : 1;
+  uint8_t                            : 2;
+
+  uint8_t vendor_id[8]  ; ///< 8 bytes of ASCII data identifying the vendor of the product.
+  uint8_t product_id[16]; ///< 16 bytes of ASCII data defined by the vendor.
+  uint8_t product_rev[4]; ///< 4 bytes of ASCII data defined by the vendor.
+} scsi_inquiry_resp_t;
+
+TU_VERIFY_STATIC(sizeof(scsi_inquiry_resp_t) == 36, "size is not correct");
+
+
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t response_code : 7; ///< 70h - current errors, Fixed Format 71h - deferred errors, Fixed Format
+  uint8_t valid         : 1;
+
+  uint8_t reserved;
+
+  uint8_t sense_key     : 4;
+  uint8_t               : 1;
+  uint8_t ili           : 1; ///< Incorrect length indicator
+  uint8_t end_of_medium : 1;
+  uint8_t filemark      : 1;
+
+  uint32_t information;
+  uint8_t  add_sense_len;
+  uint32_t command_specific_info;
+  uint8_t  add_sense_code;
+  uint8_t  add_sense_qualifier;
+  uint8_t  field_replaceable_unit_code;
+
+  uint8_t  sense_key_specific[3]; ///< sense key specific valid bit is bit 7 of key[0], aka MSB in Big Endian layout
+
+} scsi_sense_fixed_resp_t;
+
+TU_VERIFY_STATIC(sizeof(scsi_sense_fixed_resp_t) == 18, "size is not correct");
+
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t cmd_code     ; ///< SCSI OpCode for \ref SCSI_CMD_MODE_SENSE_6
+
+  uint8_t : 3;
+  uint8_t disable_block_descriptor : 1;
+  uint8_t : 4;
+
+  uint8_t page_code : 6;
+  uint8_t page_control : 2;
+
+  uint8_t subpage_code;
+  uint8_t alloc_length;
+  uint8_t control;
+} scsi_mode_sense6_t;
+
+TU_VERIFY_STATIC( sizeof(scsi_mode_sense6_t) == 6, "size is not correct");
+
+// This is only a Mode parameter header(6).
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t data_len;
+  uint8_t medium_type;
+
+  uint8_t reserved : 7;
+  bool write_protected : 1;
+
+  uint8_t block_descriptor_len;
+} scsi_mode_sense6_resp_t;
+
+TU_VERIFY_STATIC( sizeof(scsi_mode_sense6_resp_t) == 4, "size is not correct");
+
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t cmd_code; ///< SCSI OpCode for \ref SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL
+  uint8_t reserved[3];
+  uint8_t prohibit_removal;
+  uint8_t control;
+} scsi_prevent_allow_medium_removal_t;
+
+TU_VERIFY_STATIC( sizeof(scsi_prevent_allow_medium_removal_t) == 6, "size is not correct");
+
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t cmd_code;
+
+  uint8_t immded : 1;
+  uint8_t        : 7;
+
+  uint8_t TU_RESERVED;
+
+  uint8_t power_condition_mod : 4;
+  uint8_t                     : 4;
+
+  uint8_t start           : 1;
+  uint8_t load_eject      : 1;
+  uint8_t no_flush        : 1;
+  uint8_t                 : 1;
+  uint8_t power_condition : 4;
+
+  uint8_t control;
+} scsi_start_stop_unit_t;
+
+TU_VERIFY_STATIC( sizeof(scsi_start_stop_unit_t) == 6, "size is not correct");
+
+//--------------------------------------------------------------------+
+// SCSI MMC
+//--------------------------------------------------------------------+
+/// SCSI Read Format Capacity: Write Capacity
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t cmd_code;
+  uint8_t reserved[6];
+  uint16_t alloc_length;
+  uint8_t control;
+} scsi_read_format_capacity_t;
+
+TU_VERIFY_STATIC( sizeof(scsi_read_format_capacity_t) == 10, "size is not correct");
+
+typedef struct TU_ATTR_PACKED{
+  uint8_t reserved[3];
+  uint8_t list_length; /// must be 8*n, length in bytes of formattable capacity descriptor followed it.
+
+  uint32_t block_num; /// Number of Logical Blocks
+  uint8_t  descriptor_type; // 00: reserved, 01 unformatted media , 10 Formatted media, 11 No media present
+
+  uint8_t  reserved2;
+  uint16_t block_size_u16;
+
+} scsi_read_format_capacity_data_t;
+
+TU_VERIFY_STATIC( sizeof(scsi_read_format_capacity_data_t) == 12, "size is not correct");
+
+//--------------------------------------------------------------------+
+// SCSI Block Command (SBC-3)
+// NOTE: All data in SCSI command are in Big Endian
+//--------------------------------------------------------------------+
+
+/// SCSI Read Capacity 10 Command: Read Capacity
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t  cmd_code                 ; ///< SCSI OpCode for \ref SCSI_CMD_READ_CAPACITY_10
+  uint8_t  reserved1                ;
+  uint32_t lba                      ; ///< The first Logical Block Address (LBA) accessed by this command
+  uint16_t reserved2                ;
+  uint8_t  partial_medium_indicator ;
+  uint8_t  control                  ;
+} scsi_read_capacity10_t;
+
+TU_VERIFY_STATIC(sizeof(scsi_read_capacity10_t) == 10, "size is not correct");
+
+/// SCSI Read Capacity 10 Response Data
+typedef struct {
+  uint32_t last_lba   ; ///< The last Logical Block Address of the device
+  uint32_t block_size ; ///< Block size in bytes
+} scsi_read_capacity10_resp_t;
+
+TU_VERIFY_STATIC(sizeof(scsi_read_capacity10_resp_t) == 8, "size is not correct");
+
+/// SCSI Read 10 Command
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t  cmd_code    ; ///< SCSI OpCode
+  uint8_t  reserved    ; // has LUN according to wiki
+  uint32_t lba         ; ///< The first Logical Block Address (LBA) accessed by this command
+  uint8_t  reserved2   ;
+  uint16_t block_count ; ///< Number of Blocks used by this command
+  uint8_t  control     ;
+} scsi_read10_t, scsi_write10_t;
+
+TU_VERIFY_STATIC(sizeof(scsi_read10_t) == 10, "size is not correct");
+TU_VERIFY_STATIC(sizeof(scsi_write10_t) == 10, "size is not correct");
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* TUSB_MSC_H_ */
@@ -0,0 +1,170 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_MSC_DEVICE_H_
+#define TUSB_MSC_DEVICE_H_
+
+#include "common/tusb_common.h"
+#include "msc.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Class Driver Configuration
+//--------------------------------------------------------------------+
+
+#if !defined(CFG_TUD_MSC_EP_BUFSIZE) & defined(CFG_TUD_MSC_BUFSIZE)
+  // TODO warn user to use new name later on
+  // #warning CFG_TUD_MSC_BUFSIZE is renamed to CFG_TUD_MSC_EP_BUFSIZE, please update to use the new name
+  #define CFG_TUD_MSC_EP_BUFSIZE  CFG_TUD_MSC_BUFSIZE
+#endif
+
+#ifndef CFG_TUD_MSC_EP_BUFSIZE
+  #error CFG_TUD_MSC_EP_BUFSIZE must be defined, value of a block size should work well, the more the better
+#endif
+
+// Return value of callback functions
+enum {
+  TUD_MSC_RET_BUSY = 0,   // Busy, e.g disk I/O is not ready
+  TUD_MSC_RET_ERROR = -1,
+  TUD_MSC_RET_ASYNC = -2, // Asynchronous IO
+};
+
+TU_VERIFY_STATIC(CFG_TUD_MSC_EP_BUFSIZE < UINT16_MAX, "Size is not correct");
+
+//--------------------------------------------------------------------+
+// Application API
+//--------------------------------------------------------------------+
+
+// Set SCSI sense response
+bool tud_msc_set_sense(uint8_t lun, uint8_t sense_key, uint8_t add_sense_code, uint8_t add_sense_qualifier);
+
+// Called by Application once asynchronous I/O operation is done
+// bytes_io is number of bytes in I/O op, typically the bufsize in read/write_cb() or
+// TUD_MSC_RET_ERROR (-1) for error. Note TUD_MSC_RET_BUSY (0) will be treated as error as well.
+bool tud_msc_async_io_done(int32_t bytes_io, bool in_isr);
+
+//--------------------------------------------------------------------+
+// Application Callbacks (WEAK is optional)
+//--------------------------------------------------------------------+
+
+/*
+  Invoked when received SCSI READ10/WRITE10 command
+  - Address = lba * BLOCK_SIZE + offset
+    - offset is only needed if CFG_TUD_MSC_EP_BUFSIZE is smaller than BLOCK_SIZE.
+  - Application fill the buffer (up to bufsize) with address contents and return number of bytes read or status.
+    - 0 < ret < bufsize: These bytes are transferred first and callback will be invoked again for remaining data.
+    - TUD_MSC_RET_BUSY
+        Application is buys e.g disk I/O not ready. Callback will be invoked again with the same parameters later on.
+    - TUD_MSC_RET_ERROR
+        error such as invalid address. This request will be STALLed and scsi command will be failed
+    - TUD_MSC_RET_ASYNC
+        Data I/O will be done asynchronously in a background task. Application should return immediately.
+        tud_msc_async_io_done() must be called once IO/ is done to signal completion.
+*/
+int32_t tud_msc_read10_cb (uint8_t lun, uint32_t lba, uint32_t offset, void* buffer, uint32_t bufsize);
+int32_t tud_msc_write10_cb (uint8_t lun, uint32_t lba, uint32_t offset, uint8_t* buffer, uint32_t bufsize);
+
+// Invoked when received SCSI_CMD_INQUIRY, v1, application should use v2 if possible
+// Application fill vendor id, product id and revision with string up to 8, 16, 4 characters respectively
+void tud_msc_inquiry_cb(uint8_t lun, uint8_t vendor_id[8], uint8_t product_id[16], uint8_t product_rev[4]);
+
+// Invoked when received SCSI_CMD_INQUIRY, v2 with full inquiry response
+// Some inquiry_resp's fields are already filled with default values, application can update them
+// Return length of inquiry response, typically sizeof(scsi_inquiry_resp_t) (36 bytes), can be longer if included vendor data.
+uint32_t tud_msc_inquiry2_cb(uint8_t lun, scsi_inquiry_resp_t *inquiry_resp, uint32_t bufsize);
+
+// Invoked when received Test Unit Ready command.
+// return true allowing host to read/write this LUN e.g SD card inserted
+bool tud_msc_test_unit_ready_cb(uint8_t lun);
+
+// Invoked when received SCSI_CMD_READ_CAPACITY_10 and SCSI_CMD_READ_FORMAT_CAPACITY to determine the disk size
+// Application update block count and block size
+void tud_msc_capacity_cb(uint8_t lun, uint32_t* block_count, uint16_t* block_size);
+
+/**
+ * Invoked when received an SCSI command not in built-in list below.
+ * - READ_CAPACITY10, READ_FORMAT_CAPACITY, INQUIRY, TEST_UNIT_READY, START_STOP_UNIT, MODE_SENSE6, REQUEST_SENSE
+ * - READ10 and WRITE10 has their own callbacks
+ *
+ * \param[in]   lun         Logical unit number
+ * \param[in]   scsi_cmd    SCSI command contents which application must examine to response accordingly
+ * \param[out]  buffer      Buffer for SCSI Data Stage.
+ *                            - For INPUT: application must fill this with response.
+ *                            - For OUTPUT it holds the Data from host
+ * \param[in]   bufsize     Buffer's length.
+ *
+ * \return      Actual bytes processed, can be zero for no-data command.
+ * \retval      negative    Indicate error e.g unsupported command, tinyusb will \b STALL the corresponding
+ *                          endpoint and return failed status in command status wrapper phase.
+ */
+int32_t tud_msc_scsi_cb (uint8_t lun, uint8_t const scsi_cmd[16], void* buffer, uint16_t bufsize);
+
+/*------------- Optional callbacks -------------*/
+
+// Invoked when received GET_MAX_LUN request, required for multiple LUNs implementation
+uint8_t tud_msc_get_maxlun_cb(void);
+
+// Invoked when received Start Stop Unit command
+// - Start = 0 : stopped power mode, if load_eject = 1 : unload disk storage
+// - Start = 1 : active mode, if load_eject = 1 : load disk storage
+bool tud_msc_start_stop_cb(uint8_t lun, uint8_t power_condition, bool start, bool load_eject);
+
+//Invoked when we receive the Prevent / Allow Medium Removal command
+bool tud_msc_prevent_allow_medium_removal_cb(uint8_t lun, uint8_t prohibit_removal, uint8_t control);
+
+// Invoked when received REQUEST_SENSE
+int32_t tud_msc_request_sense_cb(uint8_t lun, void* buffer, uint16_t bufsize);
+
+// Invoked when Read10 command is complete
+void tud_msc_read10_complete_cb(uint8_t lun);
+
+// Invoke when Write10 command is complete, can be used to flush flash caching
+void tud_msc_write10_complete_cb(uint8_t lun);
+
+// Invoked when command in tud_msc_scsi_cb is complete
+void tud_msc_scsi_complete_cb(uint8_t lun, uint8_t const scsi_cmd[16]);
+
+// Invoked to check if device is writable as part of SCSI WRITE10
+bool tud_msc_is_writable_cb(uint8_t lun);
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void     mscd_init            (void);
+bool     mscd_deinit          (void);
+void     mscd_reset           (uint8_t rhport);
+uint16_t mscd_open            (uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     mscd_control_xfer_cb (uint8_t rhport, uint8_t stage, tusb_control_request_t const * p_request);
+bool     mscd_xfer_cb         (uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* TUSB_MSC_DEVICE_H_ */
@@ -0,0 +1,138 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_MSC_HOST_H_
+#define TUSB_MSC_HOST_H_
+
+#include "msc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Class Driver Configuration
+//--------------------------------------------------------------------+
+
+#ifndef CFG_TUH_MSC_MAXLUN
+  #define CFG_TUH_MSC_MAXLUN 4
+#endif
+
+typedef struct {
+  const msc_cbw_t *cbw;       // SCSI command
+  const msc_csw_t *csw;       // SCSI status
+  void            *scsi_data; // SCSI Data
+  uintptr_t        user_arg;  // user argument
+} tuh_msc_complete_data_t;
+
+typedef bool (*tuh_msc_complete_cb_t)(uint8_t dev_addr, const tuh_msc_complete_data_t *cb_data);
+
+//--------------------------------------------------------------------+
+// Application API
+//--------------------------------------------------------------------+
+
+// Check if device supports MassStorage interface.
+// This function true after tuh_msc_mounted_cb() and false after tuh_msc_unmounted_cb()
+bool tuh_msc_mounted(uint8_t dev_addr);
+
+// Check if the interface is currently ready or busy transferring data
+bool tuh_msc_ready(uint8_t dev_addr);
+
+// Get Max Lun
+uint8_t tuh_msc_get_maxlun(uint8_t dev_addr);
+
+// Get number of block
+uint32_t tuh_msc_get_block_count(uint8_t dev_addr, uint8_t lun);
+
+// Get block size in bytes
+uint32_t tuh_msc_get_block_size(uint8_t dev_addr, uint8_t lun);
+
+// Perform a full SCSI command (cbw, data, csw) in non-blocking manner.
+// Complete callback is invoked when SCSI op is complete.
+// return true if success, false if there is already pending operation.
+// NOTE: buffer must be accessible by USB/DMA controller, aligned correctly and multiple of cache line if enabled
+bool tuh_msc_scsi_command(uint8_t daddr, const msc_cbw_t *cbw, void *data, tuh_msc_complete_cb_t complete_cb,
+                          uintptr_t arg);
+
+// Perform SCSI Inquiry command
+// Complete callback is invoked when SCSI op is complete.
+// NOTE: response must be accessible by USB/DMA controller, aligned correctly and multiple of cache line if enabled
+bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t *response, tuh_msc_complete_cb_t complete_cb,
+                     uintptr_t arg);
+
+// Perform SCSI Test Unit Ready command
+// Complete callback is invoked when SCSI op is complete.
+bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb, uintptr_t arg);
+
+// Perform SCSI Request Sense 10 command
+// Complete callback is invoked when SCSI op is complete.
+// NOTE: response must be accessible by USB/DMA controller, aligned correctly and multiple of cache line if enabled
+bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *response, tuh_msc_complete_cb_t complete_cb,
+                           uintptr_t arg);
+
+// Perform SCSI Read 10 command. Read n blocks starting from LBA to buffer
+// Complete callback is invoked when SCSI op is complete.
+// NOTE: buffer must be accessible by USB/DMA controller, aligned correctly and multiple of cache line if enabled
+bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void *buffer, uint32_t lba, uint16_t block_count,
+                    tuh_msc_complete_cb_t complete_cb, uintptr_t arg);
+
+// Perform SCSI Write 10 command. Write n blocks starting from LBA to device
+// Complete callback is invoked when SCSI op is complete.
+// NOTE: buffer must be accessible by USB/DMA controller, aligned correctly and multiple of cache line if enabled
+bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, const void *buffer, uint32_t lba, uint16_t block_count,
+                     tuh_msc_complete_cb_t complete_cb, uintptr_t arg);
+
+// Perform SCSI Read Capacity 10 command
+// Complete callback is invoked when SCSI op is complete.
+// Note: during enumeration, host stack already carried out this request. Application can retrieve capacity by
+// simply call tuh_msc_get_block_count() and tuh_msc_get_block_size()
+bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t *response,
+                           tuh_msc_complete_cb_t complete_cb, uintptr_t arg);
+
+//------------- Application Callback -------------//
+
+// Invoked when a device with MassStorage interface is mounted
+void tuh_msc_mount_cb(uint8_t dev_addr);
+
+// Invoked when a device with MassStorage interface is unmounted
+void tuh_msc_umount_cb(uint8_t dev_addr);
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+
+bool     msch_init(void);
+bool     msch_deinit(void);
+uint16_t msch_open(uint8_t rhport, uint8_t dev_addr, const tusb_desc_interface_t *desc_itf, uint16_t max_len);
+bool     msch_set_config(uint8_t daddr, uint8_t itf_num);
+void     msch_close(uint8_t dev_addr);
+bool     msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,888 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Ennebi Elettronica (https://ennebielettronica.com)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_MTP_H_
+#define TUSB_MTP_H_
+
+#include "common/tusb_common.h"
+
+#if (CFG_TUD_ENABLED && CFG_TUD_MTP)
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Media Transfer Protocol Class Constant
+//--------------------------------------------------------------------+
+
+// Media Transfer Protocol Subclass
+typedef enum {
+  MTP_SUBCLASS_STILL_IMAGE = 1
+} mtp_subclass_type_t;
+
+// MTP Protocol.
+typedef enum {
+  MTP_PROTOCOL_PIMA_15470 = 1, ///< Picture Transfer Protocol (PIMA 15470)
+} mtp_protocol_type_t;
+
+// PTP/MTP protocol phases
+typedef enum {
+  MTP_PHASE_COMMAND = 0,
+  MTP_PHASE_DATA,
+  MTP_PHASE_RESPONSE,
+  MTP_PHASE_ERROR
+} mtp_phase_type_t;
+
+// PTP/MTP Class requests, PIMA 15740-2000: D.5.2
+typedef enum {
+  MTP_REQ_CANCEL             = 0x64,
+  MTP_REQ_GET_EXT_EVENT_DATA = 0x65,
+  MTP_REQ_RESET              = 0x66,
+  MTP_REQ_GET_DEVICE_STATUS  = 0x67,
+} mtp_class_request_t;
+
+// PTP/MTP Container type
+typedef enum {
+  MTP_CONTAINER_TYPE_UNDEFINED      = 0,
+  MTP_CONTAINER_TYPE_COMMAND_BLOCK  = 1,
+  MTP_CONTAINER_TYPE_DATA_BLOCK     = 2,
+  MTP_CONTAINER_TYPE_RESPONSE_BLOCK = 3,
+  MTP_CONTAINER_TYPE_EVENT_BLOCK    = 4,
+} mtp_container_type_t;
+
+// MTP 1.1 Appendix A: Object formats
+typedef enum {
+  // ---- Base formats ----
+  MTP_OBJ_FORMAT_UNDEFINED        = 0x3000u, // Undefined object
+  MTP_OBJ_FORMAT_ASSOCIATION      = 0x3001u, // Association (for example, a folder)
+  MTP_OBJ_FORMAT_SCRIPT           = 0x3002u, // Device model-specific script
+  MTP_OBJ_FORMAT_EXECUTABLE       = 0x3003u, // Device model-specific binary executable
+  MTP_OBJ_FORMAT_TEXT             = 0x3004u, // Text file
+  MTP_OBJ_FORMAT_HTML             = 0x3005u, // Hypertext Markup Language file (text)
+  MTP_OBJ_FORMAT_DPOF             = 0x3006u, // Digital Print Order Format file (text)
+  MTP_OBJ_FORMAT_AIFF             = 0x3007u, // Audio clip (AIFF)
+  MTP_OBJ_FORMAT_WAV              = 0x3008u, // Audio clip (WAV)
+  MTP_OBJ_FORMAT_MP3              = 0x3009u, // MPEG-1 Layer III audio (ISO/IEC 13818-3)
+  MTP_OBJ_FORMAT_AVI              = 0x300Au, // Video clip (AVI)
+  MTP_OBJ_FORMAT_MPEG             = 0x300Bu, // Video clip (MPEG)
+  MTP_OBJ_FORMAT_ASF              = 0x300Cu, // Microsoft Advanced Streaming Format (video)
+
+  // ---- Image formats ----
+  MTP_OBJ_FORMAT_UNDEFINED_IMAGE  = 0x3800u, // Undefined image object
+  MTP_OBJ_FORMAT_EXIF_JPEG        = 0x3801u, // Exchangeable Image Format, JEIDA standard
+  MTP_OBJ_FORMAT_TIFF_EP          = 0x3802u, // Tag Image File Format for Electronic Photography
+  MTP_OBJ_FORMAT_FLASHPIX         = 0x3803u, // Structured Storage Image Format (FlashPix)
+  MTP_OBJ_FORMAT_BMP              = 0x3804u, // Microsoft Windows Bitmap file
+  MTP_OBJ_FORMAT_CIFF             = 0x3805u, // Canon Camera Image File Format
+  MTP_OBJ_FORMAT_UNDEFINED_3806   = 0x3806u, // Reserved / Undefined
+  MTP_OBJ_FORMAT_GIF              = 0x3807u, // Graphics Interchange Format
+  MTP_OBJ_FORMAT_JFIF             = 0x3808u, // JPEG File Interchange Format
+  MTP_OBJ_FORMAT_CD               = 0x3809u, // PhotoCD Image Pac
+  MTP_OBJ_FORMAT_PICT             = 0x380Au, // Quickdraw Image Format
+  MTP_OBJ_FORMAT_PNG              = 0x380Bu, // Portable Network Graphics
+  MTP_OBJ_FORMAT_UNDEFINED_380C   = 0x380Cu, // Reserved / Undefined
+  MTP_OBJ_FORMAT_TIFF             = 0x380Du, // Tag Image File Format (baseline)
+  MTP_OBJ_FORMAT_TIFF_IT          = 0x380Eu, // Tag Image File Format for IT (graphic arts)
+  MTP_OBJ_FORMAT_JP2              = 0x380Fu, // JPEG2000 Baseline File Format
+  MTP_OBJ_FORMAT_JPX              = 0x3810u, // JPEG2000 Extended File Format
+
+  // ---- Firmware & misc ----
+  MTP_OBJ_FORMAT_UNDEFINED_FIRMWARE = 0xB802u, // Undefined Firmware
+  MTP_OBJ_FORMAT_WBMP               = 0xB803u, // Wireless Application Protocol Bitmap Format (.wbmp)
+  MTP_OBJ_FORMAT_WINDOWS_IMAGE      = 0xB881u, // Windows Image Format
+  MTP_OBJ_FORMAT_JPEGXR             = 0xB804u, // JPEG XR (.hdp, .jxr, .wdp)
+
+  // ---- Audio formats ----
+  MTP_OBJ_FORMAT_UNDEFINED_AUDIO  = 0xB900u, // Undefined audio object
+  MTP_OBJ_FORMAT_WMA              = 0xB901u, // Windows Media Audio
+  MTP_OBJ_FORMAT_OGG              = 0xB902u, // OGG container
+  MTP_OBJ_FORMAT_AAC              = 0xB903u, // Advanced Audio Coding (.aac)
+  MTP_OBJ_FORMAT_AUDIBLE          = 0xB904u, // Audible format
+  MTP_OBJ_FORMAT_FLAC             = 0xB906u, // Free Lossless Audio Codec
+  MTP_OBJ_FORMAT_QCELP            = 0xB907u, // Qualcomm Code Excited Linear Prediction (.qcp)
+  MTP_OBJ_FORMAT_AMR              = 0xB908u, // Adaptive Multi-Rate audio (.amr)
+
+  // ---- Video formats ----
+  MTP_OBJ_FORMAT_UNDEFINED_VIDEO  = 0xB980u, // Undefined video object
+  MTP_OBJ_FORMAT_WMV              = 0xB981u, // Windows Media Video
+  MTP_OBJ_FORMAT_MP4              = 0xB982u, // MP4 Container (ISO 14496-1)
+  MTP_OBJ_FORMAT_MP2              = 0xB983u, // MPEG-1 Layer II audio
+  MTP_OBJ_FORMAT_3GP              = 0xB984u, // 3GP Container
+  MTP_OBJ_FORMAT_3G2              = 0xB985u, // 3GPP2 Container
+  MTP_OBJ_FORMAT_AVCHD            = 0xB986u, // AVCHD (MPEG-4 AVC + Dolby Digital)
+  MTP_OBJ_FORMAT_ATSC_TS          = 0xB987u, // ATSC-compliant MPEG-2 Transport Stream
+  MTP_OBJ_FORMAT_DVB_TS           = 0xB988u, // DVB-compliant MPEG-2 Transport Stream
+
+  // ---- Collections ----
+  MTP_OBJ_FORMAT_UNDEFINED_COLLECTION          = 0xBA00u, // Undefined collection
+  MTP_OBJ_FORMAT_ABSTRACT_MULTIMEDIA_ALBUM     = 0xBA01u, // Abstract Multimedia Album
+  MTP_OBJ_FORMAT_ABSTRACT_IMAGE_ALBUM          = 0xBA02u, // Abstract Image Album
+  MTP_OBJ_FORMAT_ABSTRACT_AUDIO_ALBUM          = 0xBA03u, // Abstract Audio Album
+  MTP_OBJ_FORMAT_ABSTRACT_VIDEO_ALBUM          = 0xBA04u, // Abstract Video Album
+  MTP_OBJ_FORMAT_ABSTRACT_AV_PLAYLIST          = 0xBA05u, // Abstract Audio & Video Playlist
+  MTP_OBJ_FORMAT_ABSTRACT_CONTACT_GROUP        = 0xBA06u, // Abstract Contact Group
+  MTP_OBJ_FORMAT_ABSTRACT_MESSAGE_FOLDER       = 0xBA07u, // Abstract Message Folder
+  MTP_OBJ_FORMAT_ABSTRACT_CHAPTERED_PRODUCTION = 0xBA08u, // Abstract Chaptered Production
+  MTP_OBJ_FORMAT_ABSTRACT_AUDIO_PLAYLIST       = 0xBA09u, // Abstract Audio Playlist
+  MTP_OBJ_FORMAT_ABSTRACT_VIDEO_PLAYLIST       = 0xBA0Au, // Abstract Video Playlist
+  MTP_OBJ_FORMAT_ABSTRACT_MEDIACAST            = 0xBA0Bu, // Abstract Mediacast (RSS enclosure)
+
+  // ---- Playlist formats ----
+  MTP_OBJ_FORMAT_WPL_PLAYLIST     = 0xBA10u, // Windows Media Player Playlist (.wpl)
+  MTP_OBJ_FORMAT_M3U_PLAYLIST     = 0xBA11u, // M3U Playlist
+  MTP_OBJ_FORMAT_MPL_PLAYLIST     = 0xBA12u, // MPL Playlist
+  MTP_OBJ_FORMAT_ASX_PLAYLIST     = 0xBA13u, // ASX Playlist
+  MTP_OBJ_FORMAT_PLS_PLAYLIST     = 0xBA14u, // PLS Playlist
+
+  // ---- Document formats ----
+  MTP_OBJ_FORMAT_UNDEFINED_DOC    = 0xBA80u, // Undefined Document
+  MTP_OBJ_FORMAT_ABSTRACT_DOC     = 0xBA81u, // Abstract Document
+  MTP_OBJ_FORMAT_XML_DOC          = 0xBA82u, // XML Document
+  MTP_OBJ_FORMAT_DOC              = 0xBA83u, // Microsoft Word Document
+  MTP_OBJ_FORMAT_MHT_DOC          = 0xBA84u, // MHT Compiled HTML Document
+  MTP_OBJ_FORMAT_XLS              = 0xBA85u, // Microsoft Excel Spreadsheet
+  MTP_OBJ_FORMAT_PPT              = 0xBA86u, // Microsoft PowerPoint Presentation
+
+  // ---- Messaging ----
+  MTP_OBJ_FORMAT_UNDEFINED_MSG    = 0xBB00u, // Undefined Message
+  MTP_OBJ_FORMAT_ABSTRACT_MSG     = 0xBB01u, // Abstract Message
+
+  // ---- Bookmarks ----
+  MTP_OBJ_FORMAT_UNDEFINED_BOOKMARK = 0xBB10u, // Undefined Bookmark
+  MTP_OBJ_FORMAT_ABSTRACT_BOOKMARK  = 0xBB11u, // Abstract Bookmark
+
+  // ---- Appointments ----
+  MTP_OBJ_FORMAT_UNDEFINED_APPT   = 0xBB20u, // Undefined Appointment
+  MTP_OBJ_FORMAT_ABSTRACT_APPT    = 0xBB21u, // Abstract Appointment
+  MTP_OBJ_FORMAT_VCALENDAR1       = 0xBB22u, // vCalendar 1.0
+
+  // ---- Tasks ----
+  MTP_OBJ_FORMAT_UNDEFINED_TASK   = 0xBB40u, // Undefined Task
+  MTP_OBJ_FORMAT_ABSTRACT_TASK    = 0xBB41u, // Abstract Task
+  MTP_OBJ_FORMAT_ICALENDAR        = 0xBB42u, // iCalendar
+
+  // ---- Notes ----
+  MTP_OBJ_FORMAT_UNDEFINED_NOTE   = 0xBB60u, // Undefined Note
+  MTP_OBJ_FORMAT_ABSTRACT_NOTE    = 0xBB61u, // Abstract Note
+
+  // ---- Contacts ----
+  MTP_OBJ_FORMAT_UNDEFINED_CONTACT= 0xBB80u, // Undefined Contact
+  MTP_OBJ_FORMAT_ABSTRACT_CONTACT = 0xBB81u, // Abstract Contact
+  MTP_OBJ_FORMAT_VCARD2           = 0xBB82u, // vCard 2.1
+  MTP_OBJ_FORMAT_VCARD3           = 0xBB83u, // vCard 3.0
+} mtp_object_formats_t;
+
+// MTP 1.1 Appendix B: Object Properties
+typedef enum {
+  MTP_OBJ_PROP_STORAGE_ID                 = 0xDC01u, // StorageID
+  MTP_OBJ_PROP_OBJECT_FORMAT              = 0xDC02u, // Object Format
+  MTP_OBJ_PROP_PROTECTION_STATUS          = 0xDC03u, // Protection Status
+  MTP_OBJ_PROP_OBJECT_SIZE                = 0xDC04u, // Object Size
+  MTP_OBJ_PROP_ASSOCIATION_TYPE           = 0xDC05u, // Association Type
+  MTP_OBJ_PROP_ASSOCIATION_DESC           = 0xDC06u, // Association Description
+  MTP_OBJ_PROP_OBJECT_FILE_NAME           = 0xDC07u, // Object File Name
+  MTP_OBJ_PROP_DATE_CREATED               = 0xDC08u, // Date Created
+  MTP_OBJ_PROP_DATE_MODIFIED              = 0xDC09u, // Date Modified
+  MTP_OBJ_PROP_KEYWORDS                   = 0xDC0Au, // Keywords
+  MTP_OBJ_PROP_PARENT_OBJECT              = 0xDC0Bu, // Parent Object
+  MTP_OBJ_PROP_ALLOWED_FOLDER_CONTENTS    = 0xDC0Cu, // Allowed Folder Contents
+  MTP_OBJ_PROP_HIDDEN                     = 0xDC0Du, // Hidden
+  MTP_OBJ_PROP_SYSTEM_OBJECT              = 0xDC0Eu, // System Object
+  // 0xDC0F-0xDC40 is reserved
+
+  MTP_OBJ_PROP_PERSISTENT_UID             = 0xDC41u, // Persistent Unique Object Identifier
+  MTP_OBJ_PROP_SYNC_ID                    = 0xDC42u, // SyncID
+  MTP_OBJ_PROP_PROPERTY_BAG               = 0xDC43u, // Property Bag
+  MTP_OBJ_PROP_NAME                       = 0xDC44u, // Name
+  MTP_OBJ_PROP_CREATED_BY                 = 0xDC45u, // Created By
+  MTP_OBJ_PROP_ARTIST                     = 0xDC46u, // Artist
+  MTP_OBJ_PROP_DATE_AUTHORED              = 0xDC47u, // Date Authored
+  MTP_OBJ_PROP_DESCRIPTION                = 0xDC48u, // Description
+  MTP_OBJ_PROP_URL_REFERENCE              = 0xDC49u, // URL Reference
+  MTP_OBJ_PROP_LANGUAGE_LOCALE            = 0xDC4Au, // Language-Locale
+  MTP_OBJ_PROP_COPYRIGHT_INFO             = 0xDC4Bu, // Copyright Information
+  MTP_OBJ_PROP_SOURCE                     = 0xDC4Cu, // Source
+  MTP_OBJ_PROP_ORIGIN_LOCATION            = 0xDC4Du, // Origin Location
+  MTP_OBJ_PROP_DATE_ADDED                 = 0xDC4Eu, // Date Added
+  MTP_OBJ_PROP_NON_CONSUMABLE             = 0xDC4Fu, // Non-Consumable
+  MTP_OBJ_PROP_CORRUPT_UNPLAYABLE         = 0xDC50u, // Corrupt/Unplayable
+  MTP_OBJ_PROP_PRODUCER_SERIAL_NUMBER     = 0xDC51u, // ProducerSerialNumber
+  // 0xDC52-0xDC80 is reserved
+
+  MTP_OBJ_PROP_REP_SAMPLE_FORMAT          = 0xDC81u, // Representative Sample Format
+  MTP_OBJ_PROP_REP_SAMPLE_SIZE            = 0xDC82u, // Representative Sample Size
+  MTP_OBJ_PROP_REP_SAMPLE_HEIGHT          = 0xDC83u, // Representative Sample Height
+  MTP_OBJ_PROP_REP_SAMPLE_WIDTH           = 0xDC84u, // Representative Sample Width
+  MTP_OBJ_PROP_REP_SAMPLE_DURATION        = 0xDC85u, // Representative Sample Duration
+  MTP_OBJ_PROP_REP_SAMPLE_DATA            = 0xDC86u, // Representative Sample Data
+  MTP_OBJ_PROP_WIDTH                      = 0xDC87u, // Width
+  MTP_OBJ_PROP_HEIGHT                     = 0xDC88u, // Height
+  MTP_OBJ_PROP_DURATION                   = 0xDC89u, // Duration
+  MTP_OBJ_PROP_RATING                     = 0xDC8Au, // Rating
+  MTP_OBJ_PROP_TRACK                      = 0xDC8Bu, // Track
+  MTP_OBJ_PROP_GENRE                      = 0xDC8Cu, // Genre
+  MTP_OBJ_PROP_CREDITS                    = 0xDC8Du, // Credits
+  MTP_OBJ_PROP_LYRICS                     = 0xDC8Eu, // Lyrics
+  MTP_OBJ_PROP_SUBSCRIPTION_CONTENT_ID    = 0xDC8Fu, // Subscription Content ID
+  MTP_OBJ_PROP_PRODUCED_BY                = 0xDC90u, // Produced By
+  MTP_OBJ_PROP_USE_COUNT                  = 0xDC91u, // Use Count
+  MTP_OBJ_PROP_SKIP_COUNT                 = 0xDC92u, // Skip Count
+  MTP_OBJ_PROP_LAST_ACCESSED              = 0xDC93u, // Last Accessed
+  MTP_OBJ_PROP_PARENTAL_RATING            = 0xDC94u, // Parental Rating
+  MTP_OBJ_PROP_META_GENRE                 = 0xDC95u, // Meta Genre
+  MTP_OBJ_PROP_COMPOSER                   = 0xDC96u, // Composer
+  MTP_OBJ_PROP_EFFECTIVE_RATING           = 0xDC97u, // Effective Rating
+  MTP_OBJ_PROP_SUBTITLE                   = 0xDC98u, // Subtitle
+  MTP_OBJ_PROP_ORIGINAL_RELEASE_DATE      = 0xDC99u, // Original Release Date
+  MTP_OBJ_PROP_ALBUM_NAME                 = 0xDC9Au, // Album Name
+  MTP_OBJ_PROP_ALBUM_ARTIST               = 0xDC9Bu, // Album Artist
+  MTP_OBJ_PROP_MOOD                       = 0xDC9Cu, // Mood
+  MTP_OBJ_PROP_DRM_STATUS                 = 0xDC9Du, // DRM Status
+  MTP_OBJ_PROP_SUB_DESCRIPTION            = 0xDC9Eu, // Sub Description
+  // 0xDC9F-0xDCD0 is reserved
+
+  MTP_OBJ_PROP_IS_CROPPED                 = 0xDCD1u, // Is Cropped
+  MTP_OBJ_PROP_IS_COLOUR_CORRECTED        = 0xDCD2u, // Is Colour Corrected
+  MTP_OBJ_PROP_IMAGE_BIT_DEPTH            = 0xDCD3u, // Image Bit Depth
+  MTP_OBJ_PROP_FNUMBER                    = 0xDCD4u, // Fnumber (aperture ×100)
+  MTP_OBJ_PROP_EXPOSURE_TIME              = 0xDCD5u, // Exposure Time (sec ×10,000)
+  MTP_OBJ_PROP_EXPOSURE_INDEX             = 0xDCD6u, // Exposure Index (ISO)
+  // 0xDCD7-0xDCDF is reserved
+
+  MTP_OBJ_PROP_DISPLAY_NAME               = 0xDCE0u, // Display Name
+  MTP_OBJ_PROP_BODY_TEXT                  = 0xDCE1u, // Body Text
+  MTP_OBJ_PROP_SUBJECT                    = 0xDCE2u, // Subject
+  MTP_OBJ_PROP_PRIORITY                   = 0xDCE3u, // Priority
+  // 0xDCE4-0xDCFF is reserved
+
+  MTP_OBJ_PROP_GIVEN_NAME                 = 0xDD00u, // Given Name
+  MTP_OBJ_PROP_MIDDLE_NAMES               = 0xDD01u, // Middle Names
+  MTP_OBJ_PROP_FAMILY_NAME                = 0xDD02u, // Family Name
+  MTP_OBJ_PROP_PREFIX                     = 0xDD03u, // Prefix
+  MTP_OBJ_PROP_SUFFIX                     = 0xDD04u, // Suffix
+  MTP_OBJ_PROP_PHONETIC_GIVEN_NAME        = 0xDD05u, // Phonetic Given Name
+  MTP_OBJ_PROP_PHONETIC_FAMILY_NAME       = 0xDD06u, // Phonetic Family Name
+  MTP_OBJ_PROP_EMAIL_PRIMARY              = 0xDD07u, // Email Primary
+  MTP_OBJ_PROP_EMAIL_PERSONAL_1           = 0xDD08u, // Email Personal 1
+  MTP_OBJ_PROP_EMAIL_PERSONAL_2           = 0xDD09u, // Email Personal 2
+  MTP_OBJ_PROP_EMAIL_BUSINESS_1           = 0xDD0Au, // Email Business 1
+  MTP_OBJ_PROP_EMAIL_BUSINESS_2           = 0xDD0Bu, // Email Business 2
+  MTP_OBJ_PROP_EMAIL_OTHERS               = 0xDD0Cu, // Email Others
+  MTP_OBJ_PROP_PHONE_PRIMARY              = 0xDD0Du, // Phone Number Primary
+  MTP_OBJ_PROP_PHONE_PERSONAL_1           = 0xDD0Eu, // Phone Number Personal
+  MTP_OBJ_PROP_PHONE_PERSONAL_2           = 0xDD0Fu, // Phone Number Personal 2
+  MTP_OBJ_PROP_PHONE_BUSINESS_1           = 0xDD10u, // Phone Number Business
+  MTP_OBJ_PROP_PHONE_BUSINESS_2           = 0xDD11u, // Phone Number Business 2
+  MTP_OBJ_PROP_PHONE_MOBILE_1             = 0xDD12u, // Phone Number Mobile
+  MTP_OBJ_PROP_PHONE_MOBILE_2             = 0xDD13u, // Phone Number Mobile 2
+  MTP_OBJ_PROP_FAX_PRIMARY                = 0xDD14u, // Fax Number Primary
+  MTP_OBJ_PROP_FAX_PERSONAL               = 0xDD15u, // Fax Number Personal
+  MTP_OBJ_PROP_FAX_BUSINESS               = 0xDD16u, // Fax Number Business
+  MTP_OBJ_PROP_PAGER_NUMBER               = 0xDD17u, // Pager Number
+  MTP_OBJ_PROP_PHONE_OTHERS               = 0xDD18u, // Phone Number Others
+  MTP_OBJ_PROP_WEB_PRIMARY                = 0xDD19u, // Primary Web Address
+  MTP_OBJ_PROP_WEB_PERSONAL               = 0xDD1Au, // Personal Web Address
+  MTP_OBJ_PROP_WEB_BUSINESS               = 0xDD1Bu, // Business Web Address
+  MTP_OBJ_PROP_IM_ADDRESS_1               = 0xDD1Cu, // Instant Messenger Address
+  MTP_OBJ_PROP_IM_ADDRESS_2               = 0xDD1Du, // Instant Messenger Address 2
+  MTP_OBJ_PROP_IM_ADDRESS_3               = 0xDD1Eu, // Instant Messenger Address 3
+  MTP_OBJ_PROP_ADDR_PERSONAL_FULL         = 0xDD1Fu, // Postal Address Personal Full
+  MTP_OBJ_PROP_ADDR_PERSONAL_LINE1        = 0xDD20u, // Postal Address Personal Line 1
+  MTP_OBJ_PROP_ADDR_PERSONAL_LINE2        = 0xDD21u, // Postal Address Personal Line 2
+  MTP_OBJ_PROP_ADDR_PERSONAL_CITY         = 0xDD22u, // Postal Address Personal City
+  MTP_OBJ_PROP_ADDR_PERSONAL_REGION       = 0xDD23u, // Postal Address Personal Region
+  MTP_OBJ_PROP_ADDR_PERSONAL_POSTAL_CODE  = 0xDD24u, // Postal Address Personal Postal Code
+  MTP_OBJ_PROP_ADDR_PERSONAL_COUNTRY      = 0xDD25u, // Postal Address Personal Country
+  MTP_OBJ_PROP_ADDR_BUSINESS_FULL         = 0xDD26u, // Postal Address Business Full
+  MTP_OBJ_PROP_ADDR_BUSINESS_LINE1        = 0xDD27u, // Postal Address Business Line 1
+  MTP_OBJ_PROP_ADDR_BUSINESS_LINE2        = 0xDD28u, // Postal Address Business Line 2
+  MTP_OBJ_PROP_ADDR_BUSINESS_CITY         = 0xDD29u, // Postal Address Business City
+  MTP_OBJ_PROP_ADDR_BUSINESS_REGION       = 0xDD2Au, // Postal Address Business Region
+  MTP_OBJ_PROP_ADDR_BUSINESS_POSTAL_CODE  = 0xDD2Bu, // Postal Address Business Postal Code
+  MTP_OBJ_PROP_ADDR_BUSINESS_COUNTRY      = 0xDD2Cu, // Postal Address Business Country
+  MTP_OBJ_PROP_ADDR_OTHER_FULL            = 0xDD2Du, // Postal Address Other Full
+  MTP_OBJ_PROP_ADDR_OTHER_LINE1           = 0xDD2Eu, // Postal Address Other Line 1
+  MTP_OBJ_PROP_ADDR_OTHER_LINE2           = 0xDD2Fu, // Postal Address Other Line 2
+  MTP_OBJ_PROP_ADDR_OTHER_CITY            = 0xDD30u, // Postal Address Other City
+  MTP_OBJ_PROP_ADDR_OTHER_REGION          = 0xDD31u, // Postal Address Other Region
+  MTP_OBJ_PROP_ADDR_OTHER_POSTAL_CODE     = 0xDD32u, // Postal Address Other Postal Code
+  MTP_OBJ_PROP_ADDR_OTHER_COUNTRY         = 0xDD33u, // Postal Address Other Country
+  MTP_OBJ_PROP_ORGANIZATION_NAME          = 0xDD34u, // Organization Name
+  MTP_OBJ_PROP_PHONETIC_ORG_NAME          = 0xDD35u, // Phonetic Organization Name
+  MTP_OBJ_PROP_ROLE                       = 0xDD36u, // Role
+  MTP_OBJ_PROP_BIRTHDATE                  = 0xDD37u, // Birthdate
+  // 0xDD38-0xDD3F is reserved
+
+  MTP_OBJ_PROP_MESSAGE_TO                 = 0xDD40u, // Message To
+  MTP_OBJ_PROP_MESSAGE_CC                 = 0xDD41u, // Message CC
+  MTP_OBJ_PROP_MESSAGE_BCC                = 0xDD42u, // Message BCC
+  MTP_OBJ_PROP_MESSAGE_READ               = 0xDD43u, // Message Read
+  MTP_OBJ_PROP_MESSAGE_RECEIVED_TIME      = 0xDD44u, // Message Received Time
+  MTP_OBJ_PROP_MESSAGE_SENDER             = 0xDD45u, // Message Sender
+  // 0xDD46-0xDD4F is reserved
+
+  MTP_OBJ_PROP_ACTIVITY_BEGIN_TIME        = 0xDD50u, // Activity Begin Time
+  MTP_OBJ_PROP_ACTIVITY_END_TIME          = 0xDD51u, // Activity End Time
+  MTP_OBJ_PROP_ACTIVITY_LOCATION          = 0xDD52u, // Activity Location
+  // 0xDD53 is reserved
+  MTP_OBJ_PROP_ACTIVITY_REQUIRED_ATTENDEES= 0xDD54u, // Activity Required Attendees
+  MTP_OBJ_PROP_ACTIVITY_OPTIONAL_ATTENDEES= 0xDD55u, // Activity Optional Attendees
+  MTP_OBJ_PROP_ACTIVITY_RESOURCES         = 0xDD56u, // Activity Resources
+  MTP_OBJ_PROP_ACTIVITY_ACCEPTED          = 0xDD57u, // Activity Accepted
+  MTP_OBJ_PROP_ACTIVITY_TENTATIVE         = 0xDD58u, // Activity Tentative
+  MTP_OBJ_PROP_ACTIVITY_DECLINED          = 0xDD59u, // Activity Declined
+  MTP_OBJ_PROP_ACTIVITY_REMINDER_TIME     = 0xDD5Au, // Activity Reminder Time
+  MTP_OBJ_PROP_ACTIVITY_OWNER             = 0xDD5Bu, // Activity Owner
+  MTP_OBJ_PROP_ACTIVITY_STATUS            = 0xDD5Cu, // Activity Status
+  MTP_OBJ_PROP_OWNER                      = 0xDD5Du, // Owner
+  MTP_OBJ_PROP_EDITOR                     = 0xDD5Eu, // Editor
+  MTP_OBJ_PROP_WEBMASTER                  = 0xDD5Fu, // Webmaster
+
+  MTP_OBJ_PROP_URL_SOURCE                 = 0xDD60u, // URL Source
+  MTP_OBJ_PROP_URL_DESTINATION            = 0xDD61u, // URL Destination
+  MTP_OBJ_PROP_TIME_BOOKMARK              = 0xDD62u, // Time Bookmark
+  MTP_OBJ_PROP_OBJECT_BOOKMARK            = 0xDD63u, // Object Bookmark
+  MTP_OBJ_PROP_BYTE_BOOKMARK              = 0xDD64u, // Byte Bookmark
+  // 0xDD65-0xDD6F is reserved
+
+  MTP_OBJ_PROP_LAST_BUILD_DATE            = 0xDD70u, // Last Build Date
+  MTP_OBJ_PROP_TIME_TO_LIVE               = 0xDD71u, // Time to Live (minutes)
+  MTP_OBJ_PROP_MEDIA_GUID                 = 0xDD72u, // Media GUID
+  // 0xDD73-0xDDFF is reserved
+
+  // media encoding
+  MTP_OBJ_PROP_TOTAL_BITRATE              = 0xDE91u, // Total BitRate
+  MTP_OBJ_PROP_BITRATE_TYPE               = 0xDE92u, // Bitrate Type
+  MTP_OBJ_PROP_SAMPLE_RATE                = 0xDE93u, // Sample Rate
+  MTP_OBJ_PROP_NUM_CHANNELS               = 0xDE94u, // Number Of Channels
+  MTP_OBJ_PROP_AUDIO_BITDEPTH             = 0xDE95u, // Audio BitDepth
+  // 0xDE96 is reserved
+  MTP_OBJ_PROP_SCAN_TYPE                  = 0xDE97u, // Scan Type
+  // 0xDE98 is reserved
+  MTP_OBJ_PROP_AUDIO_WAVE_CODEC           = 0xDE99u, // Audio WAVE Codec
+  MTP_OBJ_PROP_AUDIO_BITRATE              = 0xDE9Au, // Audio BitRate
+  MTP_OBJ_PROP_VIDEO_FOURCC_CODEC         = 0xDE9Bu, // Video FourCC Codec
+  MTP_OBJ_PROP_VIDEO_BITRATE              = 0xDE9Cu, // Video BitRate
+  MTP_OBJ_PROP_FRAMES_PER_KSEC            = 0xDE9Du, // Frames Per Thousand Seconds
+  MTP_OBJ_PROP_KEYFRAME_DISTANCE          = 0xDE9Eu, // KeyFrame Distance (ms)
+  MTP_OBJ_PROP_BUFFER_SIZE                = 0xDE9Fu, // Buffer Size
+  MTP_OBJ_PROP_ENCODING_QUALITY           = 0xDEA0u, // Encoding Quality
+  MTP_OBJ_PROP_ENCODING_PROFILE           = 0xDEA1u  // Encoding Profile
+} mtp_object_properties_t;
+
+
+// MTP 1.1 Appendeix C: Device Properties
+typedef enum {
+  MTP_DEV_PROP_UNDEFINED                      = 0x5000u,
+  MTP_DEV_PROP_BATTERY_LEVEL                  = 0x5001u,
+  MTP_DEV_PROP_FUNCTIONAL_MODE                = 0x5002u,
+  MTP_DEV_PROP_IMAGE_SIZE                     = 0x5003u,
+  MTP_DEV_PROP_COMPRESSION_SETTING            = 0x5004u,
+  MTP_DEV_PROP_WHITE_BALANCE                  = 0x5005u,
+  MTP_DEV_PROP_RGB_GAIN                       = 0x5006u,
+  MTP_DEV_PROP_F_NUMBER                       = 0x5007u,
+  MTP_DEV_PROP_FOCAL_LENGTH                   = 0x5008u,
+  MTP_DEV_PROP_FOCUS_DISTANCE                 = 0x5009u,
+  MTP_DEV_PROP_FOCUS_MODE                     = 0x500Au,
+  MTP_DEV_PROP_EXPOSURE_METERING_MODE         = 0x500Bu,
+  MTP_DEV_PROP_FLASH_MODE                     = 0x500Cu,
+  MTP_DEV_PROP_EXPOSURE_TIME                  = 0x500Du,
+  MTP_DEV_PROP_EXPOSURE_PROGRAM_MODE          = 0x500Eu,
+  MTP_DEV_PROP_EXPOSURE_INDEX                 = 0x500Fu,
+  MTP_DEV_PROP_EXPOSURE_BIAS_COMPENSATION     = 0x5010u,
+  MTP_DEV_PROP_DATE_TIME                      = 0x5011u,
+  MTP_DEV_PROP_CAPTURE_DELAY                  = 0x5012u,
+  MTP_DEV_PROP_STILL_CAPTURE_MODE             = 0x5013u,
+  MTP_DEV_PROP_CONTRAST                       = 0x5014u,
+  MTP_DEV_PROP_SHARPNESS                      = 0x5015u,
+  MTP_DEV_PROP_DIGITAL_ZOOM                   = 0x5016u,
+  MTP_DEV_PROP_EFFECT_MODE                    = 0x5017u,
+  MTP_DEV_PROP_BURST_NUMBER                   = 0x5018u,
+  MTP_DEV_PROP_BURST_INTERVAL                 = 0x5019u,
+  MTP_DEV_PROP_TIMELAPSE_NUMBER               = 0x501Au,
+  MTP_DEV_PROP_TIMELAPSE_INTERVAL             = 0x501Bu,
+  MTP_DEV_PROP_FOCUS_METERING_MODE            = 0x501Cu,
+  MTP_DEV_PROP_UPLOAD_URL                     = 0x501Du,
+  MTP_DEV_PROP_ARTIST                         = 0x501Eu,
+  MTP_DEV_PROP_COPYRIGHT_INFO                 = 0x501Fu,
+  MTP_DEV_PROP_SYNCHRONIZTION_PARTNER         = 0xD401,
+  MTP_DEV_PROP_DEVICE_FRIENDLY_NAME           = 0xD402u,
+  MTP_DEV_PROP_VOLUME                         = 0xD403u,
+  MTP_DEV_PROP_SUPPORTED_FORMATS_ORDERED      = 0xD404u,
+  MTP_DEV_PROP_DEVICE_ICON                    = 0xD405u,
+  MTP_DEV_PROP_SECTION_INITIATOR_VERSION_INFO = 0xD406u,
+  MTP_DEV_PROP_PERCEIVED_DEVICE_TYPE          = 0xD407u,
+  MTP_DEV_PROP_PLAYBACK_RATE                  = 0xD410u,
+  MTP_DEV_PROP_PLAYBACK_OBJECT                = 0xD411u,
+  MTP_DEV_PROP_PLAYBACK_CONTAINER_INDEX       = 0xD412u,
+} mtp_event_properties_t;
+
+// MTP 1.1 Appendix D: Operations
+typedef enum {
+  MTP_OP_UNDEFINED                  = 0x1000u,
+  MTP_OP_GET_DEVICE_INFO            = 0x1001u,
+  MTP_OP_OPEN_SESSION               = 0x1002u,
+  MTP_OP_CLOSE_SESSION              = 0x1003u,
+  MTP_OP_GET_STORAGE_IDS            = 0x1004u,
+  MTP_OP_GET_STORAGE_INFO           = 0x1005u,
+  MTP_OP_GET_NUM_OBJECTS            = 0x1006u,
+  MTP_OP_GET_OBJECT_HANDLES         = 0x1007u,
+  MTP_OP_GET_OBJECT_INFO            = 0x1008u,
+  MTP_OP_GET_OBJECT                 = 0x1009u,
+  MTP_OP_GET_THUMB                  = 0x100Au,
+  MTP_OP_DELETE_OBJECT              = 0x100Bu,
+  MTP_OP_SEND_OBJECT_INFO           = 0x100Cu,
+  MTP_OP_SEND_OBJECT                = 0x100Du,
+  MTP_OP_INITIATE_CAPTURE           = 0x100Eu,
+  MTP_OP_FORMAT_STORE               = 0x100Fu,
+  MTP_OP_RESET_DEVICE               = 0x1010u,
+  MTP_OP_SELF_TEST                  = 0x1011u,
+  MTP_OP_SET_OBJECT_PROTECTION      = 0x1012u,
+  MTP_OP_POWER_DOWN                 = 0x1013u,
+  MTP_OP_GET_DEVICE_PROP_DESC       = 0x1014u,
+  MTP_OP_GET_DEVICE_PROP_VALUE      = 0x1015u,
+  MTP_OP_SET_DEVICE_PROP_VALUE      = 0x1016u,
+  MTP_OP_RESET_DEVICE_PROP_VALUE    = 0x1017u,
+  MTP_OP_TERMINATE_OPEN_CAPTURE     = 0x1018u,
+  MTP_OP_MOVE_OBJECT                = 0x1019u,
+  MTP_OP_COPY_OBJECT                = 0x101Au,
+  MTP_OP_GET_PARTIAL_OBJECT         = 0x101Bu,
+  MTP_OP_INITIATE_OPEN_CAPTURE      = 0x101Bu,
+  MTP_OP_GET_OBJECT_PROPS_SUPPORTED = 0x9801u,
+  MTP_OP_GET_OBJECT_PROP_DESC       = 0x9802u,
+  MTP_OP_GET_OBJECT_PROP_VALUE      = 0x9803u,
+  MTP_OP_SET_OBJECT_PROP_VALUE      = 0x9804u,
+  MTP_OP_GET_OBJECT_PROPLIST        = 0x9805u,
+  MTP_OP_GET_OBJECT_PROP_REFERENCES = 0x9810u,
+
+  MTP_OP_GET_SERVICE_IDS            = 0x9301u,
+  MTP_OP_GET_SERVICE_INFO           = 0x9302u,
+  MTP_OP_GET_SERVICE_CAPABILITIES   = 0x9303u,
+  MTP_OP_GET_SERVICE_PROP_DESC      = 0x9304u,
+
+  // Appendix E: Enhanced Operations
+  MTP_OP_GET_OBJECT_PROP_LIST         = 0x9805u,
+  MTP_OP_SET_OBJECT_PROP_LIST         = 0x9806u,
+  MTP_OP_GET_INTERDEPENDENT_PROP_DESC = 0x9807u,
+  MTP_OP_SEND_OBJECT_PROP_LIST        = 0x9808u,
+} mtp_operation_code_t;
+
+// Appendix F: Responses
+typedef enum {
+  MTP_RESP_UNDEFINED                           = 0x2000u,
+  MTP_RESP_OK                                  = 0x2001u,
+  MTP_RESP_GENERAL_ERROR                       = 0x2002u,
+  MTP_RESP_SESSION_NOT_OPEN                    = 0x2003u,
+  MTP_RESP_INVALID_TRANSACTION_ID              = 0x2004u,
+  MTP_RESP_OPERATION_NOT_SUPPORTED             = 0x2005u,
+  MTP_RESP_PARAMETER_NOT_SUPPORTED             = 0x2006u,
+  MTP_RESP_INCOMPLETE_TRANSFER                 = 0x2007u,
+  MTP_RESP_INVALID_STORAGE_ID                  = 0x2008u,
+  MTP_RESP_INVALID_OBJECT_HANDLE               = 0x2009u,
+  MTP_RESP_DEVICE_PROP_NOT_SUPPORTED           = 0x200Au,
+  MTP_RESP_INVALID_OBJECT_FORMAT_CODE          = 0x200Bu,
+  MTP_RESP_STORE_FULL                          = 0x200Cu,
+  MTP_RESP_OBJECT_WRITE_PROTECTED              = 0x200Du,
+  MPT_RESC_STORE_READ_ONLY                     = 0x200Eu,
+  MTP_RESP_ACCESS_DENIED                       = 0x200Fu,
+  MTP_RESP_NO_THUMBNAIL_PRESENT                = 0x2010u,
+  MTP_RESP_SELF_TEST_FAILED                    = 0x2011u,
+  MTP_RESP_PARTIAL_DELETION                    = 0x2012u,
+  MTP_RESP_STORE_NOT_AVAILABLE                 = 0x2013u,
+  MTP_RESP_SPECIFICATION_BY_FORMAT_UNSUPPORTED = 0x2014u,
+  MTP_RESP_NO_VALID_OBJECTINFO                 = 0x2015u,
+  MTP_RESP_INVALID_CODE_FORMAT                 = 0x2016u,
+  MTP_RESP_UNKNOWN_VENDOR_CODE                 = 0x2017u,
+  MTP_RESP_CAPTURE_ALREADY_TERMINATED          = 0x2018u,
+  MTP_RESP_DEVICE_BUSY                         = 0x2019u,
+  MTP_RESP_INVALID_PARENT_OBJECT               = 0x201Au,
+  MTP_RESP_INVALID_DEVICE_PROP_FORMAT          = 0x201Bu,
+  MTP_RESP_INVALID_DEVICE_PROP_VALUE           = 0x201Cu,
+  MTP_RESP_INVALID_PARAMETER                   = 0x201Du,
+  MTP_RESP_SESSION_ALREADY_OPEN                = 0x201Eu,
+  MTP_RESP_TRANSACTION_CANCELLED               = 0x201Fu,
+  MTP_RESP_SPEC_OF_DESTINATION_UNSUPPORTED     = 0x2020u,
+
+  MTP_RESP_INVALID_OBJECT_PROP_CODE            = 0xA801u,
+  MTP_RESP_INVALID_OBJECT_PROP_FORMAT          = 0xA802u,
+  MTP_RESP_INVALID_OBJECT_PROP_VALUE           = 0xA803u,
+  MTP_RESP_INVALID_OBJECT_REFERENCE            = 0xA804u,
+  MTP_RESP_GROUP_NOT_SUPPORTED                 = 0xA805u,
+  MTP_RESP_INVALID_DATASET                     = 0xA806u,
+  MTP_RESP_SPEC_BY_GROUP_UNSUPPORTED           = 0xA807u,
+  MTP_RESP_SPEC_BY_DEPTH_UNSUPPORTED           = 0xA808u,
+  MTP_RESP_OBJECT_TOO_LARGE                    = 0xA809u,
+  MTP_RESP_OBJECT_PROP_NOT_SUPPORTED           = 0xA80Au,
+} mtp_response_t;
+
+// Appendix G: Events
+typedef enum {
+  MTP_EVENT_UNDEFINED                 = 0x4000,
+  MTP_EVENT_CANCEL_TRANSACTION        = 0x4001,
+  MTP_EVENT_OBJECT_ADDED              = 0x4002,
+  MTP_EVENT_OBJECT_REMOVED            = 0x4003,
+  MTP_EVENT_STORE_ADDED               = 0x4004,
+  MTP_EVENT_STORE_REMOVED             = 0x4005,
+  MTP_EVENT_DEVICE_PROP_CHANGED       = 0x4006,
+  MTP_EVENT_OBJECT_INFO_CHANGED       = 0x4007,
+  MTP_EVENT_DEVICE_INFO_CHANGED       = 0x4008,
+  MTP_EVENT_REQUEST_OBJECT_TRANSFER   = 0x4009,
+  MTP_EVENT_STORE_FULL                = 0x400Au,
+  MTP_EVENT_DEVICE_RESET              = 0x400Bu,
+  MTP_EVENT_STORAGE_INFO_CHANGED      = 0x400Cu,
+  MTP_EVENT_CAPTURE_COMPLETE          = 0x400Du,
+  MTP_EVENT_UNREPORTED_STATUS         = 0x400Eu,
+  MTP_EVENT_OBJECT_PROP_CHANGED       = 0xC801u,
+  MTP_EVENT_OBJECT_PROP_DESC_CHANGED  = 0xC802u,
+  MTP_EVENT_OBJECT_REFERENCES_CHANGED = 0xC803u,
+} mtp_event_code_t;
+
+// Datatypes
+typedef enum {
+  MTP_DATA_TYPE_UNDEFINED = 0x0000u,
+  // scalars
+  MTP_DATA_TYPE_INT8      = 0x0001u,
+  MTP_DATA_TYPE_UINT8     = 0x0002u,
+  MTP_DATA_TYPE_INT16     = 0x0003u,
+  MTP_DATA_TYPE_UINT16    = 0x0004u,
+  MTP_DATA_TYPE_INT32     = 0x0005u,
+  MTP_DATA_TYPE_UINT32    = 0x0006u,
+  MTP_DATA_TYPE_INT64     = 0x0007u,
+  MTP_DATA_TYPE_UINT64    = 0x0008u,
+  MTP_DATA_TYPE_INT128    = 0x0009u,
+  MTP_DATA_TYPE_UINT128   = 0x000Au,
+  // array
+  MTP_DATA_TYPE_AINT8     = 0x4001u,
+  MTP_DATA_TYPE_AUINT8    = 0x4002u,
+  MTP_DATA_TYPE_AINT16    = 0x4003u,
+  MTP_DATA_TYPE_AUINT16   = 0x4004u,
+  MTP_DATA_TYPE_AINT32    = 0x4005u,
+  MTP_DATA_TYPE_AUINT32   = 0x4006u,
+  MTP_DATA_TYPE_AINT64    = 0x4007u,
+  MTP_DATA_TYPE_AUINT64   = 0x4008u,
+  MTP_DATA_TYPE_AINT128   = 0x4009u,
+  MTP_DATA_TYPE_AUINT128  = 0x400Au,
+  MTP_DATA_TYPE_STR       = 0xFFFFu,
+} mtp_data_type_t;
+
+// Get/Set
+typedef enum {
+  MTP_MODE_GET     = 0x00u,
+  MTP_MODE_GET_SET = 0x01u,
+} mtp_mode_get_set_t;
+
+typedef enum {
+  MTP_STORAGE_TYPE_UNDEFINED     = 0x0000u,
+  MTP_STORAGE_TYPE_FIXED_ROM     = 0x0001u,
+  MTP_STORAGE_TYPE_REMOVABLE_ROM = 0x0002u,
+  MTP_STORAGE_TYPE_FIXED_RAM     = 0x0003u,
+  MTP_STORAGE_TYPE_REMOVABLE_RAM = 0x0004u,
+} mtp_storage_type_t;
+
+typedef enum {
+  MTP_FILESYSTEM_TYPE_UNDEFINED            = 0x0000u,
+  MTP_FILESYSTEM_TYPE_GENERIC_FLAT         = 0x0001u,
+  MTP_FILESYSTEM_TYPE_GENERIC_HIERARCHICAL = 0x0002u,
+  MTP_FILESYSTEM_TYPE_DCF                  = 0x0003u,
+} mtp_filesystem_type_t;
+
+typedef enum {
+  MTP_ACCESS_CAPABILITY_READ_WRITE                        = 0x0000u,
+  MTP_ACCESS_CAPABILITY_READ_ONLY_WITHOUT_OBJECT_DELETION = 0x0001u,
+  MTP_ACCESS_CAPABILITY_READ_ONLY_WITH_OBJECT_DELETION    = 0x0002u,
+} mtp_access_capability_t;
+
+typedef enum {
+  MTP_PROTECTION_STATUS_NO_PROTECTION  = 0x0000u,
+  MTP_PROTECTION_STATUS_READ_ONLY      = 0x0001u,
+  MTP_PROTECTION_STATUS_READ_ONLY_DATA = 0x8002u,
+  MTP_PROTECTION_NON_TRANSFERABLE_DATA = 0x8003u,
+} mtp_protection_status_t;
+
+typedef enum {
+  MTP_ASSOCIATION_UNDEFINED            = 0x0000u,
+  MTP_ASSOCIATION_GENERIC_FOLDER       = 0x0001u,
+  MTP_ASSOCIATION_ALBUM                = 0x0002u,
+  MTP_ASSOCIATION_TIME_SEQUENCE        = 0x0003u,
+  MTP_ASSOCIATION_HORIZONTAL_PANORAMIC = 0x0004u,
+  MTP_ASSOCIATION_VERTICAL_PANORAMIC   = 0x0005u,
+  MTP_ASSOCIATION_2D_PANORAMIC         = 0x0006u,
+  MTP_ASSOCIATION_ANCILLARY_DATA       = 0x0007u,
+} mtp_association_t;
+
+//--------------------------------------------------------------------+
+// Data structures
+//--------------------------------------------------------------------+
+typedef struct TU_ATTR_PACKED {
+  uint32_t len;
+  uint16_t type;
+  uint16_t code;
+  uint32_t transaction_id;
+} mtp_container_header_t;
+TU_VERIFY_STATIC(sizeof(mtp_container_header_t) == 12, "size is not correct");
+
+typedef struct TU_ATTR_PACKED {
+  mtp_container_header_t header;
+  uint32_t params[5];
+} mtp_container_command_t;
+TU_VERIFY_STATIC(sizeof(mtp_container_command_t) == 32, "size is not correct");
+
+// PTP/MTP Generic container
+typedef struct TU_ATTR_PACKED {
+  mtp_container_header_t header;
+  uint8_t payload[(CFG_TUD_MTP_EP_BUFSIZE - sizeof(mtp_container_header_t))];
+} mtp_generic_container_t;
+
+typedef struct {
+  mtp_container_header_t* header;
+  union {
+    uint8_t*  payload;
+    uint16_t* payload16;
+    uint32_t* payload32;
+  };
+  uint32_t payload_bytes; // available bytes for read/write
+} mtp_container_info_t;
+
+typedef struct TU_ATTR_PACKED {
+  uint16_t code;
+  uint32_t session_id;
+  uint32_t transaction_id;
+  uint32_t params[3];
+} mtp_event_t;
+TU_VERIFY_STATIC(sizeof(mtp_event_t) == 22, "size is not correct");
+
+#define mtp_string_t(_nchars) \
+  struct TU_ATTR_PACKED { \
+    uint8_t count; /* in characters including null */ \
+    uint16_t utf16[_nchars]; \
+  }
+
+#define mtp_array_t(_type, _count) \
+   struct TU_ATTR_PACKED { \
+     uint32_t count; \
+     _type arr[_count];\
+   }
+
+#define mtp_aint8_t(_count)  mtp_array_t(int8_t, _count)
+#define mtp_auint16_t(_count) mtp_array_t(uint16_t, _count)
+#define mtp_auint32_t(_count) mtp_array_t(uint32_t, _count)
+#define mtp_auint64_t(_count) mtp_array_t(uint64_t, _count)
+
+#define MTP_STORAGE_INFO_STRUCT(_storage_desc_chars, _volume_id_chars) \
+  struct TU_ATTR_PACKED { \
+    uint16_t storage_type; \
+    uint16_t filesystem_type; \
+    uint16_t access_capability; \
+    uint64_t max_capacity_in_bytes; \
+    uint64_t free_space_in_bytes; \
+    uint32_t free_space_in_objects; \
+    mtp_string_t(_storage_desc_chars) storage_description; \
+    mtp_string_t(_volume_id_chars) volume_identifier; \
+  }
+
+// Object Info Dataset without dynamic string: filename, date_created, date_modified, keywords
+typedef struct TU_ATTR_PACKED {
+  uint32_t storage_id;
+  uint16_t object_format;
+  uint16_t protection_status;
+  uint32_t object_compressed_size;
+  uint16_t thumb_format;
+  uint32_t thumb_compressed_size;
+  uint32_t thumb_pix_width;
+  uint32_t thumb_pix_height;
+  uint32_t image_pix_width;
+  uint32_t image_pix_height;
+  uint32_t image_bit_depth;
+  uint32_t parent_object; // 0: root
+  uint16_t association_type;
+  uint32_t association_desc;
+  uint32_t sequence_number;
+  // mtp_string_t() filename
+  // mtp_string_t() date_created
+  // mtp_string_t() date_modified
+  // mtp_string_t() keywords
+} mtp_object_info_header_t;
+
+// Device property desc up to get/set
+typedef struct TU_ATTR_PACKED {
+  uint16_t device_property_code;
+  uint16_t datatype;
+  uint8_t  get_set;
+} mtp_device_prop_desc_header_t;
+
+// The following fields will be dynamically added to the struct at runtime:
+// - wstring factory_def_value;
+// - wstring current_value_len;
+// - uint8_t form_flag;
+
+// no form
+#define MTP_DEVICE_PROPERTIES_STRUCT(_type) \
+   struct TU_ATTR_PACKED { \
+     uint16_t device_property_code; \
+     uint16_t datatype; \
+     uint8_t get_set; \
+     _type factory_default; \
+     _type current_value; \
+     uint8_t form_flag; /* 0: none, 1: range, 2: enum */ \
+   };
+
+typedef struct TU_ATTR_PACKED {
+  uint16_t code;
+  uint32_t transaction_id;
+} mtp_request_reset_cancel_data_t;
+TU_VERIFY_STATIC(sizeof(mtp_request_reset_cancel_data_t) == 6, "size is not correct");
+
+//--------------------------------------------------------------------+
+// Container helper function
+// return number of bytes added
+//--------------------------------------------------------------------+
+
+// return payload buffer for next write
+TU_ATTR_ALWAYS_INLINE static inline uint8_t* mtp_container_payload_ptr(mtp_container_info_t* p_container) {
+  // only 1st packet include header
+  uint32_t pos = p_container->header->len - sizeof(mtp_container_header_t);
+  while (pos > CFG_TUD_MTP_EP_BUFSIZE) {
+    pos -= CFG_TUD_MTP_EP_BUFSIZE;
+  }
+  return p_container->payload + pos;
+}
+
+// only add_raw does partial copy
+TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_raw(mtp_container_info_t* p_container, const void* data, uint32_t len) {
+  uint8_t* buf = mtp_container_payload_ptr(p_container);
+  const uint32_t added_len = tu_min32(len, CFG_TUD_MTP_EP_BUFSIZE - p_container->header->len);
+  if (added_len > 0) {
+    memcpy(buf, data, added_len);
+  }
+  p_container->header->len += len; // always increase len, even partial copy
+  return added_len;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_array(mtp_container_info_t* p_container, uint8_t scalar_size, uint32_t count, const void* data) {
+  const uint32_t added_len = 4 + count * scalar_size;
+  TU_ASSERT(p_container->header->len + added_len < CFG_TUD_MTP_EP_BUFSIZE, 0);
+  uint8_t* buf = p_container->payload + p_container->header->len - sizeof(mtp_container_header_t);
+
+  tu_unaligned_write32(buf, count);
+  p_container->header->len += 4;
+  buf += 4;
+
+  memcpy(buf, data, count * scalar_size);
+  p_container->header->len += count * scalar_size;
+
+  return added_len;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_string(mtp_container_info_t* p_container, uint16_t* utf16) {
+  uint8_t count = 0;
+  while (utf16[count] != 0u) {
+    count++;
+  }
+  const uint32_t added_len = 1u + (uint32_t) count * 2u;
+  TU_ASSERT(p_container->header->len + added_len < CFG_TUD_MTP_EP_BUFSIZE, 0);
+  uint8_t* buf = p_container->payload + p_container->header->len - sizeof(mtp_container_header_t);
+
+  *buf++ = count;
+  p_container->header->len++;
+
+  memcpy(buf, utf16, 2u * (uint32_t) count);
+  p_container->header->len += 2u * count;
+
+  return added_len;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_cstring(mtp_container_info_t* p_container, const char* str) {
+  const uint8_t len = (uint8_t) (strlen(str) + 1); // include null
+  TU_ASSERT(p_container->header->len + 1 + 2 * len < CFG_TUD_MTP_EP_BUFSIZE, 0);
+  uint8_t* buf = p_container->payload + p_container->header->len - sizeof(mtp_container_header_t);
+
+  if (len == 1) {
+    // empty string (null only): single zero byte
+    *buf = 0;
+    p_container->header->len++;
+    return 1u;
+  } else {
+    *buf++ = len;
+    p_container->header->len++;
+
+    for (uint8_t i = 0; i < len; i++) {
+      buf[0] = str[i];
+      buf[1] = 0;
+      buf += 2;
+      p_container->header->len += 2;
+    }
+    return 1u + 2u * len;
+  }
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_uint8(mtp_container_info_t* p_container, uint8_t data) {
+  return mtp_container_add_raw(p_container, &data, 1);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_uint16(mtp_container_info_t* p_container, uint16_t data) {
+  return mtp_container_add_raw(p_container, &data, 2);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_uint32(mtp_container_info_t* p_container, uint32_t data) {
+  return mtp_container_add_raw(p_container, &data, 4);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_uint64(mtp_container_info_t* p_container, uint64_t data) {
+  return mtp_container_add_raw(p_container, &data, 8);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_uint128(mtp_container_info_t* p_container, const void* data) {
+  return mtp_container_add_raw(p_container, data, 16);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_auint8(mtp_container_info_t* p_container, uint32_t count, const uint8_t* data) {
+  return mtp_container_add_array(p_container, sizeof(uint8_t), count, data);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_auint16(mtp_container_info_t* p_container, uint32_t count, const uint16_t* data) {
+  return mtp_container_add_array(p_container, sizeof(uint16_t), count, data);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_auint32(mtp_container_info_t* p_container, uint32_t count, const uint32_t* data) {
+  return mtp_container_add_array(p_container, sizeof(uint32_t), count, data);
+}
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_get_string(uint8_t* buf, uint16_t utf16[]) {
+  size_t nchars = *buf++;
+  memcpy(utf16, buf, 2u * nchars);
+  return 1u + 2u * nchars;
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
+#endif
@@ -0,0 +1,169 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Ennebi Elettronica (https://ennebielettronica.com)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_MTP_DEVICE_H_
+#define TUSB_MTP_DEVICE_H_
+
+#include "common/tusb_common.h"
+#include "mtp.h"
+
+#if (CFG_TUD_ENABLED && CFG_TUD_MTP)
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// callback data for Bulk Only Transfer (BOT) protocol
+typedef struct {
+  uint8_t idx; // mtp instance
+  uint8_t phase; // current phase
+  uint32_t session_id;
+
+  const mtp_container_command_t* command_container;
+  mtp_container_info_t io_container;
+
+  tusb_xfer_result_t xfer_result;
+  uint32_t total_xferred_bytes; // number of bytes transferred so far in this phase
+} tud_mtp_cb_data_t;
+
+// callback data for Control requests
+typedef struct {
+  uint8_t idx;
+  uint8_t stage; // control stage
+
+  // buffer for data stage
+  uint16_t bufsize;
+  uint8_t* buf;
+
+  const tusb_control_request_t* request;
+
+  uint32_t session_id;
+} tud_mtp_request_cb_data_t;
+
+// Number of supported operations, events, device properties, capture formats, playback formats
+// and max number of characters for strings manufacturer, model, device_version, serial_number
+#define MTP_DEVICE_INFO_STRUCT(_extension_nchars, _op_count, _event_count, _devprop_count, _capture_count, _playback_count) \
+  struct TU_ATTR_PACKED { \
+    uint16_t standard_version; \
+    uint32_t mtp_vendor_extension_id; \
+    uint16_t mtp_version; \
+    mtp_string_t(_extension_nchars) mtp_extensions; \
+    uint16_t functional_mode; \
+    mtp_auint16_t(_op_count) supported_operations; \
+    mtp_auint16_t(_event_count) supported_events; \
+    mtp_auint16_t(_devprop_count) supported_device_properties; \
+    mtp_auint16_t(_capture_count) capture_formats; \
+    mtp_auint16_t(_playback_count) playback_formats; \
+    /* string fields will be added using append function */ \
+  }
+
+typedef MTP_DEVICE_INFO_STRUCT( //-V2586 [MISRA-C-18.7] Flexible array members should not be declared
+  sizeof(CFG_TUD_MTP_DEVICEINFO_EXTENSIONS), TU_ARGS_NUM(CFG_TUD_MTP_DEVICEINFO_SUPPORTED_OPERATIONS),
+  TU_ARGS_NUM(CFG_TUD_MTP_DEVICEINFO_SUPPORTED_EVENTS), TU_ARGS_NUM(CFG_TUD_MTP_DEVICEINFO_SUPPORTED_DEVICE_PROPERTIES),
+  TU_ARGS_NUM(CFG_TUD_MTP_DEVICEINFO_CAPTURE_FORMATS), TU_ARGS_NUM(CFG_TUD_MTP_DEVICEINFO_PLAYBACK_FORMATS)
+) tud_mtp_device_info_t;
+
+//--------------------------------------------------------------------+
+// Application API
+//--------------------------------------------------------------------+
+
+// check if mtp interface is mounted
+bool tud_mtp_mounted(void);
+
+// send data phase
+bool tud_mtp_data_send(mtp_container_info_t* p_container);
+
+// receive data phase
+bool tud_mtp_data_receive(mtp_container_info_t* p_container);
+
+// send response
+bool tud_mtp_response_send(mtp_container_info_t* p_container);
+
+// send event notification on event endpoint
+bool tud_mtp_event_send(mtp_event_t* event);
+
+//--------------------------------------------------------------------+
+// Control request Callbacks
+//--------------------------------------------------------------------+
+
+// Invoked when received Cancel request. Data is available in callback data's buffer
+// return false to stall the request
+bool tud_mtp_request_cancel_cb(tud_mtp_request_cb_data_t* cb_data);
+
+// Invoked when received Device Reset request
+// return false to stall the request
+bool tud_mtp_request_device_reset_cb(tud_mtp_request_cb_data_t* cb_data);
+
+// Invoked when received Get Extended Event request. Application fill callback data's buffer for response
+// return negative to stall the request
+int32_t tud_mtp_request_get_extended_event_cb(tud_mtp_request_cb_data_t* cb_data);
+
+// Invoked when received Get DeviceStatus request. Application fill callback data's buffer for response
+// return negative to stall the request
+int32_t tud_mtp_request_get_device_status_cb(tud_mtp_request_cb_data_t* cb_data);
+
+// Invoked when received vendor-specific request not in the above standard MTP requests
+// return false to stall the request
+bool tud_mtp_request_vendor_cb(tud_mtp_request_cb_data_t* cb_data);
+
+//--------------------------------------------------------------------+
+// Bulk only protocol Callbacks
+//--------------------------------------------------------------------+
+
+// Invoked when new command is received. Application fill the cb_data->io_container and call tud_mtp_data_send() or
+// tud_mtp_response_send() for Data or Response phase.
+// Return negative to stall the endpoints
+int32_t tud_mtp_command_received_cb(tud_mtp_cb_data_t * cb_data);
+
+// Invoked when a data packet is transferred. If data spans over multiple packets, application can use
+// total_xferred_bytes and io_container's payload_bytes to determine the offset and remaining bytes to be transferred.
+// Return negative to stall the endpoints
+int32_t tud_mtp_data_xfer_cb(tud_mtp_cb_data_t* cb_data);
+
+// Invoked when all bytes in DATA phase is complete. A response packet is expected
+// Return negative to stall the endpoints
+int32_t tud_mtp_data_complete_cb(tud_mtp_cb_data_t* cb_data);
+
+// Invoked when response phase is complete
+// Return negative to stall the endpoints
+int32_t tud_mtp_response_complete_cb(tud_mtp_cb_data_t* cb_data);
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void     mtpd_init            (void);
+bool     mtpd_deinit          (void);
+void     mtpd_reset           (uint8_t rhport);
+uint16_t mtpd_open            (uint8_t rhport, tusb_desc_interface_t const *itf_desc, uint16_t max_len);
+bool     mtpd_control_xfer_cb (uint8_t rhport, uint8_t stage, tusb_control_request_t const *p_request);
+bool     mtpd_xfer_cb         (uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
+#endif
@@ -0,0 +1,164 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ * Copyright (c) 2024, Hardy Griech
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_NCM_H_
+#define TUSB_NCM_H_
+
+#include "common/tusb_common.h"
+
+// NTB buffers size for reception side, must be >> MTU to avoid TCP retransmission (driver issue ?)
+// Linux use 2048 as minimal size
+#ifndef CFG_TUD_NCM_OUT_NTB_MAX_SIZE
+  #define CFG_TUD_NCM_OUT_NTB_MAX_SIZE 3200
+#endif
+
+// NTB buffers size for reception side, must be > MTU
+// Linux use 2048 as minimal size
+#ifndef CFG_TUD_NCM_IN_NTB_MAX_SIZE
+  #define CFG_TUD_NCM_IN_NTB_MAX_SIZE 3200
+#endif
+
+// Number of NTB buffers for reception side
+// Depending on the configuration, this parameter could be increased with the cost of additional RAM requirements
+// On Full-Speed (RP2040) :
+//    1  - good performance
+//    2  - up to 30% more performance with iperf with small packets
+//    >2 - no performance gain
+// On High-Speed (STM32F7) :
+//    No performance gain
+#ifndef CFG_TUD_NCM_OUT_NTB_N
+  #define CFG_TUD_NCM_OUT_NTB_N 1
+#endif
+
+// Number of NTB buffers for transmission side
+// Depending on the configuration, this parameter could be increased with the cost of additional RAM requirements
+// On Full-Speed (RP2040) :
+//    1 - good performance but SystemView shows lost events (on load test)
+//    2 - up to 50% more performance with iperf with small packets, "tud_network_can_xmit: request blocked"
+//        happens from time to time with SystemView
+//    3 - "tud_network_can_xmit: request blocked" never happens
+//    >3 - no performance gain
+// On High-Speed (STM32F7) :
+//    No performance gain
+#ifndef CFG_TUD_NCM_IN_NTB_N
+  #define CFG_TUD_NCM_IN_NTB_N 1
+#endif
+
+// How many datagrams it is allowed to put into an NTB for transmission side
+#ifndef CFG_TUD_NCM_IN_MAX_DATAGRAMS_PER_NTB
+  #define CFG_TUD_NCM_IN_MAX_DATAGRAMS_PER_NTB 8
+#endif
+
+// This tells the host how many datagrams it is allowed to put into an NTB
+#ifndef CFG_TUD_NCM_OUT_MAX_DATAGRAMS_PER_NTB
+  #define CFG_TUD_NCM_OUT_MAX_DATAGRAMS_PER_NTB 6
+#endif
+
+// Table 6.2 Class-Specific Request Codes for Network Control Model subclass
+typedef enum
+{
+  NCM_SET_ETHERNET_MULTICAST_FILTERS               = 0x40,
+  NCM_SET_ETHERNET_POWER_MANAGEMENT_PATTERN_FILTER = 0x41,
+  NCM_GET_ETHERNET_POWER_MANAGEMENT_PATTERN_FILTER = 0x42,
+  NCM_SET_ETHERNET_PACKET_FILTER                   = 0x43,
+  NCM_GET_ETHERNET_STATISTIC                       = 0x44,
+  NCM_GET_NTB_PARAMETERS                           = 0x80,
+  NCM_GET_NET_ADDRESS                              = 0x81,
+  NCM_SET_NET_ADDRESS                              = 0x82,
+  NCM_GET_NTB_FORMAT                               = 0x83,
+  NCM_SET_NTB_FORMAT                               = 0x84,
+  NCM_GET_NTB_INPUT_SIZE                           = 0x85,
+  NCM_SET_NTB_INPUT_SIZE                           = 0x86,
+  NCM_GET_MAX_DATAGRAM_SIZE                        = 0x87,
+  NCM_SET_MAX_DATAGRAM_SIZE                        = 0x88,
+  NCM_GET_CRC_MODE                                 = 0x89,
+  NCM_SET_CRC_MODE                                 = 0x8A,
+} ncm_request_code_t;
+
+#define NTH16_SIGNATURE 0x484D434E
+#define NDP16_SIGNATURE_NCM0 0x304D434E
+#define NDP16_SIGNATURE_NCM1 0x314D434E
+
+typedef struct TU_ATTR_PACKED {
+  uint16_t wLength;
+  uint16_t bmNtbFormatsSupported;
+  uint32_t dwNtbInMaxSize;
+  uint16_t wNdbInDivisor;
+  uint16_t wNdbInPayloadRemainder;
+  uint16_t wNdbInAlignment;
+  uint16_t wReserved;
+  uint32_t dwNtbOutMaxSize;
+  uint16_t wNdbOutDivisor;
+  uint16_t wNdbOutPayloadRemainder;
+  uint16_t wNdbOutAlignment;
+  uint16_t wNtbOutMaxDatagrams;
+} ntb_parameters_t;
+
+typedef struct TU_ATTR_PACKED {
+  uint32_t dwSignature;
+  uint16_t wHeaderLength;
+  uint16_t wSequence;
+  uint16_t wBlockLength;
+  uint16_t wNdpIndex;
+} nth16_t;
+
+typedef struct TU_ATTR_PACKED {
+  uint16_t wDatagramIndex;
+  uint16_t wDatagramLength;
+} ndp16_datagram_t;
+
+typedef struct TU_ATTR_PACKED {
+  uint32_t dwSignature;
+  uint16_t wLength;
+  uint16_t wNextNdpIndex;
+  //ndp16_datagram_t datagram[];
+} ndp16_t;
+
+typedef union TU_ATTR_PACKED {
+  struct {
+    nth16_t nth;
+    ndp16_t ndp;
+    ndp16_datagram_t ndp_datagram[CFG_TUD_NCM_IN_MAX_DATAGRAMS_PER_NTB + 1];
+  };
+  uint8_t data[CFG_TUD_NCM_IN_NTB_MAX_SIZE];
+} xmit_ntb_t;
+
+typedef union TU_ATTR_PACKED {
+  struct {
+    nth16_t nth;
+    // only the header is at a guaranteed position
+  };
+  uint8_t data[CFG_TUD_NCM_OUT_NTB_MAX_SIZE];
+} recv_ntb_t;
+
+typedef struct {
+  tusb_control_request_t header;
+  uint32_t downlink;
+  uint32_t uplink;
+} ncm_notify_t;
+
+#endif
@@ -0,0 +1,117 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Peter Lawrence
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_NET_DEVICE_H_
+#define TUSB_NET_DEVICE_H_
+
+#include <stdint.h>
+#include "class/cdc/cdc.h"
+
+#if CFG_TUD_ECM_RNDIS && CFG_TUD_NCM
+#error "Cannot enable both ECM_RNDIS and NCM network drivers"
+#endif
+
+/* declared here, NOT in usb_descriptors.c, so that the driver can intelligently ZLP as needed */
+#define CFG_TUD_NET_ENDPOINT_SIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
+
+/* Maximum Transmission Unit (in bytes) of the network, including Ethernet header */
+#ifndef CFG_TUD_NET_MTU
+#define CFG_TUD_NET_MTU           1514
+#endif
+
+
+// Table 4.3 Data Class Interface Protocol Codes
+typedef enum
+{
+  NCM_DATA_PROTOCOL_NETWORK_TRANSFER_BLOCK = 0x01
+} ncm_data_interface_protocol_code_t;
+
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Implemented by Application
+//--------------------------------------------------------------------+
+#if CFG_TUD_ECM_RNDIS
+extern void rndis_class_set_handler(uint8_t *data, int size);
+#endif
+
+//--------------------------------------------------------------------+
+// Application API
+//--------------------------------------------------------------------+
+
+// indicate to network driver that client has finished with the packet provided to network_recv_cb()
+void tud_network_recv_renew(void);
+
+// poll network driver for its ability to accept another packet to transmit
+bool tud_network_can_xmit(uint16_t size);
+
+// if network_can_xmit() returns true, network_xmit() can be called once
+void tud_network_xmit(void *ref, uint16_t arg);
+
+//--------------------------------------------------------------------+
+// Application Callbacks (WEAK is optional)
+//--------------------------------------------------------------------+
+
+// client must provide this: return false if the packet buffer was not accepted
+bool tud_network_recv_cb(const uint8_t *src, uint16_t size);
+
+// client must provide this: copy from network stack packet pointer to dst
+uint16_t tud_network_xmit_cb(uint8_t *dst, void *ref, uint16_t arg);
+
+//------------- ECM/RNDIS -------------//
+
+// client must provide this: initialize any network state back to the beginning
+void tud_network_init_cb(void);
+
+// client must provide this: 48-bit MAC address
+// TODO removed later since it is not part of tinyusb stack
+extern uint8_t tud_network_mac_address[6];
+
+//------------- NCM -------------//
+
+// Set the network link state (up/down) and notify the host
+void tud_network_link_state(uint8_t rhport, bool is_up);
+
+//--------------------------------------------------------------------+
+// INTERNAL USBD-CLASS DRIVER API
+//--------------------------------------------------------------------+
+void     netd_init            (void);
+bool     netd_deinit          (void);
+void     netd_reset           (uint8_t rhport);
+uint16_t netd_open            (uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     netd_control_xfer_cb (uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+bool     netd_xfer_cb         (uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
+void     netd_report          (uint8_t *buf, uint16_t len);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* TUSB_NET_DEVICE_H_ */
@@ -0,0 +1,343 @@
+
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 N Conrad
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_USBTMC_H__
+#define TUSB_USBTMC_H__
+
+#include "common/tusb_common.h"
+
+
+/* Implements USBTMC Revision 1.0, April 14, 2003
+
+ String descriptors must have a "LANGID=0x409"/US English string.
+ Characters must be 0x20 (' ') to 0x7E ('~') ASCII,
+   But MUST not contain: "/:?\*
+   Also must not have leading or trailing space (' ')
+ Device descriptor must state USB version 0x0200 or greater
+
+ If USB488DeviceCapabilites.D2 = 1 (SR1), then there must be a INT endpoint.
+*/
+
+#define USBTMC_VERSION 0x0100
+#define USBTMC_488_VERSION 0x0100
+
+typedef enum {
+  USBTMC_MSGID_DEV_DEP_MSG_OUT = 1u,
+  USBTMC_MSGID_DEV_DEP_MSG_IN = 2u,
+  USBTMC_MSGID_VENDOR_SPECIFIC_MSG_OUT = 126u,
+  USBTMC_MSGID_VENDOR_SPECIFIC_IN = 127u,
+  USBTMC_MSGID_USB488_TRIGGER = 128u,
+} usbtmc_msgid_enum;
+
+/// \brief Message header (For BULK OUT and BULK IN); 4 bytes
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t MsgID              ; ///< Message type ID (usbtmc_msgid_enum)
+  uint8_t bTag    		       ; ///< Transfer ID 1<=bTag<=255
+  uint8_t bTagInverse        ; ///< Complement of the tag
+  uint8_t _reserved           ; ///< Must be 0x00
+} usbtmc_msg_header_t;
+
+typedef struct TU_ATTR_PACKED
+{
+  usbtmc_msg_header_t header;
+  uint8_t data[8];
+} usbtmc_msg_generic_t;
+
+/* Uses on the bulk-out endpoint: */
+// Next 8 bytes are message-specific
+typedef struct TU_ATTR_PACKED {
+	usbtmc_msg_header_t header ; ///< Header
+	uint32_t TransferSize      ; ///< Transfer size; LSB first
+	struct TU_ATTR_PACKED
+	{
+	  unsigned int EOM  : 1         ; ///< EOM set on last byte
+  } bmTransferAttributes;
+  uint8_t _reserved[3];
+} usbtmc_msg_request_dev_dep_out;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_msg_request_dev_dep_out) == 12u, "struct wrong length");
+
+// Next 8 bytes are message-specific
+typedef struct TU_ATTR_PACKED
+{
+  usbtmc_msg_header_t header ; ///< Header
+  uint32_t TransferSize      ; ///< Transfer size; LSB first
+  struct TU_ATTR_PACKED
+  {
+    unsigned int TermCharEnabled  : 1 ; ///< "The Bulk-IN transfer must terminate on the specified TermChar."; CAPABILITIES must list TermChar
+  } bmTransferAttributes;
+  uint8_t TermChar;
+  uint8_t _reserved[2];
+} usbtmc_msg_request_dev_dep_in;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_msg_request_dev_dep_in) == 12u, "struct wrong length");
+
+/* Bulk-in headers */
+
+typedef struct TU_ATTR_PACKED
+{
+  usbtmc_msg_header_t header;
+  uint32_t TransferSize;
+  struct TU_ATTR_PACKED
+  {
+    uint8_t EOM: 1;           ///< Last byte of transfer is the end of the message
+    uint8_t UsingTermChar: 1; ///< Support TermChar && Request.TermCharEnabled && last char in transfer is TermChar
+  } bmTransferAttributes;
+  uint8_t _reserved[3];
+} usbtmc_msg_dev_dep_msg_in_header_t;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_msg_dev_dep_msg_in_header_t) == 12u, "struct wrong length");
+
+/* Unsupported vendor things.... Are these ever used?*/
+
+typedef struct TU_ATTR_PACKED
+{
+  usbtmc_msg_header_t header ; ///< Header
+  uint32_t TransferSize      ; ///< Transfer size; LSB first
+  uint8_t _reserved[4];
+} usbtmc_msg_request_vendor_specific_out;
+
+
+TU_VERIFY_STATIC(sizeof(usbtmc_msg_request_vendor_specific_out) == 12u, "struct wrong length");
+
+typedef struct TU_ATTR_PACKED
+{
+  usbtmc_msg_header_t header ; ///< Header
+  uint32_t TransferSize      ; ///< Transfer size; LSB first
+  uint8_t _reserved[4];
+} usbtmc_msg_request_vendor_specific_in;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_msg_request_vendor_specific_in) == 12u, "struct wrong length");
+
+// Control request type should use tusb_control_request_t
+
+/*
+typedef struct TU_ATTR_PACKED {
+  struct {
+    unsigned int Recipient  : 5         ; ///< EOM set on last byte
+    unsigned int Type       : 2         ; ///< EOM set on last byte
+    unsigned int DirectionToHost  : 1   ; ///< 0 is OUT, 1 is IN
+  } bmRequestType;
+  uint8_t bRequest                 ; ///< If bmRequestType.Type = Class, see usmtmc_request_type_enum
+  uint16_t wValue                  ;
+  uint16_t wIndex                  ;
+  uint16_t wLength                 ; // Number of bytes in data stage
+} usbtmc_class_specific_control_req;
+
+*/
+// bulk-in protocol errors
+enum {
+  USBTMC_BULK_IN_ERR_INCOMPLETE_HEADER = 1u,
+  USBTMC_BULK_IN_ERR_UNSUPPORTED = 2u,
+  USBTMC_BULK_IN_ERR_BAD_PARAMETER = 3u,
+  USBTMC_BULK_IN_ERR_DATA_TOO_SHORT = 4u,
+  USBTMC_BULK_IN_ERR_DATA_TOO_LONG = 5u,
+};
+// built-in halt errors
+enum {
+  USBTMC_BULK_IN_ERR = 1u, ///< receives a USBTMC command message that expects a response while a
+                           /// Bulk-IN transfer is in progress
+};
+
+typedef enum {
+  USBTMC_bREQUEST_INITIATE_ABORT_BULK_OUT      = 1u,
+  USBTMC_bREQUEST_CHECK_ABORT_BULK_OUT_STATUS  = 2u,
+  USBTMC_bREQUEST_INITIATE_ABORT_BULK_IN       = 3u,
+  USBTMC_bREQUEST_CHECK_ABORT_BULK_IN_STATUS   = 4u,
+  USBTMC_bREQUEST_INITIATE_CLEAR               = 5u,
+  USBTMC_bREQUEST_CHECK_CLEAR_STATUS           = 6u,
+  USBTMC_bREQUEST_GET_CAPABILITIES             = 7u,
+
+  USBTMC_bREQUEST_INDICATOR_PULSE               = 64u, // Optional
+
+  /****** USBTMC 488 *************/
+  USB488_bREQUEST_READ_STATUS_BYTE  = 128u,
+  USB488_bREQUEST_REN_CONTROL       = 160u,
+  USB488_bREQUEST_GO_TO_LOCAL       = 161u,
+  USB488_bREQUEST_LOCAL_LOCKOUT     = 162u,
+
+} usmtmc_request_type_enum;
+
+typedef enum {
+  // The last and first valid bNotify1 for use by the USBTMC class specification.
+  USBTMC_bNOTIFY1_USBTMC_FIRST          = 0x00,
+  USBTMC_bNOTIFY1_USBTMC_LAST           = 0x3F,
+
+  // The last and first valid bNotify1 for use by vendors.
+  USBTMC_bNOTIFY1_VENDOR_SPECIFIC_FIRST = 0x40,
+  USBTMC_bNOTIFY1_VENDOR_SPECIFIC_LAST  = 0x7F,
+
+  // The last and first valid bNotify1 for use by USBTMC subclass specifications.
+  USBTMC_bNOTIFY1_SUBCLASS_FIRST        = 0x80,
+  USBTMC_bNOTIFY1_SUBCLASS_LAST         = 0xFF,
+
+  // From the USB488 Subclass Specification, Section 3.4.
+  USB488_bNOTIFY1_SRQ                   = 0x81,
+} usbtmc_int_in_payload_format;
+
+typedef enum {
+  USBTMC_STATUS_SUCCESS = 0x01,
+  USBTMC_STATUS_PENDING = 0x02,
+  USBTMC_STATUS_FAILED = 0x80,
+  USBTMC_STATUS_TRANSFER_NOT_IN_PROGRESS = 0x81,
+  USBTMC_STATUS_SPLIT_NOT_IN_PROGRESS = 0x82,
+  USBTMC_STATUS_SPLIT_IN_PROGRESS  = 0x83,
+
+  /****** USBTMC 488 *************/
+  USB488_STATUS_INTERRUPT_IN_BUSY = 0x20
+} usbtmc_status_enum;
+
+/************************************************************
+ * Control Responses
+ */
+
+typedef struct TU_ATTR_PACKED {
+  uint8_t USBTMC_status;                 ///< usbtmc_status_enum
+  uint8_t _reserved;
+  uint16_t bcdUSBTMC;                    ///< USBTMC_VERSION
+
+  struct TU_ATTR_PACKED
+  {
+    unsigned int listenOnly :1;
+    unsigned int talkOnly :1;
+    unsigned int supportsIndicatorPulse :1;
+  } bmIntfcCapabilities;
+  struct TU_ATTR_PACKED
+  {
+    unsigned int canEndBulkInOnTermChar :1;
+  } bmDevCapabilities;
+  uint8_t _reserved2[6];
+  uint8_t _reserved3[12];
+} usbtmc_response_capabilities_t;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_response_capabilities_t) == 0x18, "struct wrong length");
+
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t USBTMC_status;
+  struct TU_ATTR_PACKED
+  {
+    unsigned int BulkInFifoBytes :1;
+  } bmClear;
+} usbtmc_get_clear_status_rsp_t;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_get_clear_status_rsp_t) == 2u, "struct wrong length");
+
+// Used for both abort bulk IN and bulk OUT
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t USBTMC_status;
+  uint8_t bTag;
+} usbtmc_initiate_abort_rsp_t;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_get_clear_status_rsp_t) == 2u, "struct wrong length");
+
+// Used for both check_abort_bulk_in_status and check_abort_bulk_out_status
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t USBTMC_status;
+  struct TU_ATTR_PACKED
+  {
+    unsigned int BulkInFifoBytes : 1; ///< Has queued data or a short packet that is queued
+  } bmAbortBulkIn;
+  uint8_t _reserved[2];               ///< Must be zero
+  uint32_t NBYTES_RXD_TXD;
+} usbtmc_check_abort_bulk_rsp_t;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_check_abort_bulk_rsp_t) == 8u, "struct wrong length");
+
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t USBTMC_status;                 ///< usbtmc_status_enum
+  uint8_t _reserved;
+  uint16_t bcdUSBTMC;                    ///< USBTMC_VERSION
+
+  struct TU_ATTR_PACKED
+  {
+    uint8_t listenOnly :1;
+    uint8_t talkOnly :1;
+    uint8_t supportsIndicatorPulse :1;
+  } bmIntfcCapabilities;
+
+  struct TU_ATTR_PACKED
+  {
+    uint8_t canEndBulkInOnTermChar :1;
+  } bmDevCapabilities;
+
+  uint8_t _reserved2[6];
+  uint16_t bcdUSB488;
+
+  struct TU_ATTR_PACKED
+  {
+    uint8_t supportsTrigger :1;
+    uint8_t supportsREN_GTL_LLO :1;
+    uint8_t is488_2 :1;
+  } bmIntfcCapabilities488;
+
+  struct TU_ATTR_PACKED
+  {
+    uint8_t DT1 :1;
+    uint8_t RL1 :1;
+    uint8_t SR1 :1;
+    uint8_t SCPI :1;
+  } bmDevCapabilities488;
+  uint8_t _reserved3[8];
+} usbtmc_response_capabilities_488_t;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_response_capabilities_488_t) == 0x18, "struct wrong length");
+
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t USBTMC_status;
+  uint8_t bTag;
+  uint8_t statusByte;
+} usbtmc_read_stb_rsp_488_t;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_read_stb_rsp_488_t) == 3u, "struct wrong length");
+
+typedef struct TU_ATTR_PACKED
+{
+  uint8_t bNotify1; // Must be USB488_bNOTIFY1_SRQ
+  uint8_t StatusByte;
+} usbtmc_srq_interrupt_488_t;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_srq_interrupt_488_t) == 2u, "struct wrong length");
+
+typedef struct TU_ATTR_PACKED
+{
+  struct TU_ATTR_PACKED
+  {
+      unsigned int bTag : 7;
+      unsigned int one  : 1;
+  } bNotify1;
+  uint8_t StatusByte;
+} usbtmc_read_stb_interrupt_488_t;
+
+TU_VERIFY_STATIC(sizeof(usbtmc_read_stb_interrupt_488_t) == 2u, "struct wrong length");
+
+#endif
@@ -0,0 +1,117 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 N Conrad
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+
+#ifndef CLASS_USBTMC_USBTMC_DEVICE_H_
+#define CLASS_USBTMC_USBTMC_DEVICE_H_
+
+#include "usbtmc.h"
+
+// Enable 488 mode by default
+#if !defined(CFG_TUD_USBTMC_ENABLE_488)
+#define CFG_TUD_USBTMC_ENABLE_488 (1)
+#endif
+
+/***********************************************
+ *  Functions to be implemented by the class implementation
+ */
+
+// In order to proceed, app must call call tud_usbtmc_start_bus_read(rhport) during or soon after:
+// * tud_usbtmc_open_cb
+// * tud_usbtmc_msg_data_cb
+// * tud_usbtmc_msgBulkIn_complete_cb
+// * tud_usbtmc_msg_trigger_cb
+// * (successful) tud_usbtmc_check_abort_bulk_out_cb
+// * (successful) tud_usbtmc_check_abort_bulk_in_cb
+// * (successful) tud_usmtmc_bulkOut_clearFeature_cb
+
+#if (CFG_TUD_USBTMC_ENABLE_488)
+usbtmc_response_capabilities_488_t const * tud_usbtmc_get_capabilities_cb(void);
+#else
+usbtmc_response_capabilities_t const * tud_usbtmc_get_capabilities_cb(void);
+#endif
+
+void tud_usbtmc_open_cb(uint8_t interface_id);
+
+bool tud_usbtmc_msgBulkOut_start_cb(usbtmc_msg_request_dev_dep_out const * msgHeader);
+// transfer_complete does not imply that a message is complete.
+bool tud_usbtmc_msg_data_cb( void *data, size_t len, bool transfer_complete);
+void tud_usbtmc_bulkOut_clearFeature_cb(void); // Notice to clear and abort the pending BULK out transfer
+
+bool tud_usbtmc_msgBulkIn_request_cb(usbtmc_msg_request_dev_dep_in const * request);
+bool tud_usbtmc_msgBulkIn_complete_cb(void);
+void tud_usbtmc_bulkIn_clearFeature_cb(void); // Notice to clear and abort the pending BULK out transfer
+
+bool tud_usbtmc_initiate_abort_bulk_in_cb(uint8_t *tmcResult);
+bool tud_usbtmc_initiate_abort_bulk_out_cb(uint8_t *tmcResult);
+bool tud_usbtmc_initiate_clear_cb(uint8_t *tmcResult);
+
+bool tud_usbtmc_check_abort_bulk_in_cb(usbtmc_check_abort_bulk_rsp_t *rsp);
+bool tud_usbtmc_check_abort_bulk_out_cb(usbtmc_check_abort_bulk_rsp_t *rsp);
+bool tud_usbtmc_check_clear_cb(usbtmc_get_clear_status_rsp_t *rsp);
+
+// The interrupt-IN endpoint buffer was transmitted to the host. Use
+// tud_usbtmc_transmit_notification_data to send another notification.
+bool tud_usbtmc_notification_complete_cb(void);
+
+// Indicator pulse should be 0.5 to 1.0 seconds long
+bool tud_usbtmc_indicator_pulse_cb(tusb_control_request_t const * msg, uint8_t *tmcResult);
+
+#if (CFG_TUD_USBTMC_ENABLE_488)
+uint8_t tud_usbtmc_get_stb_cb(uint8_t *tmcResult);
+bool tud_usbtmc_msg_trigger_cb(usbtmc_msg_generic_t* msg);
+#endif
+
+// Called from app
+//
+// We keep a reference to the buffer, so it MUST not change until the app is
+// notified that the transfer is complete.
+bool tud_usbtmc_transmit_dev_msg_data(
+    const void * data, size_t len,
+    bool endOfMessage, bool usingTermChar);
+
+// Buffers a notification to be sent to the host. The data starts
+// with the bNotify1 field, see the USBTMC Specification, Table 13.
+//
+// If the previous notification data has not yet been sent, this
+// returns false.
+//
+// Requires an interrupt endpoint in the interface.
+bool tud_usbtmc_transmit_notification_data(const void * data, size_t len);
+
+bool tud_usbtmc_start_bus_read(void);
+
+
+/* "callbacks" from USB device core */
+
+void     usbtmcd_init_cb(void);
+bool     usbtmcd_deinit(void);
+uint16_t usbtmcd_open_cb(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+void     usbtmcd_reset_cb(uint8_t rhport);
+bool     usbtmcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
+bool     usbtmcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+
+#endif /* CLASS_USBTMC_USBTMC_DEVICE_H_ */
@@ -0,0 +1,194 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_VENDOR_DEVICE_H_
+#define TUSB_VENDOR_DEVICE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "common/tusb_common.h"
+
+//--------------------------------------------------------------------+
+// Configuration
+//--------------------------------------------------------------------+
+#ifndef CFG_TUD_VENDOR_EPSIZE
+  #define CFG_TUD_VENDOR_EPSIZE 64
+#endif
+
+// RX FIFO can be disabled by setting this value to 0
+#ifndef CFG_TUD_VENDOR_RX_BUFSIZE
+  #define CFG_TUD_VENDOR_RX_BUFSIZE 64
+#endif
+
+// TX FIFO can be disabled by setting this value to 0
+#ifndef CFG_TUD_VENDOR_TX_BUFSIZE
+  #define CFG_TUD_VENDOR_TX_BUFSIZE 64
+#endif
+
+// Vendor is buffered (FIFO mode) if both TX and RX buffers are configured
+// If either is 0, vendor operates in non-buffered (direct transfer) mode
+#ifndef CFG_TUD_VENDOR_TXRX_BUFFERED
+  #define CFG_TUD_VENDOR_TXRX_BUFFERED ((CFG_TUD_VENDOR_RX_BUFSIZE > 0) && (CFG_TUD_VENDOR_TX_BUFSIZE > 0))
+#endif
+
+// Application will manually schedule RX transfer. This can be useful when using with non-fifo (buffered) mode
+// i.e. CFG_TUD_VENDOR_TXRX_BUFFERED = 0
+#ifndef CFG_TUD_VENDOR_RX_MANUAL_XFER
+  #define CFG_TUD_VENDOR_RX_MANUAL_XFER 0
+#endif
+
+//--------------------------------------------------------------------+
+// Application API (Multiple Interfaces) i.e CFG_TUD_VENDOR > 1
+//--------------------------------------------------------------------+
+
+// Return whether the vendor interface is mounted
+bool tud_vendor_n_mounted(uint8_t idx);
+
+//------------- RX -------------//
+#if CFG_TUD_VENDOR_TXRX_BUFFERED
+// Return number of available bytes for reading
+uint32_t tud_vendor_n_available(uint8_t idx);
+
+// Peek a byte from RX buffer
+bool tud_vendor_n_peek(uint8_t idx, uint8_t *ui8);
+
+// Read from RX FIFO
+uint32_t tud_vendor_n_read(uint8_t idx, void *buffer, uint32_t bufsize);
+
+// Flush (clear) RX FIFO
+void tud_vendor_n_read_flush(uint8_t idx);
+#endif
+
+#if CFG_TUD_VENDOR_RX_MANUAL_XFER
+// Start a new RX transfer to fill the RX FIFO, return false if previous transfer is still ongoing
+bool tud_vendor_n_read_xfer(uint8_t idx);
+#endif
+
+//------------- TX -------------//
+// Write to TX FIFO. This can be buffered and not sent immediately unless buffered bytes >= USB endpoint size
+uint32_t tud_vendor_n_write(uint8_t idx, const void *buffer, uint32_t bufsize);
+
+// Return number of bytes available for writing in TX FIFO (or endpoint if non-buffered)
+uint32_t tud_vendor_n_write_available(uint8_t idx);
+
+#if CFG_TUD_VENDOR_TXRX_BUFFERED
+// Force sending buffered data, return number of bytes sent
+uint32_t tud_vendor_n_write_flush(uint8_t idx);
+
+// Clear the transmit FIFO
+bool tud_vendor_n_write_clear(uint8_t idx);
+#endif
+
+// Write a null-terminated string to TX FIFO
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_n_write_str(uint8_t idx, const char *str) {
+  return tud_vendor_n_write(idx, str, strlen(str));
+}
+
+// backward compatible
+#define tud_vendor_n_flush(idx) tud_vendor_n_write_flush(idx)
+
+//--------------------------------------------------------------------+
+// Application API (Single Port) i.e CFG_TUD_VENDOR = 1
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_vendor_mounted(void) {
+  return tud_vendor_n_mounted(0);
+}
+
+#if CFG_TUD_VENDOR_TXRX_BUFFERED
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_available(void) {
+  return tud_vendor_n_available(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_vendor_peek(uint8_t *ui8) {
+  return tud_vendor_n_peek(0, ui8);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_read(void *buffer, uint32_t bufsize) {
+  return tud_vendor_n_read(0, buffer, bufsize);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tud_vendor_read_flush(void) {
+  tud_vendor_n_read_flush(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_write_flush(void) {
+  return tud_vendor_n_write_flush(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_vendor_write_clear(void) {
+  return tud_vendor_n_write_clear(0);
+}
+#endif
+
+#if CFG_TUD_VENDOR_RX_MANUAL_XFER
+TU_ATTR_ALWAYS_INLINE static inline bool tud_vendor_read_xfer(void) {
+  return tud_vendor_n_read_xfer(0);
+}
+#endif
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_write(const void *buffer, uint32_t bufsize) {
+  return tud_vendor_n_write(0, buffer, bufsize);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_write_str(const char *str) {
+  return tud_vendor_n_write_str(0, str);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_write_available(void) {
+  return tud_vendor_n_write_available(0);
+}
+
+// backward compatible
+#define tud_vendor_flush() tud_vendor_write_flush()
+
+//--------------------------------------------------------------------+
+// Application Callback API (weak is optional)
+//--------------------------------------------------------------------+
+
+// Invoked when received new data.
+// - CFG_TUD_VENDOR_TXRX_BUFFERED = 1: buffer and bufsize must not be used (both NULL,0) since data is in RX FIFO
+// - CFG_TUD_VENDOR_TXRX_BUFFERED = 0: Buffer and bufsize are valid
+void tud_vendor_rx_cb(uint8_t idx, const uint8_t *buffer, uint32_t bufsize);
+
+// Invoked when tx transfer is finished
+void tud_vendor_tx_cb(uint8_t idx, uint32_t sent_bytes);
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void     vendord_init(void);
+bool     vendord_deinit(void);
+void     vendord_reset(uint8_t rhport);
+uint16_t vendord_open(uint8_t rhport, const tusb_desc_interface_t *idx_desc, uint16_t max_len);
+bool     vendord_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* TUSB_VENDOR_DEVICE_H_ */
@@ -0,0 +1,67 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_VENDOR_HOST_H_
+#define TUSB_VENDOR_HOST_H_
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+typedef struct {
+  pipe_handle_t pipe_in;
+  pipe_handle_t pipe_out;
+}custom_interface_info_t;
+
+//--------------------------------------------------------------------+
+// USBH-CLASS DRIVER API
+//--------------------------------------------------------------------+
+static inline bool tusbh_custom_is_mounted(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id)
+{
+  (void) vendor_id; // TODO check this later
+  (void) product_id;
+//  return (tusbh_device_get_mounted_class_flag(dev_addr) & TU_BIT(TUSB_CLASS_MAPPED_INDEX_END-1) ) != 0;
+  return false;
+}
+
+bool tusbh_custom_read(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id, void * p_buffer, uint16_t length);
+bool tusbh_custom_write(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id, void const * p_data, uint16_t length);
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void cush_init(void);
+bool cush_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length);
+void cush_isr(pipe_handle_t pipe_hdl, xfer_result_t event);
+void cush_close(uint8_t dev_addr);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* TUSB_VENDOR_HOST_H_ */
@@ -0,0 +1,697 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Koji KITAYAMA
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_VIDEO_H_
+#define TUSB_VIDEO_H_
+
+#include "common/tusb_common.h"
+
+enum {
+  VIDEO_BCD_1_50 = 0x0150,
+};
+
+// Table 3-19 Color Matching Descriptor
+typedef enum {
+  VIDEO_COLOR_PRIMARIES_UNDEFINED = 0x00,
+  VIDEO_COLOR_PRIMARIES_BT709, // sRGB (default)
+  VIDEO_COLOR_PRIMARIES_BT470_2M,
+  VIDEO_COLOR_PRIMARIES_BT470_2BG,
+  VIDEO_COLOR_PRIMARIES_SMPTE170M,
+  VIDEO_COLOR_PRIMARIES_SMPTE240M,
+} video_color_primaries_t;
+
+// Table 3-19 Color Matching Descriptor
+typedef enum {
+  VIDEO_COLOR_XFER_CH_UNDEFINED = 0x00,
+  VIDEO_COLOR_XFER_CH_BT709, // default
+  VIDEO_COLOR_XFER_CH_BT470_2M,
+  VIDEO_COLOR_XFER_CH_BT470_2BG,
+  VIDEO_COLOR_XFER_CH_SMPTE170M,
+  VIDEO_COLOR_XFER_CH_SMPTE240M,
+  VIDEO_COLOR_XFER_CH_LINEAR,
+  VIDEO_COLOR_XFER_CH_SRGB,
+} video_color_transfer_characteristics_t;
+
+// Table 3-19 Color Matching Descriptor
+typedef enum {
+  VIDEO_COLOR_COEF_UNDEFINED = 0x00,
+  VIDEO_COLOR_COEF_BT709,
+  VIDEO_COLOR_COEF_FCC,
+  VIDEO_COLOR_COEF_BT470_2BG,
+  VIDEO_COLOR_COEF_SMPTE170M, // BT.601 default
+  VIDEO_COLOR_COEF_SMPTE240M,
+} video_color_matrix_coefficients_t;
+
+/* 4.2.1.2 Request Error Code Control */
+typedef enum {
+  VIDEO_ERROR_NONE = 0, /* The request succeeded. */
+  VIDEO_ERROR_NOT_READY,
+  VIDEO_ERROR_WRONG_STATE,
+  VIDEO_ERROR_POWER,
+  VIDEO_ERROR_OUT_OF_RANGE,
+  VIDEO_ERROR_INVALID_UNIT,
+  VIDEO_ERROR_INVALID_CONTROL,
+  VIDEO_ERROR_INVALID_REQUEST,
+  VIDEO_ERROR_INVALID_VALUE_WITHIN_RANGE,
+  VIDEO_ERROR_UNKNOWN = 0xFF,
+} video_error_code_t;
+
+/* A.2 Interface Subclass */
+typedef enum {
+  VIDEO_SUBCLASS_UNDEFINED = 0x00,
+  VIDEO_SUBCLASS_CONTROL,
+  VIDEO_SUBCLASS_STREAMING,
+  VIDEO_SUBCLASS_INTERFACE_COLLECTION,
+} video_subclass_type_t;
+
+/* A.3 Interface Protocol */
+typedef enum {
+  VIDEO_ITF_PROTOCOL_UNDEFINED = 0x00,
+  VIDEO_ITF_PROTOCOL_15,
+} video_interface_protocol_code_t;
+
+/* A.5 Class-Specific VideoControl Interface Descriptor Subtypes */
+typedef enum {
+  VIDEO_CS_ITF_VC_UNDEFINED = 0x00,
+  VIDEO_CS_ITF_VC_HEADER,
+  VIDEO_CS_ITF_VC_INPUT_TERMINAL,
+  VIDEO_CS_ITF_VC_OUTPUT_TERMINAL,
+  VIDEO_CS_ITF_VC_SELECTOR_UNIT,
+  VIDEO_CS_ITF_VC_PROCESSING_UNIT,
+  VIDEO_CS_ITF_VC_EXTENSION_UNIT,
+  VIDEO_CS_ITF_VC_ENCODING_UNIT,
+  VIDEO_CS_ITF_VC_MAX,
+} video_cs_vc_interface_subtype_t;
+
+/* A.6 Class-Specific VideoStreaming Interface Descriptor Subtypes */
+typedef enum {
+  VIDEO_CS_ITF_VS_UNDEFINED             = 0x00,
+  VIDEO_CS_ITF_VS_INPUT_HEADER          = 0x01,
+  VIDEO_CS_ITF_VS_OUTPUT_HEADER         = 0x02,
+  VIDEO_CS_ITF_VS_STILL_IMAGE_FRAME     = 0x03,
+  VIDEO_CS_ITF_VS_FORMAT_UNCOMPRESSED   = 0x04,
+  VIDEO_CS_ITF_VS_FRAME_UNCOMPRESSED    = 0x05,
+  VIDEO_CS_ITF_VS_FORMAT_MJPEG          = 0x06,
+  VIDEO_CS_ITF_VS_FRAME_MJPEG           = 0x07,
+  VIDEO_CS_ITF_VS_FORMAT_MPEG2TS        = 0x0A,
+  VIDEO_CS_ITF_VS_FORMAT_DV             = 0x0C,
+  VIDEO_CS_ITF_VS_COLORFORMAT           = 0x0D,
+  VIDEO_CS_ITF_VS_FORMAT_FRAME_BASED    = 0x10,
+  VIDEO_CS_ITF_VS_FRAME_FRAME_BASED     = 0x11,
+  VIDEO_CS_ITF_VS_FORMAT_STREAM_BASED   = 0x12,
+  VIDEO_CS_ITF_VS_FORMAT_H264           = 0x13,
+  VIDEO_CS_ITF_VS_FRAME_H264            = 0x14,
+  VIDEO_CS_ITF_VS_FORMAT_H264_SIMULCAST = 0x15,
+  VIDEO_CS_ITF_VS_FORMAT_VP8            = 0x16,
+  VIDEO_CS_ITF_VS_FRAME_VP8             = 0x17,
+  VIDEO_CS_ITF_VS_FORMAT_VP8_SIMULCAST  = 0x18,
+} video_cs_vs_interface_subtype_t;
+
+/* A.7. Class-Specific Endpoint Descriptor Subtypes */
+typedef enum {
+  VIDEO_CS_EP_UNDEFINED = 0x00,
+  VIDEO_CS_EP_GENERAL,
+  VIDEO_CS_EP_ENDPOINT,
+  VIDEO_CS_EP_INTERRUPT
+} video_cs_ep_subtype_t;
+
+/* A.8 Class-Specific Request Codes */
+typedef enum {
+  VIDEO_REQUEST_UNDEFINED   = 0x00,
+  VIDEO_REQUEST_SET_CUR     = 0x01,
+  VIDEO_REQUEST_SET_CUR_ALL = 0x11,
+  VIDEO_REQUEST_GET_CUR     = 0x81,
+  VIDEO_REQUEST_GET_MIN     = 0x82,
+  VIDEO_REQUEST_GET_MAX     = 0x83,
+  VIDEO_REQUEST_GET_RES     = 0x84,
+  VIDEO_REQUEST_GET_LEN     = 0x85,
+  VIDEO_REQUEST_GET_INFO    = 0x86,
+  VIDEO_REQUEST_GET_DEF     = 0x87,
+  VIDEO_REQUEST_GET_CUR_ALL = 0x91,
+  VIDEO_REQUEST_GET_MIN_ALL = 0x92,
+  VIDEO_REQUEST_GET_MAX_ALL = 0x93,
+  VIDEO_REQUEST_GET_RES_ALL = 0x94,
+  VIDEO_REQUEST_GET_DEF_ALL = 0x97
+} video_control_request_t;
+
+/* A.9.1 VideoControl Interface Control Selectors */
+typedef enum {
+  VIDEO_VC_CTL_UNDEFINED = 0x00,
+  VIDEO_VC_CTL_VIDEO_POWER_MODE,   // 0x01
+  VIDEO_VC_CTL_REQUEST_ERROR_CODE, // 0x02
+} video_interface_control_selector_t;
+
+/* A.9.8 VideoStreaming Interface Control Selectors */
+typedef enum {
+  VIDEO_VS_CTL_UNDEFINED = 0x00,
+  VIDEO_VS_CTL_PROBE,                // 0x01
+  VIDEO_VS_CTL_COMMIT,               // 0x02
+  VIDEO_VS_CTL_STILL_PROBE,          // 0x03
+  VIDEO_VS_CTL_STILL_COMMIT,         // 0x04
+  VIDEO_VS_CTL_STILL_IMAGE_TRIGGER,  // 0x05
+  VIDEO_VS_CTL_STREAM_ERROR_CODE,    // 0x06
+  VIDEO_VS_CTL_GENERATE_KEY_FRAME,   // 0x07
+  VIDEO_VS_CTL_UPDATE_FRAME_SEGMENT, // 0x08
+  VIDEO_VS_CTL_SYNCH_DELAY_CONTROL,  // 0x09
+
+} video_interface_streaming_selector_t;
+
+/* B. Terminal Types */
+typedef enum {
+  // Terminal
+  VIDEO_TT_VENDOR_SPECIFIC         = 0x0100,
+  VIDEO_TT_STREAMING               = 0x0101,
+
+  // Input
+  VIDEO_ITT_VENDOR_SPECIFIC        = 0x0200,
+  VIDEO_ITT_CAMERA                 = 0x0201,
+  VIDEO_ITT_MEDIA_TRANSPORT_INPUT  = 0x0202,
+
+  // Output
+  VIDEO_OTT_VENDOR_SPECIFIC        = 0x0300,
+  VIDEO_OTT_DISPLAY                = 0x0301,
+  VIDEO_OTT_MEDIA_TRANSPORT_OUTPUT = 0x0302,
+
+  // External
+  VIDEO_ETT_VENDOR_SPEIFIC         = 0x0400,
+  VIDEO_ETT_COMPOSITE_CONNECTOR    = 0x0401,
+  VIDEO_ETT_SVIDEO_CONNECTOR       = 0x0402,
+  VIDEO_ETT_COMPONENT_CONNECTOR    = 0x0403,
+} video_terminal_type_t;
+
+//--------------------------------------------------------------------+
+// Video Control (VC) Descriptors
+//--------------------------------------------------------------------+
+
+/* 2.3.4.2 */
+#define tusb_desc_video_control_header_nitf_t(_nitf) \
+  struct TU_ATTR_PACKED { \
+    uint8_t  bLength; \
+    uint8_t  bDescriptorType; \
+    uint8_t  bDescriptorSubType; \
+    uint16_t bcdUVC; \
+    uint16_t wTotalLength; \
+    uint32_t dwClockFrequency; /* deprecated */ \
+    uint8_t  bInCollection; \
+    uint8_t  baInterfaceNr[_nitf]; \
+  }
+
+typedef tusb_desc_video_control_header_nitf_t()  tusb_desc_video_control_header_t; //-V2586 incorrectly detected as flexible array
+typedef tusb_desc_video_control_header_nitf_t(1) tusb_desc_video_control_header_1itf_t; //-V2586 incorrectly detected as flexible array
+typedef tusb_desc_video_control_header_nitf_t(2) tusb_desc_video_control_header_2itf_t; //-V2586 incorrectly detected as flexible array
+typedef tusb_desc_video_control_header_nitf_t(3) tusb_desc_video_control_header_3itf_t; //-V2586 incorrectly detected as flexible array
+typedef tusb_desc_video_control_header_nitf_t(4) tusb_desc_video_control_header_4itf_t; //-V2586 incorrectly detected as flexible array
+
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength;
+  uint8_t  bDescriptorType;
+  uint8_t  bDescriptorSubType;
+  uint8_t  bTerminalID;
+  uint16_t wTerminalType;
+  uint8_t  bAssocTerminal;
+  uint8_t  iTerminal;
+} tusb_desc_video_control_input_terminal_t;
+
+TU_VERIFY_STATIC(sizeof(tusb_desc_video_control_input_terminal_t) == 8, "size is not correct");
+
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength;
+  uint8_t  bDescriptorType;
+  uint8_t  bDescriptorSubType;
+  uint8_t  bTerminalID;
+  uint16_t wTerminalType;
+  uint8_t  bAssocTerminal;
+  uint8_t  bSourceID;
+  uint8_t  iTerminal;
+} tusb_desc_video_control_output_terminal_t;
+
+TU_VERIFY_STATIC(sizeof(tusb_desc_video_control_output_terminal_t) == 9, "size is not correct");
+
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength;
+  uint8_t  bDescriptorType;
+  uint8_t  bDescriptorSubType;
+  uint8_t  bTerminalID;
+  uint16_t wTerminalType;
+  uint8_t  bAssocTerminal;
+  uint8_t  iTerminal;
+
+  uint16_t wObjectiveFocalLengthMin;
+  uint16_t wObjectiveFocalLengthMax;
+  uint16_t wOcularFocalLength;
+  uint8_t  bControlSize;
+  uint8_t  bmControls[3];
+} tusb_desc_video_control_camera_terminal_t;
+
+TU_VERIFY_STATIC(sizeof(tusb_desc_video_control_camera_terminal_t) == 18, "size is not correct");
+
+//--------------------------------------------------------------------+
+// Video Streaming (VS) Descriptors
+//--------------------------------------------------------------------+
+
+/* 3.9.2.1 */
+#define tusb_desc_video_streaming_input_header_nbyte_t(_nb) \
+  struct TU_ATTR_PACKED { \
+    uint8_t  bLength; \
+    uint8_t  bDescriptorType; \
+    uint8_t  bDescriptorSubType; \
+    uint8_t  bNumFormats; /* Number of video payload Format descriptors for this interface */ \
+    uint16_t wTotalLength; \
+    uint8_t  bEndpointAddress; \
+    uint8_t  bmInfo; /* Bit 0: dynamic format change supported */ \
+    uint8_t  bTerminalLink; \
+    uint8_t  bStillCaptureMethod; \
+    uint8_t  bTriggerSupport; /* Hardware trigger supported */ \
+    uint8_t  bTriggerUsage; \
+    uint8_t  bControlSize; /* sizeof of each control item */ \
+    uint8_t  bmaControls[_nb]; \
+  }
+
+typedef tusb_desc_video_streaming_input_header_nbyte_t() tusb_desc_video_streaming_input_header_t;
+typedef tusb_desc_video_streaming_input_header_nbyte_t(1) tusb_desc_video_streaming_input_header_1byte_t;
+typedef tusb_desc_video_streaming_input_header_nbyte_t(2) tusb_desc_video_streaming_input_header_2byte_t;
+typedef tusb_desc_video_streaming_input_header_nbyte_t(3) tusb_desc_video_streaming_input_header_3byte_t;
+typedef tusb_desc_video_streaming_input_header_nbyte_t(4) tusb_desc_video_streaming_input_header_4byte_t;
+
+/* 3.9.2.2 */
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength;
+  uint8_t  bDescriptorType;
+  uint8_t  bDescriptorSubType;
+  uint8_t  bNumFormats;
+  uint16_t wTotalLength;
+  uint8_t  bEndpointAddress;
+  uint8_t  bTerminalLink;
+  uint8_t  bControlSize;
+  uint8_t  bmaControls[];
+} tusb_desc_video_streaming_output_header_t;
+
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength;
+  uint8_t  bDescriptorType;
+  uint8_t  bDescriptorSubType;
+  uint8_t  bNumFormats;
+  uint16_t wTotalLength;
+  uint8_t  bEndpointAddress;
+  union {
+    struct {
+      uint8_t  bmInfo;
+      uint8_t  bTerminalLink;
+      uint8_t  bStillCaptureMethod;
+      uint8_t  bTriggerSupport;
+      uint8_t  bTriggerUsage;
+      uint8_t  bControlSize;
+      uint8_t  bmaControls[];
+    } input;
+    struct {
+      uint8_t  bEndpointAddress;
+      uint8_t  bTerminalLink;
+      uint8_t  bControlSize;
+      uint8_t  bmaControls[];
+    } output;
+  };
+} tusb_desc_video_streaming_inout_header_t;
+
+// 3.9.2.6 Color Matching Descriptor
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength;
+  uint8_t  bDescriptorType;
+  uint8_t  bDescriptorSubType;
+  uint8_t  bColorPrimaries;
+  uint8_t  bTransferCharacteristics;
+  uint8_t  bMatrixCoefficients;
+} tusb_desc_video_streaming_color_matching_t;
+
+TU_VERIFY_STATIC(sizeof(tusb_desc_video_streaming_color_matching_t) == 6, "size is not correct");
+
+//--------------------------------------------------------------------+
+// Format and Frame Descriptor
+// Note: bFormatIndex & bFrameIndex are 1-based index
+//--------------------------------------------------------------------+
+
+//------------- Uncompressed -------------//
+// Uncompressed payload specs: 3.1.1 format descriptor
+typedef struct TU_ATTR_PACKED {
+  uint8_t bLength;
+  uint8_t bDescriptorType;
+  uint8_t bDescriptorSubType;
+  uint8_t bFormatIndex;
+  uint8_t bNumFrameDescriptors; // Number of frame descriptors for this format
+  uint8_t guidFormat[16];
+  uint8_t bBitsPerPixel;
+  uint8_t bDefaultFrameIndex;
+  uint8_t bAspectRatioX;
+  uint8_t bAspectRatioY;
+  uint8_t bmInterlaceFlags;
+  uint8_t bCopyProtect;
+} tusb_desc_video_format_uncompressed_t;
+
+TU_VERIFY_STATIC(sizeof(tusb_desc_video_format_uncompressed_t) == 27, "size is not correct");
+
+// Uncompressed payload specs: 3.1.2 frame descriptor
+#define tusb_desc_video_frame_uncompressed_nint_t(_nint) \
+  struct TU_ATTR_PACKED { \
+    uint8_t  bLength; \
+    uint8_t  bDescriptorType; \
+    uint8_t  bDescriptorSubType; \
+    uint8_t  bFrameIndex; \
+    uint8_t  bmCapabilities; \
+    uint16_t wWidth; \
+    uint16_t wHeight; \
+    uint32_t dwMinBitRate; \
+    uint32_t dwMaxBitRate; \
+    uint32_t dwMaxVideoFrameBufferSize; /* deprecated in 1.5 */ \
+    uint32_t dwDefaultFrameInterval; /* 100ns unit */\
+    uint8_t  bFrameIntervalType; \
+    uint32_t dwFrameInterval[_nint]; \
+  }
+
+typedef tusb_desc_video_frame_uncompressed_nint_t() tusb_desc_video_frame_uncompressed_t;
+typedef tusb_desc_video_frame_uncompressed_nint_t(1) tusb_desc_video_frame_uncompressed_1int_t;
+typedef tusb_desc_video_frame_uncompressed_nint_t(2) tusb_desc_video_frame_uncompressed_2int_t;
+typedef tusb_desc_video_frame_uncompressed_nint_t(3) tusb_desc_video_frame_uncompressed_3int_t;
+typedef tusb_desc_video_frame_uncompressed_nint_t(4) tusb_desc_video_frame_uncompressed_4int_t;
+
+// continuous = 3 intervals: min, max, step
+typedef tusb_desc_video_frame_uncompressed_3int_t tusb_desc_video_frame_uncompressed_continuous_t;
+
+TU_VERIFY_STATIC(sizeof(tusb_desc_video_frame_uncompressed_continuous_t) == 38, "size is not correct");
+
+//------------- MJPEG -------------//
+// MJPEG payload specs: 3.1.1 format descriptor
+typedef struct TU_ATTR_PACKED {
+  uint8_t bLength;
+  uint8_t bDescriptorType;
+  uint8_t bDescriptorSubType;
+  uint8_t bFormatIndex;
+  uint8_t bNumFrameDescriptors;
+  uint8_t bmFlags; // Bit 0: fixed size samples (1 = yes)
+  uint8_t bDefaultFrameIndex;
+  uint8_t bAspectRatioX;
+  uint8_t bAspectRatioY;
+  uint8_t bmInterlaceFlags;
+  uint8_t bCopyProtect;
+} tusb_desc_video_format_mjpeg_t;
+
+TU_VERIFY_STATIC(sizeof(tusb_desc_video_format_mjpeg_t) == 11, "size is not correct");
+
+// MJPEG payload specs: 3.1.2 frame descriptor (same as uncompressed)
+typedef tusb_desc_video_frame_uncompressed_t tusb_desc_video_frame_mjpeg_t;
+typedef tusb_desc_video_frame_uncompressed_1int_t tusb_desc_video_frame_mjpeg_1int_t;
+typedef tusb_desc_video_frame_uncompressed_2int_t tusb_desc_video_frame_mjpeg_2int_t;
+typedef tusb_desc_video_frame_uncompressed_3int_t tusb_desc_video_frame_mjpeg_3int_t;
+typedef tusb_desc_video_frame_uncompressed_4int_t tusb_desc_video_frame_mjpeg_4int_t;
+
+// continuous = 3 intervals: min, max, step
+typedef tusb_desc_video_frame_mjpeg_3int_t tusb_desc_video_frame_mjpeg_continuous_t;
+
+//------------- DV -------------//
+// DV payload specs: 3.1.1
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength;
+  uint8_t  bDescriptorType;
+  uint8_t  bDescriptorSubType;
+  uint8_t  bFormatIndex;
+  uint32_t dwMaxVideoFrameBufferSize; /* deprecated */
+  uint8_t  bFormatType;
+} tusb_desc_video_format_dv_t;
+
+// Frame Based payload specs: 3.1.1
+typedef struct TU_ATTR_PACKED {
+  uint8_t bLength;
+  uint8_t bDescriptorType;
+  uint8_t bDescriptorSubType;
+  uint8_t bFormatIndex;
+  uint8_t bNumFrameDescriptors;
+  uint8_t guidFormat[16];
+  uint8_t bBitsPerPixel;
+  uint8_t bDefaultFrameIndex;
+  uint8_t bAspectRatioX;
+  uint8_t bAspectRatioY;
+  uint8_t bmInterlaceFlags;
+  uint8_t bCopyProtect;
+  uint8_t bVaribaleSize;
+} tusb_desc_video_format_framebased_t;
+
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength;
+  uint8_t  bDescriptorType;
+  uint8_t  bDescriptorSubType;
+  uint8_t  bFrameIndex;
+  uint8_t  bmCapabilities;
+  uint16_t wWidth;
+  uint16_t wHeight;
+  uint32_t dwMinBitRate;
+  uint32_t dwMaxBitRate;
+  uint32_t dwDefaultFrameInterval;
+  uint8_t  bFrameIntervalType;
+  uint32_t dwBytesPerLine;
+  uint32_t dwFrameInterval[];
+} tusb_desc_video_frame_framebased_t;
+
+//--------------------------------------------------------------------+
+// Requests
+//--------------------------------------------------------------------+
+
+/* 2.4.3.3 */
+typedef struct TU_ATTR_PACKED {
+  uint8_t bHeaderLength;
+  union {
+    uint8_t bmHeaderInfo;
+    struct {
+      uint8_t FrameID:              1;
+      uint8_t EndOfFrame:           1;
+      uint8_t PresentationTime:     1;
+      uint8_t SourceClockReference: 1;
+      uint8_t PayloadSpecific:      1;
+      uint8_t StillImage:           1;
+      uint8_t Error:                1;
+      uint8_t EndOfHeader:          1;
+    };
+  };
+} tusb_video_payload_header_t;
+
+/* 4.3.1.1 */
+typedef struct TU_ATTR_PACKED {
+  union {
+    uint8_t bmHint;
+    struct TU_ATTR_PACKED {
+      uint16_t dwFrameInterval: 1;
+      uint16_t wKeyFrameRatel : 1;
+      uint16_t wPFrameRate    : 1;
+      uint16_t wCompQuality   : 1;
+      uint16_t wCompWindowSize: 1;
+      uint16_t                : 0;
+    } Hint;
+  };
+  uint8_t  bFormatIndex;
+  uint8_t  bFrameIndex;
+  uint32_t dwFrameInterval;
+  uint16_t wKeyFrameRate;
+  uint16_t wPFrameRate;
+  uint16_t wCompQuality;
+  uint16_t wCompWindowSize;
+  uint16_t wDelay;
+  uint32_t dwMaxVideoFrameSize;
+  uint32_t dwMaxPayloadTransferSize;
+  uint32_t dwClockFrequency;
+  union {
+    uint8_t bmFramingInfo;
+    struct TU_ATTR_PACKED {
+      uint8_t FrameID   : 1;
+      uint8_t EndOfFrame: 1;
+      uint8_t EndOfSlice: 1;
+      uint8_t           : 0;
+    } FramingInfo;
+  };
+  uint8_t  bPreferedVersion;
+  uint8_t  bMinVersion;
+  uint8_t  bMaxVersion;
+  uint8_t  bUsage;
+  uint8_t  bBitDepthLuma;
+  uint8_t  bmSettings;
+  uint8_t  bMaxNumberOfRefFramesPlus1;
+  uint16_t bmRateControlModes;
+  uint64_t bmLayoutPerStream;
+} video_probe_and_commit_control_t;
+
+TU_VERIFY_STATIC( sizeof(video_probe_and_commit_control_t) == 48, "size is not correct");
+
+#define TUD_VIDEO_DESC_IAD_LEN                          8
+#define TUD_VIDEO_DESC_STD_VC_LEN                       9
+#define TUD_VIDEO_DESC_CS_VC_LEN                        12
+#define TUD_VIDEO_DESC_INPUT_TERM_LEN                   8
+#define TUD_VIDEO_DESC_OUTPUT_TERM_LEN                  9
+#define TUD_VIDEO_DESC_CAMERA_TERM_LEN                  18
+#define TUD_VIDEO_DESC_STD_VS_LEN                       9
+#define TUD_VIDEO_DESC_CS_VS_IN_LEN                     13
+#define TUD_VIDEO_DESC_CS_VS_OUT_LEN                    9
+#define TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR_LEN            27
+#define TUD_VIDEO_DESC_CS_VS_FMT_MJPEG_LEN              11
+#define TUD_VIDEO_DESC_CS_VS_FMT_FRAME_BASED_LEN        28
+#define TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT_LEN       38
+#define TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_DISC_LEN       26
+#define TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_CONT_LEN         38
+#define TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_DISC_LEN         26
+#define TUD_VIDEO_DESC_CS_VS_FRM_FRAME_BASED_CONT_LEN   38
+#define TUD_VIDEO_DESC_CS_VS_FRM_FRAME_BASED_DISC_LEN   26
+#define TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN         6
+
+/* 2.2 compression formats */
+#define TUD_VIDEO_GUID_YUY2   0x59,0x55,0x59,0x32,0x00,0x00,0x10,0x00,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71
+#define TUD_VIDEO_GUID_NV12   0x4E,0x56,0x31,0x32,0x00,0x00,0x10,0x00,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71
+#define TUD_VIDEO_GUID_M420   0x4D,0x34,0x32,0x30,0x00,0x00,0x10,0x00,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71
+#define TUD_VIDEO_GUID_I420   0x49,0x34,0x32,0x30,0x00,0x00,0x10,0x00,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71
+#define TUD_VIDEO_GUID_H264   0x48,0x32,0x36,0x34,0x00,0x00,0x10,0x00,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71
+
+#define TUD_VIDEO_DESC_IAD(_firstitf, _nitfs, _stridx) \
+  TUD_VIDEO_DESC_IAD_LEN, TUSB_DESC_INTERFACE_ASSOCIATION, \
+  _firstitf, _nitfs, TUSB_CLASS_VIDEO, VIDEO_SUBCLASS_INTERFACE_COLLECTION, \
+  VIDEO_ITF_PROTOCOL_UNDEFINED, _stridx
+
+#define TUD_VIDEO_DESC_STD_VC(_itfnum, _nEPs, _stridx) \
+  TUD_VIDEO_DESC_STD_VC_LEN, TUSB_DESC_INTERFACE, _itfnum, /* fixed to zero */ 0x00, \
+  _nEPs, TUSB_CLASS_VIDEO, VIDEO_SUBCLASS_CONTROL, VIDEO_ITF_PROTOCOL_15, _stridx
+
+/* 3.7.2 */
+#define TUD_VIDEO_DESC_CS_VC(_bcdUVC, _totallen, _clkfreq, ...)	\
+  TUD_VIDEO_DESC_CS_VC_LEN + (TU_ARGS_NUM(__VA_ARGS__)), TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VC_HEADER, \
+  U16_TO_U8S_LE(_bcdUVC), U16_TO_U8S_LE((_totallen) + TUD_VIDEO_DESC_CS_VC_LEN + (TU_ARGS_NUM(__VA_ARGS__))), \
+  U32_TO_U8S_LE(_clkfreq), TU_ARGS_NUM(__VA_ARGS__), __VA_ARGS__
+
+/* 3.7.2.1 */
+#define TUD_VIDEO_DESC_INPUT_TERM(_tid, _tt, _at, _stridx) \
+  TUD_VIDEO_DESC_INPUT_TERM_LEN, TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VC_INPUT_TERMINAL, \
+    _tid, U16_TO_U8S_LE(_tt), _at, _stridx
+
+/* 3.7.2.2 */
+#define TUD_VIDEO_DESC_OUTPUT_TERM(_tid, _tt, _at, _srcid, _stridx) \
+  TUD_VIDEO_DESC_OUTPUT_TERM_LEN, TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VC_OUTPUT_TERMINAL, \
+    _tid, U16_TO_U8S_LE(_tt), _at, _srcid, _stridx
+
+/* 3.7.2.3 */
+#define TUD_VIDEO_DESC_CAMERA_TERM(_tid, _at, _stridx, _focal_min, _focal_max, _focal, _ctls) \
+  TUD_VIDEO_DESC_CAMERA_TERM_LEN, TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VC_INPUT_TERMINAL, \
+    _tid, U16_TO_U8S_LE(VIDEO_ITT_CAMERA), _at, _stridx, \
+    U16_TO_U8S_LE(_focal_min), U16_TO_U8S_LE(_focal_max), U16_TO_U8S_LE(_focal), 3, \
+    TU_U32_BYTE0(_ctls), TU_U32_BYTE1(_ctls), TU_U32_BYTE2(_ctls)
+
+/* 3.9.1 */
+#define TUD_VIDEO_DESC_STD_VS(_itfnum, _alt, _epn, _stridx) \
+  TUD_VIDEO_DESC_STD_VS_LEN, TUSB_DESC_INTERFACE, _itfnum, _alt, \
+  _epn, TUSB_CLASS_VIDEO, VIDEO_SUBCLASS_STREAMING, VIDEO_ITF_PROTOCOL_15, _stridx
+
+/* 3.9.2.1 */
+#define TUD_VIDEO_DESC_CS_VS_INPUT(_numfmt, _totallen, _ep, _inf, _termlnk, _sticaptmeth, _trgspt, _trgusg, ...) \
+  TUD_VIDEO_DESC_CS_VS_IN_LEN + (_numfmt) * (TU_ARGS_NUM(__VA_ARGS__)), TUSB_DESC_CS_INTERFACE, \
+  VIDEO_CS_ITF_VS_INPUT_HEADER, _numfmt, \
+  U16_TO_U8S_LE((_totallen) + TUD_VIDEO_DESC_CS_VS_IN_LEN + (_numfmt) * (TU_ARGS_NUM(__VA_ARGS__))), \
+  _ep, _inf, _termlnk, _sticaptmeth, _trgspt, _trgusg, (TU_ARGS_NUM(__VA_ARGS__)), __VA_ARGS__
+
+/* 3.9.2.2 */
+#define TUD_VIDEO_DESC_CS_VS_OUTPUT(_numfmt, _totallen, _ep, _inf, _termlnk, ...) \
+  TUD_VIDEO_DESC_CS_VS_OUT_LEN + (_numfmt) * (TU_ARGS_NUM(__VA_ARGS__)), TUSB_DESC_CS_INTERFACE, \
+  VIDEO_CS_ITF_VS_OUTPUT_HEADER, _numfmt, \
+  U16_TO_U8S_LE((_totallen) + TUD_VIDEO_DESC_CS_VS_OUT_LEN + (_numfmt) * (TU_ARGS_NUM(__VA_ARGS__))), \
+  _ep, _inf, _termlnk, (TU_ARGS_NUM(__VA_ARGS__)), __VA_ARGS__
+
+/* Uncompressed 3.1.1 */
+#define TUD_VIDEO_GUID(_g0,_g1,_g2,_g3,_g4,_g5,_g6,_g7,_g8,_g9,_g10,_g11,_g12,_g13,_g14,_g15) _g0,_g1,_g2,_g3,_g4,_g5,_g6,_g7,_g8,_g9,_g10,_g11,_g12,_g13,_g14,_g15
+
+#define TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR(_fmtidx, _numfrmdesc, \
+  _guid, _bitsperpix, _frmidx, _asrx, _asry, _interlace, _cp) \
+  TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR_LEN, TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VS_FORMAT_UNCOMPRESSED, \
+  _fmtidx, _numfrmdesc, TUD_VIDEO_GUID(_guid), \
+  _bitsperpix, _frmidx, _asrx,  _asry, _interlace, _cp
+
+/* Uncompressed 3.1.2 Table 3-3 */
+#define TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT(_frmidx, _cap, _width, _height, _minbr, _maxbr, _maxfrmbufsz, _frminterval, _minfrminterval, _maxfrminterval, _frmintervalstep) \
+  TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT_LEN, TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VS_FRAME_UNCOMPRESSED, \
+  _frmidx, _cap, U16_TO_U8S_LE(_width), U16_TO_U8S_LE(_height), U32_TO_U8S_LE(_minbr), U32_TO_U8S_LE(_maxbr), \
+  U32_TO_U8S_LE(_maxfrmbufsz), U32_TO_U8S_LE(_frminterval), 0, \
+  U32_TO_U8S_LE(_minfrminterval), U32_TO_U8S_LE(_maxfrminterval), U32_TO_U8S_LE(_frmintervalstep)
+
+/* Uncompressed 3.1.2 Table 3-4 */
+#define TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_DISC(_frmidx, _cap, _width, _height, _minbr, _maxbr, _maxfrmbufsz, _frminterval, ...) \
+  TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_DISC_LEN + (TU_ARGS_NUM(__VA_ARGS__)) * 4, \
+  TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VS_FRAME_UNCOMPRESSED, \
+  _frmidx, _cap, U16_TO_U8S_LE(_width), U16_TO_U8S_LE(_height), U32_TO_U8S_LE(_minbr), U32_TO_U8S_LE(_maxbr), \
+  U32_TO_U8S_LE(_maxfrmbufsz), U32_TO_U8S_LE(_frminterval), (TU_ARGS_NUM(__VA_ARGS__)), __VA_ARGS__
+
+/* Motion-JPEG 3.1.1 Table 3-1 */
+#define TUD_VIDEO_DESC_CS_VS_FMT_MJPEG(_fmtidx, _numfrmdesc, _fixed_sz, _frmidx, _asrx, _asry, _interlace, _cp) \
+  TUD_VIDEO_DESC_CS_VS_FMT_MJPEG_LEN, TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VS_FORMAT_MJPEG, \
+  _fmtidx, _numfrmdesc, _fixed_sz, _frmidx, _asrx,  _asry, _interlace, _cp
+
+/* Motion-JPEG 3.1.1 Table 3-2 and 3-3 */
+#define TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_CONT(_frmidx, _cap, _width, _height, _minbr, _maxbr, _maxfrmbufsz, _frminterval, _minfrminterval, _maxfrminterval, _frmintervalstep) \
+  TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_CONT_LEN, TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VS_FRAME_MJPEG, \
+  _frmidx, _cap, U16_TO_U8S_LE(_width), U16_TO_U8S_LE(_height), U32_TO_U8S_LE(_minbr), U32_TO_U8S_LE(_maxbr), \
+  U32_TO_U8S_LE(_maxfrmbufsz), U32_TO_U8S_LE(_frminterval), 0, \
+  U32_TO_U8S_LE(_minfrminterval), U32_TO_U8S_LE(_maxfrminterval), U32_TO_U8S_LE(_frmintervalstep)
+
+/* Motion-JPEG 3.1.1 Table 3-2 and 3-4 */
+#define TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_DISC(_frmidx, _cap, _width, _height, _minbr, _maxbr, _maxfrmbufsz, _frminterval, ...) \
+  TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_DISC_LEN + (TU_ARGS_NUM(__VA_ARGS__)) * 4, \
+  TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VS_FRAME_MJPEG, \
+  _frmidx, _cap, U16_TO_U8S_LE(_width), U16_TO_U8S_LE(_height), U32_TO_U8S_LE(_minbr), U32_TO_U8S_LE(_maxbr), \
+  U32_TO_U8S_LE(_maxfrmbufsz), U32_TO_U8S_LE(_frminterval), (TU_ARGS_NUM(__VA_ARGS__)), __VA_ARGS__
+
+/* Motion-Frame-Based 3.1.1 Table 3-1 */
+#define TUD_VIDEO_DESC_CS_VS_FMT_FRAME_BASED(_fmtidx, _numfrmdesc, _guid, _bitsperpix, _frmidx, _asrx, _asry, _interlace, _cp, _variablesize) \
+  TUD_VIDEO_DESC_CS_VS_FMT_FRAME_BASED_LEN, TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VS_FORMAT_FRAME_BASED, \
+  _fmtidx, _numfrmdesc, TUD_VIDEO_GUID(_guid), _bitsperpix, _frmidx, _asrx,  _asry, _interlace, _cp, _variablesize
+
+/* Motion-Frame-Based 3.1.1 Table 3-2 and 3-3 */
+#define TUD_VIDEO_DESC_CS_VS_FRM_FRAME_BASED_CONT(_frmidx, _cap, _width, _height, _minbr, _maxbr, _frminterval, _bytesperline, _minfrminterval, _maxfrminterval, _frmintervalstep) \
+  TUD_VIDEO_DESC_CS_VS_FRM_FRAME_BASED_CONT_LEN, TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VS_FRAME_FRAME_BASED, \
+  _frmidx, _cap, U16_TO_U8S_LE(_width), U16_TO_U8S_LE(_height), U32_TO_U8S_LE(_minbr), U32_TO_U8S_LE(_maxbr), \
+  U32_TO_U8S_LE(_frminterval), 0, U32_TO_U8S_LE(_bytesperline), \
+  U32_TO_U8S_LE(_minfrminterval), U32_TO_U8S_LE(_maxfrminterval), U32_TO_U8S_LE(_frmintervalstep)
+
+/* Motion-Frame-Based 3.1.1 Table 3-2 and 3-4 */
+#define TUD_VIDEO_DESC_CS_VS_FRM_FRAME_BASED_DISC(_frmidx, _cap, _width, _height, _minbr, _maxbr, _frminterval, _bytesperline, ...) \
+  TUD_VIDEO_DESC_CS_VS_FRM_FRAME_BASED_DISC_LEN + (TU_ARGS_NUM(__VA_ARGS__)) * 4, \
+  TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VS_FRAME_FRAME_BASED, \
+  _frmidx, _cap, U16_TO_U8S_LE(_width), U16_TO_U8S_LE(_height), U32_TO_U8S_LE(_minbr), U32_TO_U8S_LE(_maxbr), \
+U32_TO_U8S_LE(_frminterval), U32_TO_U8S_LE(_bytesperline), (TU_ARGS_NUM(__VA_ARGS__)), __VA_ARGS__
+
+/* 3.9.2.6 */
+#define TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING(_color, _trns, _mat) \
+  TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN, \
+  TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VS_COLORFORMAT, \
+  _color, _trns, _mat
+
+/* 3.10.1.1 */
+#define TUD_VIDEO_DESC_EP_ISO(_ep, _epsize, _ep_interval) \
+  7, TUSB_DESC_ENDPOINT, _ep, (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS),\
+  U16_TO_U8S_LE(_epsize), _ep_interval
+
+/* 3.10.1.2 */
+#define TUD_VIDEO_DESC_EP_BULK(_ep, _epsize, _ep_interval) \
+  7, TUSB_DESC_ENDPOINT, _ep, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), _ep_interval
+
+#endif
@@ -0,0 +1,119 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ * Copyright (c) 2021 Koji KITAYAMA
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_VIDEO_DEVICE_H_
+#define TUSB_VIDEO_DEVICE_H_
+
+#include "common/tusb_common.h"
+#include "video.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+//--------------------------------------------------------------------+
+// Payload request
+//--------------------------------------------------------------------+
+typedef struct TU_ATTR_PACKED {
+    void* buf;      /* Payload buffer to be filled */
+    size_t length;  /* Length of the requested data in bytes */
+    size_t offset;  /* Offset within the frame (in bytes) */
+} tud_video_payload_request_t;
+
+//--------------------------------------------------------------------+
+// Application API (Multiple Ports)
+// CFG_TUD_VIDEO > 1
+//--------------------------------------------------------------------+
+
+bool tud_video_n_connected(uint_fast8_t ctl_idx);
+
+/** Return true if streaming
+ *
+ * @param[in] ctl_idx    Destination control interface index
+ * @param[in] stm_idx    Destination streaming interface index */
+bool tud_video_n_streaming(uint_fast8_t ctl_idx, uint_fast8_t stm_idx);
+
+/** Transfer a frame
+ *
+ * @param[in] ctl_idx    Destination control interface index
+ * @param[in] stm_idx    Destination streaming interface index
+ * @param[in] buffer     Frame buffer. The caller must not use this buffer until the operation is completed.
+ * @param[in] bufsize    Byte size of the frame buffer */
+bool tud_video_n_frame_xfer(uint_fast8_t ctl_idx, uint_fast8_t stm_idx, void *buffer, size_t bufsize);
+
+/*------------- Optional callbacks -------------*/
+/** Invoked when compeletion of a frame transfer
+ *
+ * @param[in] ctl_idx    Destination control interface index
+ * @param[in] stm_idx    Destination streaming interface index */
+void tud_video_frame_xfer_complete_cb(uint_fast8_t ctl_idx, uint_fast8_t stm_idx);
+
+//--------------------------------------------------------------------+
+// Application Callback API (weak is optional)
+//--------------------------------------------------------------------+
+
+/** Invoked when SET_POWER_MODE request received
+ *
+ * @param[in] ctl_idx    Destination control interface index
+ * @param[in] stm_idx    Destination streaming interface index
+ * @return video_error_code_t */
+int tud_video_power_mode_cb(uint_fast8_t ctl_idx, uint8_t power_mod);
+
+/** Invoked when VS_COMMIT_CONTROL(SET_CUR) request received
+ *
+ * @param[in] ctl_idx     Destination control interface index
+ * @param[in] stm_idx     Destination streaming interface index
+ * @param[in] parameters  Video streaming parameters
+ * @return video_error_code_t */
+int tud_video_commit_cb(uint_fast8_t ctl_idx, uint_fast8_t stm_idx,
+                                     video_probe_and_commit_control_t const *parameters);
+
+/** Invoked if buffer is set to NULL (allows bufferless on the fly data generation)
+ *
+ * @param[in]   ctl_idx       Destination control interface index
+ * @param[in]   stm_idx       Destination streaming interface index
+ * @param[out]  payload_buf   Payload storage buffer (target buffer for requested data)
+ * @param[in]   payload_size  Size of payload_buf (requested data size)
+ * @param[in]   offset        Current byte offset relative to given bufsize from tud_video_n_frame_xfer (framesize)  */
+void tud_video_prepare_payload_cb(uint_fast8_t ctl_idx, uint_fast8_t stm_idx, tud_video_payload_request_t* request);
+
+//--------------------------------------------------------------------+
+// INTERNAL USBD-CLASS DRIVER API
+//--------------------------------------------------------------------+
+void     videod_init           (void);
+bool     videod_deinit         (void);
+void     videod_reset          (uint8_t rhport);
+uint16_t videod_open           (uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+bool     videod_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+bool     videod_xfer_cb        (uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
@@ -0,0 +1,407 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_COMMON_H_
+#define TUSB_COMMON_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Macros Helper
+//--------------------------------------------------------------------+
+#define TU_ARRAY_SIZE(_arr)           ( sizeof(_arr) / sizeof(_arr[0]) )
+#define TU_FIELD_SIZE(_type, _field)  (sizeof(((_type *)0)->_field))
+#define TU_MIN(_x, _y)                ( ( (_x) < (_y) ) ? (_x) : (_y) )
+#define TU_MAX(_x, _y)                ( ( (_x) > (_y) ) ? (_x) : (_y) )
+#define TU_DIV_CEIL(n, d)             (((n) + (d) - 1) / (d))
+#define TU_DIV_ROUND_NEAREST(v, d)    (((v) + (d)/2) / (d) ) // round to nearest integer
+
+#define TU_U16(_high, _low)           ((uint16_t) ((((uint16_t) (_high)) << 8) | ((uint16_t) (_low))))
+#define TU_U16_HIGH(_u16)             ((uint8_t) (((uint16_t) (_u16) >> 8) & 0x00ffu))
+#define TU_U16_LOW(_u16)              ((uint8_t) ((uint16_t) (_u16) & 0x00ffu))
+#define U16_TO_U8S_BE(_u16)           TU_U16_HIGH(_u16), TU_U16_LOW(_u16)
+#define U16_TO_U8S_LE(_u16)           TU_U16_LOW(_u16), TU_U16_HIGH(_u16)
+
+#define TU_U24(_high, _mid, _low)     ((uint32_t) ((((uint32_t) (_high)) << 16) | (((uint32_t) (_mid)) << 8) | ((uint32_t) (_low))))
+#define TU_U24_HIGH(_u24)             ((uint8_t) (((uint32_t) (_u24) >> 16) & 0x0000ffu))
+#define TU_U24_MID(_u24)              ((uint8_t) (((uint32_t) (_u24) >>  8) & 0x0000ffu))
+#define TU_U24_LOW(_u24)              ((uint8_t) ((uint32_t) (_u24) & 0x0000ffu))
+#define U24_TO_U8S_BE(_u24)           TU_U24_HIGH(_u24), TU_U24_MID(_u24), TU_U24_LOW(_u24)
+#define U24_TO_U8S_LE(_u24)           TU_U24_LOW(_u24), TU_U24_MID(_u24), TU_U24_HIGH(_u24)
+
+#define TU_U32_BYTE3(_u32)            ((uint8_t) ((((uint32_t) _u32) >> 24) & 0x000000ff)) // MSB
+#define TU_U32_BYTE2(_u32)            ((uint8_t) ((((uint32_t) _u32) >> 16) & 0x000000ff))
+#define TU_U32_BYTE1(_u32)            ((uint8_t) ((((uint32_t) _u32) >>  8) & 0x000000ff))
+#define TU_U32_BYTE0(_u32)            ((uint8_t) (((uint32_t)  _u32)        & 0x000000ff)) // LSB
+
+#define U32_TO_U8S_BE(_u32)           TU_U32_BYTE3(_u32), TU_U32_BYTE2(_u32), TU_U32_BYTE1(_u32), TU_U32_BYTE0(_u32)
+#define U32_TO_U8S_LE(_u32)           TU_U32_BYTE0(_u32), TU_U32_BYTE1(_u32), TU_U32_BYTE2(_u32), TU_U32_BYTE3(_u32)
+
+#define TU_BIT(n)                     (1UL << (n))
+
+// Generate a mask with bit from high (31) to low (0) set, e.g TU_GENMASK(3, 0) = 0b1111
+#define TU_GENMASK(h, l)              ( (UINT32_MAX << (l)) & (UINT32_MAX >> (31 - (h))) )
+
+//--------------------------------------------------------------------+
+// Includes
+//--------------------------------------------------------------------+
+
+// Standard Headers
+#include <stdbool.h>
+#include <stdint.h>
+#include <inttypes.h>
+#include <stddef.h>
+#include <string.h>
+
+// Tinyusb Common Headers
+#include "tusb_option.h"
+#include "tusb_compiler.h"
+#include "tusb_verify.h"
+#include "tusb_types.h"
+#include "tusb_debug.h"
+
+//--------------------------------------------------------------------+
+// API implemented by application if needed
+// TODO move to a more obvious place/file
+//--------------------------------------------------------------------+
+
+// Get current milliseconds, required by some port/configuration without RTOS
+extern uint32_t tusb_time_millis_api(void);
+
+// Delay in milliseconds, use tusb_time_millis_api() by default. required by some port/configuration with no RTOS
+extern void tusb_time_delay_ms_api(uint32_t ms);
+
+// flush data cache
+extern void tusb_app_dcache_flush(uintptr_t addr, uint32_t data_size);
+
+// invalidate data cache
+extern void tusb_app_dcache_invalidate(uintptr_t addr, uint32_t data_size);
+
+// Optional physical <-> virtual address translation
+extern void* tusb_app_virt_to_phys(void *virt_addr);
+extern void* tusb_app_phys_to_virt(void *phys_addr);
+
+//--------------------------------------------------------------------+
+// Internal Inline Functions
+//--------------------------------------------------------------------+
+
+//------------- Mem -------------//
+#define tu_memclr(buffer, size)  (void) memset((buffer), 0, (size))
+#define tu_varclr(_var)          tu_memclr(_var, sizeof(*(_var)))
+
+// This is a backport of memset_s from c11
+TU_ATTR_ALWAYS_INLINE static inline int tu_memset_s(void *dest, size_t destsz, int ch, size_t count) {
+  // Validate parameters
+  if (dest == NULL) {
+    return -1;
+  }
+
+  if (count == 0u) {
+    return 0;
+  }
+
+  if (count > destsz) {
+    return -1;
+  }
+
+  (void) memset(dest, ch, count);
+  return 0;
+}
+
+// This is a backport of memcpy_s from c11
+TU_ATTR_ALWAYS_INLINE static inline int tu_memcpy_s(void *dest, size_t destsz, const void *src, size_t count) {
+  if (dest == NULL) {
+    return -1;
+  }
+
+  if (count == 0u) {
+    return 0;
+  }
+
+  if (src == NULL) {
+    return -1;
+  }
+
+  if (count > destsz) {
+    return -1;
+  }
+
+  (void) memcpy(dest, src, count);
+  return 0;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tu_mem_is_zero(const void *buffer, size_t size) {
+  const uint8_t* buf8 = (const uint8_t*) buffer;
+  for (size_t i = 0; i < size; i++) {
+    if (buf8[i] != 0) { return false; }
+  }
+  return true;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tu_mem_is_ff(const void *buffer, size_t size) {
+  const uint8_t* buf8 = (const uint8_t*) buffer;
+  for (size_t i = 0; i < size; i++) {
+    if (buf8[i] != 0xff) { return false; }
+  }
+  return true;
+}
+
+
+//------------- Bytes -------------//
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_u32(uint8_t b3, uint8_t b2, uint8_t b1, uint8_t b0) {
+  return (((uint32_t)b3) << 24) | (((uint32_t)b2) << 16) | (((uint32_t)b1) << 8) | b0;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_u32_from_u16(uint16_t high, uint16_t low) {
+  return (((uint32_t)high) << 16) | low;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u16(uint8_t high, uint8_t low) {
+  return (uint16_t)((((uint16_t)high) << 8) | low);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte3(uint32_t ui32) { return TU_U32_BYTE3(ui32); }
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte2(uint32_t ui32) { return TU_U32_BYTE2(ui32); }
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte1(uint32_t ui32) { return TU_U32_BYTE1(ui32); }
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte0(uint32_t ui32) { return TU_U32_BYTE0(ui32); }
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u32_high16(uint32_t ui32) { return (uint16_t) (ui32 >> 16); }
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u32_low16 (uint32_t ui32) { return (uint16_t) (ui32 & 0x0000ffffu); }
+
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_high(uint16_t ui16) { return TU_U16_HIGH(ui16); }
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_low (uint16_t ui16) { return TU_U16_LOW(ui16); }
+
+//------------- Bits -------------//
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_bit_set  (uint32_t value, uint8_t pos) { return value | TU_BIT(pos); }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_bit_clear(uint32_t value, uint8_t pos) { return value & (~TU_BIT(pos)); }
+TU_ATTR_ALWAYS_INLINE static inline bool     tu_bit_test (uint32_t value, uint8_t pos) { return (value & TU_BIT(pos)) ? true : false; }
+
+//------------- Min -------------//
+TU_ATTR_ALWAYS_INLINE static inline uint8_t  tu_min8  (uint8_t  x, uint8_t y ) { return (x < y) ? x : y; }
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_min16 (uint16_t x, uint16_t y) { return (x < y) ? x : y; }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_min32 (uint32_t x, uint32_t y) { return (x < y) ? x : y; }
+
+//------------- Max -------------//
+TU_ATTR_ALWAYS_INLINE static inline uint8_t  tu_max8  (uint8_t  x, uint8_t y ) { return (x > y) ? x : y; }
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_max16 (uint16_t x, uint16_t y) { return (x > y) ? x : y; }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_max32 (uint32_t x, uint32_t y) { return (x > y) ? x : y; }
+
+//------------- Align -------------//
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align(uint32_t value, uint32_t alignment) {
+  return value & ((uint32_t) ~(alignment-1));
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align4  (uint32_t value) { return (value & 0xFFFFFFFCUL); }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align8  (uint32_t value) { return (value & 0xFFFFFFF8UL); }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align16 (uint32_t value) { return (value & 0xFFFFFFF0UL); }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align32 (uint32_t value) { return (value & 0xFFFFFFE0UL); }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align4k (uint32_t value) { return (value & 0xFFFFF000UL); }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_offset4k(uint32_t value) { return (value & 0xFFFUL); }
+
+TU_ATTR_ALWAYS_INLINE static inline bool tu_is_aligned32(uint32_t value) { return (value & 0x1FUL) == 0; }
+TU_ATTR_ALWAYS_INLINE static inline bool tu_is_aligned64(uint64_t value) { return (value & 0x3FUL) == 0; }
+
+//------------- Mathematics -------------//
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_div_ceil(uint32_t v, uint32_t d) { return TU_DIV_CEIL(v, d); }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_div_round_nearest(uint32_t v, uint32_t d) { return TU_DIV_ROUND_NEAREST(v, d); }
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_round_up(uint32_t v, uint32_t f) { return tu_div_ceil(v, f) * f; }
+
+// log2 of a value is its MSB's position
+// TODO use clz TODO remove
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_log2(uint32_t value) {
+  uint8_t result = 0;
+  while ((value >>= 1u) != 0u) {
+    result++;
+  }
+  return result;
+}
+
+//static inline uint8_t tu_log2(uint32_t value)
+//{
+//   return sizeof(uint32_t) * CHAR_BIT - __builtin_clz(x) - 1;
+//}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tu_is_power_of_two(uint32_t value) {
+   return (value != 0) && ((value & (value - 1)) == 0);
+}
+
+//------------- Unaligned Access -------------//
+#if TUP_ARCH_STRICT_ALIGN
+
+// Rely on compiler to generate correct code for unaligned access
+typedef struct { uint16_t val; } TU_ATTR_PACKED tu_unaligned_uint16_t;
+typedef struct { uint32_t val; } TU_ATTR_PACKED tu_unaligned_uint32_t;
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_unaligned_read32(const void *mem) {
+  tu_unaligned_uint32_t const *ua32 = (tu_unaligned_uint32_t const *) mem;
+  return ua32->val;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write32(void *mem, uint32_t value) {
+  tu_unaligned_uint32_t *ua32 = (tu_unaligned_uint32_t *) mem;
+  ua32->val = value;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_unaligned_read16(const void *mem) {
+  tu_unaligned_uint16_t const *ua16 = (tu_unaligned_uint16_t const *) mem;
+  return ua16->val;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void *mem, uint16_t value) {
+  tu_unaligned_uint16_t *ua16 = (tu_unaligned_uint16_t *) mem;
+  ua16->val = value;
+}
+
+#elif TUP_MCU_STRICT_ALIGN
+
+// MCU such as LPC_IP3511 Highspeed cannot access unaligned memory on USB_RAM although it is ARM M4.
+// We have to manually pick up bytes since tu_unaligned_uint32_t will still generate unaligned code
+// NOTE: volatile cast to memory to prevent compiler to optimize and generate unaligned code
+// TODO Big Endian may need minor changes
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_unaligned_read32(const void* mem) {
+  volatile uint8_t const* buf8 = (uint8_t const*) mem;
+  return tu_u32(buf8[3], buf8[2], buf8[1], buf8[0]);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write32(void* mem, uint32_t value) {
+  volatile uint8_t* buf8 = (uint8_t*) mem;
+  buf8[0] = tu_u32_byte0(value);
+  buf8[1] = tu_u32_byte1(value);
+  buf8[2] = tu_u32_byte2(value);
+  buf8[3] = tu_u32_byte3(value);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_unaligned_read16(const void* mem) {
+  volatile uint8_t const* buf8 = (uint8_t const*) mem;
+  return tu_u16(buf8[1], buf8[0]);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void* mem, uint16_t value) {
+  volatile uint8_t* buf8 = (uint8_t*) mem;
+  buf8[0] = tu_u16_low(value);
+  buf8[1] = tu_u16_high(value);
+}
+
+#else
+
+// MCU that could access unaligned memory natively
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_unaligned_read32(const void *mem) {
+  return *((uint32_t const *) mem);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_unaligned_read16(const void *mem) {
+  return *((uint16_t const *) mem);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write32(void *mem, uint32_t value) {
+  *((uint32_t *) mem) = value;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void *mem, uint16_t value) {
+  *((uint16_t *) mem) = value;
+}
+
+#endif
+
+// scatter read 4 bytes from two buffers (LE). Parameter are not checked
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_scatter_read32(const uint8_t *buf1, uint8_t len1, const uint8_t *buf2,
+                                                               uint8_t len2) {
+  uint32_t result = 0;
+  uint8_t  shift  = 0;
+
+  for (uint8_t i = 0; i < len1; ++i) {
+    result |= ((uint32_t)buf1[i]) << shift;
+    shift += 8;
+  }
+
+  for (uint8_t i = 0; i < len2; ++i) {
+    result |= ((uint32_t)buf2[i]) << shift;
+    shift += 8;
+  }
+
+  return result;
+}
+
+// scatter write 4 bytes (LE) to two buffers. Parameter are not checked
+TU_ATTR_ALWAYS_INLINE static inline void tu_scatter_write32(uint32_t value, uint8_t *buf1, uint8_t len1,
+                                                            uint8_t *buf2, uint8_t len2) {
+  for (uint8_t i = 0; i < len1; ++i) {
+    buf1[i] = (uint8_t)(value & 0xFF);
+    value >>= 8;
+  }
+
+  for (uint8_t i = 0; i < len2; ++i) {
+    buf2[i] = (uint8_t)(value & 0xFF);
+    value >>= 8;
+  }
+}
+
+//--------------------------------------------------------------------+
+// Descriptor helper
+//--------------------------------------------------------------------+
+
+// return next descriptor
+TU_ATTR_ALWAYS_INLINE static inline uint8_t const * tu_desc_next(void const* desc) {
+  uint8_t const* desc8 = (uint8_t const*) desc;
+  return desc8 + desc8[DESC_OFFSET_LEN];
+}
+
+// get descriptor length
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_len(void const* desc) {
+  return ((uint8_t const*) desc)[DESC_OFFSET_LEN];
+}
+
+// get descriptor type
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_type(void const* desc) {
+  return ((uint8_t const*) desc)[DESC_OFFSET_TYPE];
+}
+
+// get descriptor subtype
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_subtype(void const* desc) {
+  return ((uint8_t const*) desc)[DESC_OFFSET_SUBTYPE];
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tu_desc_in_bounds(const uint8_t *p_desc, const uint8_t *desc_end) {
+  return p_desc < desc_end && tu_desc_next(p_desc) <= desc_end;
+}
+
+// find descriptor that match byte1 (type)
+uint8_t const * tu_desc_find(uint8_t const* desc, uint8_t const* end, uint8_t byte1);
+
+// find descriptor that match byte1 (type) and byte2
+uint8_t const * tu_desc_find2(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2);
+
+// find descriptor that match byte1 (type) and byte2
+uint8_t const * tu_desc_find3(uint8_t const* desc, uint8_t const* end, uint8_t byte1, uint8_t byte2, uint8_t byte3);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* TUSB_COMMON_H_ */
@@ -0,0 +1,284 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#pragma once
+
+#define TU_TOKEN(x)           x
+#define TU_STRING(x)          #x                  ///< stringify without expand
+#define TU_XSTRING(x)         TU_STRING(x)        ///< expand then stringify
+#define TU_STRCAT(a, b)       a##b                ///< concat without expand
+#define TU_STRCAT3(a, b, c)   a##b##c             ///< concat without expand
+#define TU_XSTRCAT(a, b)      TU_STRCAT(a, b)     ///< expand then concat
+#define TU_XSTRCAT3(a, b, c)  TU_STRCAT3(a, b, c) ///< expand then concat 3 tokens
+
+#define TU_INCLUDE_PATH(_dir,_file) TU_XSTRING( TU_TOKEN(_dir)TU_TOKEN(_file) )
+
+#if defined __COUNTER__ && __COUNTER__ != __COUNTER__
+  #define TU_COUNTER __COUNTER__
+#else
+  #define TU_COUNTER __LINE__
+#endif
+
+// Compile-time Assert
+#if defined (__cplusplus) && __cplusplus >= 201103L
+  #define TU_VERIFY_STATIC   static_assert
+#elif defined (__STDC_VERSION__) && __STDC_VERSION__ >= 201112L
+  #define TU_VERIFY_STATIC   _Static_assert
+#elif defined(__CCRX__)
+  #define TU_VERIFY_STATIC(const_expr, _mess) typedef char TU_XSTRCAT(_verify_static_, TU_COUNTER)[(const_expr) ? 1 : 0];
+#else
+  #define TU_VERIFY_STATIC(const_expr, _mess) enum { TU_XSTRCAT(_verify_static_, TU_COUNTER) = 1/(!!(const_expr)) }
+#endif
+
+/* --------------------- Fuzzing types -------------------------------------- */
+#ifdef _FUZZ
+  #define tu_static static __thread
+#else
+  #define tu_static static
+#endif
+
+// for declaration of reserved field, make use of TU_COUNTER
+#define TU_RESERVED           TU_XSTRCAT(reserved, TU_COUNTER)
+
+#define TU_LITTLE_ENDIAN (0x12u)
+#define TU_BIG_ENDIAN (0x21u)
+
+/*------------------------------------------------------------------*/
+/* Count number of arguments of __VA_ARGS__
+ * - reference www.stackoverflow.com/questions/2124339/c-preprocessor-va-args-number-of-arguments
+ * - TU_GET_NTH_ARG() takes args >= N (64) but only expand to Nth one (64th)
+ * - TU_NARG_RSEQ_N() is reverse sequential to N to add padding to have
+ * Nth position is the same as the number of arguments
+ * - ##__VA_ARGS__ is used to deal with 0 paramerter (swallows comma)
+ *------------------------------------------------------------------*/
+#if defined(__CCRX__)
+#define TU_ARGS_NUM(...)   TU_NARG_IMPL(_0, __VA_ARGS__, TU_NARG_RSEQ_N())
+#else
+#define TU_ARGS_NUM(...)   TU_NARG_IMPL(_0, ##__VA_ARGS__, TU_NARG_RSEQ_N())
+#endif
+
+#define TU_NARG_IMPL(...)      TU_GET_NTH_ARG(__VA_ARGS__)
+#define TU_GET_NTH_ARG( \
+          _1, _2, _3, _4, _5, _6, _7, _8, _9,_10, \
+         _11,_12,_13,_14,_15,_16,_17,_18,_19,_20, \
+         _21,_22,_23,_24,_25,_26,_27,_28,_29,_30, \
+         _31,_32,_33,_34,_35,_36,_37,_38,_39,_40, \
+         _41,_42,_43,_44,_45,_46,_47,_48,_49,_50, \
+         _51,_52,_53,_54,_55,_56,_57,_58,_59,_60, \
+         _61,_62,_63,N,...) N
+#define TU_NARG_RSEQ_N() \
+         62,61,60,                      \
+         59,58,57,56,55,54,53,52,51,50, \
+         49,48,47,46,45,44,43,42,41,40, \
+         39,38,37,36,35,34,33,32,31,30, \
+         29,28,27,26,25,24,23,22,21,20, \
+         19,18,17,16,15,14,13,12,11,10, \
+         9,8,7,6,5,4,3,2,1,0
+
+// Apply a macro X to each of the arguments with a separation/delimiter
+#define TU_ARGS_APPLY(_X, _s, ...)   TU_XSTRCAT(TU_ARGS_APPLY_, TU_ARGS_NUM(__VA_ARGS__))(_X, _s, __VA_ARGS__)
+
+#define TU_ARGS_APPLY_1(_X, _s, _a1)                                    _X(_a1)
+#define TU_ARGS_APPLY_2(_X, _s, _a1, _a2)                               _X(_a1) _s _X(_a2)
+#define TU_ARGS_APPLY_3(_X, _s, _a1, _a2, _a3)                          _X(_a1) _s TU_ARGS_APPLY_2(_X, _s, _a2, _a3)
+#define TU_ARGS_APPLY_4(_X, _s, _a1, _a2, _a3, _a4)                     _X(_a1) _s TU_ARGS_APPLY_3(_X, _s, _a2, _a3, _a4)
+#define TU_ARGS_APPLY_5(_X, _s, _a1, _a2, _a3, _a4, _a5)                _X(_a1) _s TU_ARGS_APPLY_4(_X, _s, _a2, _a3, _a4, _a5)
+#define TU_ARGS_APPLY_6(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6)           _X(_a1) _s TU_ARGS_APPLY_5(_X, _s, _a2, _a3, _a4, _a5, _a6)
+#define TU_ARGS_APPLY_7(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6, _a7)      _X(_a1) _s TU_ARGS_APPLY_6(_X, _s, _a2, _a3, _a4, _a5, _a6, _a7)
+#define TU_ARGS_APPLY_8(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6, _a7, _a8) _X(_a1) _s TU_ARGS_APPLY_7(_X, _s, _a2, _a3, _a4, _a5, _a6, _a7, _a8)
+
+// Apply a macro X to each of the arguments and expand the result with comma
+#define TU_ARGS_APPLY_EXPAND(_X, ...)   TU_XSTRCAT(TU_ARGS_APPLY_EXPAND_, TU_ARGS_NUM(__VA_ARGS__))(_X, __VA_ARGS__)
+
+#define TU_ARGS_APPLY_EXPAND_1(_X, _a1)                                    _X(_a1)
+#define TU_ARGS_APPLY_EXPAND_2(_X, _a1, _a2)                               _X(_a1), _X(_a2)
+#define TU_ARGS_APPLY_EXPAND_3(_X, _a1, _a2, _a3)                          _X(_a1), TU_ARGS_APPLY_EXPAND_2(_X, _a2, _a3)
+#define TU_ARGS_APPLY_EXPAND_4(_X, _a1, _a2, _a3, _a4)                     _X(_a1), TU_ARGS_APPLY_EXPAND_3(_X, _a2, _a3, _a4)
+#define TU_ARGS_APPLY_EXPAND_5(_X, _a1, _a2, _a3, _a4, _a5)                _X(_a1), TU_ARGS_APPLY_EXPAND_4(_X, _a2, _a3, _a4, _a5)
+#define TU_ARGS_APPLY_EXPAND_6(_X, _a1, _a2, _a3, _a4, _a5, _a6)           _X(_a1), TU_ARGS_APPLY_EXPAND_5(_X, _a2, _a3, _a4, _a5, _a6)
+#define TU_ARGS_APPLY_EXPAND_7(_X, _a1, _a2, _a3, _a4, _a5, _a6, _a7)      _X(_a1), TU_ARGS_APPLY_EXPAND_6(_X, _a2, _a3, _a4, _a5, _a6, _a7)
+#define TU_ARGS_APPLY_EXPAND_8(_X, _a1, _a2, _a3, _a4, _a5, _a6, _a7, _a8) _X(_a1), TU_ARGS_APPLY_EXPAND_7(_X, _a2, _a3, _a4, _a5, _a6, _a7, _a8)
+
+//--------------------------------------------------------------------+
+// Macro for function default arguments
+//--------------------------------------------------------------------+
+#define TU_GET_3RD_ARG(arg1, arg2, arg3, ...)        arg3
+
+// function expand with number of arguments
+#define TU_FUNC_OPTIONAL_ARG(func, ...)   TU_XSTRCAT(func##_arg, TU_ARGS_NUM(__VA_ARGS__))(__VA_ARGS__)
+
+//--------------------------------------------------------------------+
+// Compiler Attribute Abstraction
+//--------------------------------------------------------------------+
+#if defined(__GNUC__) || defined(__ICCARM__) || defined(__TI_COMPILER_VERSION__)
+  #if defined(__ICCARM__)
+    #include <intrinsics.h> // for builtin functions
+  #endif
+
+  #define TU_ATTR_ALIGNED(Bytes)    __attribute__((aligned(Bytes)))
+  #define TU_ATTR_SECTION(sec_name) __attribute__((section(#sec_name)))
+  #define TU_ATTR_PACKED            __attribute__((packed))
+  #define TU_ATTR_WEAK              __attribute__((weak))
+// #define TU_ATTR_WEAK_ALIAS(f)         __attribute__ ((weak, alias(#f)))
+  #ifndef TU_ATTR_ALWAYS_INLINE                                            // allow to override for debug
+    #define TU_ATTR_ALWAYS_INLINE __attribute__((always_inline))
+  #endif
+  #define TU_ATTR_DEPRECATED(mess)      __attribute__ ((deprecated(mess))) // warn if function with this attribute is used
+  #define TU_ATTR_UNUSED                __attribute__ ((unused))           // Function/Variable is meant to be possibly unused
+  #define TU_ATTR_USED                  __attribute__ ((used))             // Function/Variable is meant to be used
+
+  #define TU_ATTR_PACKED_BEGIN
+  #define TU_ATTR_PACKED_END
+  #define TU_ATTR_BIT_FIELD_ORDER_BEGIN
+  #define TU_ATTR_BIT_FIELD_ORDER_END
+
+  #if (defined(__has_attribute) && __has_attribute(__fallthrough__)) || defined(__TI_COMPILER_VERSION__)
+    #define TU_ATTR_FALLTHROUGH __attribute__((fallthrough))
+  #else
+    #define TU_ATTR_FALLTHROUGH     \
+      do {                          \
+      } while (0) /* fallthrough */
+  #endif
+
+// Endian conversion use well-known host to network (big endian) naming
+// For TI ARM compiler, __BYTE_ORDER__ is not defined for MSP430 but still LE
+  #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ || defined(__MSP430__)
+    #define TU_BYTE_ORDER TU_LITTLE_ENDIAN
+  #else
+    #define TU_BYTE_ORDER TU_BIG_ENDIAN
+  #endif
+
+  // Unfortunately XC16 doesn't provide builtins for 32bit endian conversion
+  #if defined(__XC16)
+    #define TU_BSWAP16(u16) (__builtin_swap(u16))
+    #define TU_BSWAP32(u32) ((((u32) & 0xff000000) >> 24) |  \
+                            (((u32) & 0x00ff0000) >> 8)  |  \
+                            (((u32) & 0x0000ff00) << 8)  |  \
+                            (((u32) & 0x000000ff) << 24))
+  #else
+    #define TU_BSWAP16(u16) (__builtin_bswap16(u16))
+    #define TU_BSWAP32(u32) (__builtin_bswap32(u32))
+  #endif
+
+  // List of obsolete callback function that is renamed and should not be defined.
+  // Put it here since only gcc support this pragma
+  #if !defined(__ARMCC_VERSION) && !defined(__ICCARM__)
+    #pragma GCC poison tud_vendor_control_request_cb
+  #endif
+
+#elif defined(__ICCARM__)
+  #include <intrinsics.h>
+  #define TU_ATTR_ALIGNED(Bytes)        __attribute__ ((aligned(Bytes)))
+  #define TU_ATTR_SECTION(sec_name)     __attribute__ ((section(#sec_name)))
+  #define TU_ATTR_PACKED                __attribute__ ((packed))
+  #define TU_ATTR_WEAK                  __attribute__ ((weak))
+  // #define TU_ATTR_WEAK_ALIAS(f)         __attribute__ ((weak, alias(#f)))
+  #ifndef TU_ATTR_ALWAYS_INLINE // allow to override for debug
+    #define TU_ATTR_ALWAYS_INLINE         __attribute__ ((always_inline))
+  #endif
+  #define TU_ATTR_DEPRECATED(mess)      __attribute__ ((deprecated(mess))) // warn if function with this attribute is used
+  #define TU_ATTR_UNUSED                __attribute__ ((unused))           // Function/Variable is meant to be possibly unused
+  #define TU_ATTR_USED                  __attribute__ ((used))             // Function/Variable is meant to be used
+  #define TU_ATTR_FALLTHROUGH           do {} while (0)  /* fallthrough */
+
+  #define TU_ATTR_PACKED_BEGIN
+  #define TU_ATTR_PACKED_END
+  #define TU_ATTR_BIT_FIELD_ORDER_BEGIN
+  #define TU_ATTR_BIT_FIELD_ORDER_END
+
+  // Endian conversion use well-known host to network (big endian) naming
+  #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+    #define TU_BYTE_ORDER TU_LITTLE_ENDIAN
+  #else
+    #define TU_BYTE_ORDER TU_BIG_ENDIAN
+  #endif
+
+  #define TU_BSWAP16(u16) (__iar_builtin_REV16(u16))
+  #define TU_BSWAP32(u32) (__iar_builtin_REV(u32))
+
+#elif defined(__CCRX__)
+  #define TU_ATTR_ALIGNED(Bytes)
+  #define TU_ATTR_SECTION(sec_name)
+  #define TU_ATTR_PACKED
+  #define TU_ATTR_WEAK
+  // #define TU_ATTR_WEAK_ALIAS(f)
+  #define TU_ATTR_ALWAYS_INLINE
+  #define TU_ATTR_DEPRECATED(mess)
+  #define TU_ATTR_UNUSED
+  #define TU_ATTR_USED
+  #define TU_ATTR_FALLTHROUGH           do {} while (0)  /* fallthrough */
+
+  #define TU_ATTR_PACKED_BEGIN          _Pragma("pack")
+  #define TU_ATTR_PACKED_END            _Pragma("packoption")
+  #define TU_ATTR_BIT_FIELD_ORDER_BEGIN _Pragma("bit_order right")
+  #define TU_ATTR_BIT_FIELD_ORDER_END   _Pragma("bit_order")
+
+  // Endian conversion use well-known host to network (big endian) naming
+  #if defined(__LIT)
+    #define TU_BYTE_ORDER TU_LITTLE_ENDIAN
+  #else
+    #define TU_BYTE_ORDER TU_BIG_ENDIAN
+  #endif
+
+  #define TU_BSWAP16(u16) ((unsigned short)_builtin_revw((unsigned long)u16))
+  #define TU_BSWAP32(u32) (_builtin_revl(u32))
+
+#else
+  #error "Compiler attribute porting is required"
+#endif
+
+
+#if (TU_BYTE_ORDER == TU_LITTLE_ENDIAN)
+
+  #define tu_htons(u16)  (TU_BSWAP16(u16))
+  #define tu_ntohs(u16)  (TU_BSWAP16(u16))
+
+  #define tu_htonl(u32)  (TU_BSWAP32(u32))
+  #define tu_ntohl(u32)  (TU_BSWAP32(u32))
+
+  #define tu_htole16(u16) (u16)
+  #define tu_le16toh(u16) (u16)
+
+  #define tu_htole32(u32) (u32)
+  #define tu_le32toh(u32) (u32)
+
+#elif (TU_BYTE_ORDER == TU_BIG_ENDIAN)
+
+  #define tu_htons(u16)  (u16)
+  #define tu_ntohs(u16)  (u16)
+
+  #define tu_htonl(u32)  (u32)
+  #define tu_ntohl(u32)  (u32)
+
+  #define tu_htole16(u16) (TU_BSWAP16(u16))
+  #define tu_le16toh(u16) (TU_BSWAP16(u16))
+
+  #define tu_htole32(u32) (TU_BSWAP32(u32))
+  #define tu_le32toh(u32) (TU_BSWAP32(u32))
+
+#else
+  #error Byte order is undefined
+#endif
@@ -0,0 +1,178 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2022, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_DEBUG_H_
+#define TUSB_DEBUG_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Debug
+//--------------------------------------------------------------------+
+
+// CFG_TUSB_DEBUG for debugging
+// 0 : no debug
+// 1 : print error
+// 2 : print warning
+// 3 : print info
+#if CFG_TUSB_DEBUG
+
+// Enum to String for debugging purposes
+#if CFG_TUSB_DEBUG >= CFG_TUH_LOG_LEVEL || CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
+extern char const* const tu_str_speed[];
+extern char const* const tu_str_std_request[];
+extern char const* const tu_str_xfer_result[];
+#endif
+
+void tu_print_mem(void const *buf, uint32_t count, uint8_t indent);
+
+#ifdef CFG_TUSB_DEBUG_PRINTF
+  extern int CFG_TUSB_DEBUG_PRINTF(const char *format, ...);
+  #define tu_printf    CFG_TUSB_DEBUG_PRINTF
+#else
+  #include <stdio.h>
+  #define tu_printf(...)    (void) printf(__VA_ARGS__)
+#endif
+
+TU_ATTR_ALWAYS_INLINE static inline void tu_print_buf(uint8_t const* buf, uint32_t bufsize) {
+  for(uint32_t i=0; i<bufsize; i++) {
+    tu_printf("%02X ", buf[i]);
+  }
+  tu_printf("\r\n");
+}
+
+// Log with Level
+#define TU_LOG(n, ...)        TU_XSTRCAT(TU_LOG, n)(__VA_ARGS__)
+#define TU_LOG_MEM(n, ...)    TU_XSTRCAT3(TU_LOG, n, _MEM)(__VA_ARGS__)
+#define TU_LOG_BUF(n, ...)    TU_XSTRCAT3(TU_LOG, n, _BUF)(__VA_ARGS__)
+#define TU_LOG_INT(n, ...)    TU_XSTRCAT3(TU_LOG, n, _INT)(__VA_ARGS__)
+#define TU_LOG_HEX(n, ...)    TU_XSTRCAT3(TU_LOG, n, _HEX)(__VA_ARGS__)
+#define TU_LOG_LOCATION()     tu_printf("%s: %d:\r\n", __PRETTY_FUNCTION__, __LINE__)
+#define TU_LOG_FAILED()       tu_printf("%s: %d: Failed\r\n", __PRETTY_FUNCTION__, __LINE__)
+
+// Log Level 1: Error
+#define TU_LOG1               tu_printf
+#define TU_LOG1_MEM           tu_print_mem
+#define TU_LOG1_BUF(_x, _n)   tu_print_buf((uint8_t const*)(_x), _n)
+#define TU_LOG1_INT(_x)       tu_printf(#_x " = %ld\r\n", (unsigned long) (_x) )
+#define TU_LOG1_HEX(_x)       tu_printf(#_x " = 0x%lX\r\n", (unsigned long) (_x) )
+
+// Log Level 2: Warn
+#if CFG_TUSB_DEBUG >= 2
+  #define TU_LOG2             TU_LOG1
+  #define TU_LOG2_MEM         TU_LOG1_MEM
+  #define TU_LOG2_BUF         TU_LOG1_BUF
+  #define TU_LOG2_INT         TU_LOG1_INT
+  #define TU_LOG2_HEX         TU_LOG1_HEX
+#endif
+
+// Log Level 3: Info
+#if CFG_TUSB_DEBUG >= 3
+  #define TU_LOG3             TU_LOG1
+  #define TU_LOG3_MEM         TU_LOG1_MEM
+  #define TU_LOG3_BUF         TU_LOG1_BUF
+  #define TU_LOG3_INT         TU_LOG1_INT
+  #define TU_LOG3_HEX         TU_LOG1_HEX
+#endif
+
+typedef struct {
+  uint32_t key;
+  const char* data;
+} tu_lookup_entry_t;
+
+typedef struct {
+  uint16_t count;
+  tu_lookup_entry_t const* items;
+} tu_lookup_table_t;
+
+static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key) {
+  for(uint16_t i=0; i<p_table->count; i++) {
+    if (p_table->items[i].key == key) {
+      return p_table->items[i].data;
+    }
+  }
+
+  #ifndef CFG_TUSB_DEBUG_PRINTF
+  // not found return the key value in hex if no custom printf is defined
+  static char not_found[11];
+  if (snprintf(not_found, sizeof(not_found), "0x%08lX", (unsigned long)key) <= 0) {
+    not_found[0] = 0;
+  }
+  return not_found;
+  #else
+  return "NotFound";
+  #endif
+}
+
+#endif // CFG_TUSB_DEBUG
+
+#ifndef TU_LOG
+  #define TU_LOG(n, ...)
+  #define TU_LOG_MEM(n, ...)
+  #define TU_LOG_BUF(n, ...)
+  #define TU_LOG_INT(n, ...)
+  #define TU_LOG_HEX(n, ...)
+  #define TU_LOG_LOCATION()
+  #define TU_LOG_FAILED()
+#endif
+
+#define TU_LOG0(...)
+#define TU_LOG0_MEM(...)
+#define TU_LOG0_BUF(...)
+#define TU_LOG0_INT(...)
+#define TU_LOG0_HEX(...)
+
+#ifndef TU_LOG1
+  #define TU_LOG1(...)
+  #define TU_LOG1_MEM(...)
+  #define TU_LOG1_BUF(...)
+  #define TU_LOG1_INT(...)
+  #define TU_LOG1_HEX(...)
+#endif
+
+#ifndef TU_LOG2
+  #define TU_LOG2(...)
+  #define TU_LOG2_MEM(...)
+  #define TU_LOG2_BUF(...)
+  #define TU_LOG2_INT(...)
+  #define TU_LOG2_HEX(...)
+#endif
+
+#ifndef TU_LOG3
+  #define TU_LOG3(...)
+  #define TU_LOG3_MEM(...)
+  #define TU_LOG3_BUF(...)
+  #define TU_LOG3_INT(...)
+  #define TU_LOG3_HEX(...)
+#endif
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
@@ -0,0 +1,310 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ * Copyright (c) 2020 Reinhard Panhuber - rework to unmasked pointers
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_FIFO_H_
+#define TUSB_FIFO_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "common/tusb_common.h"
+#include "osal/osal.h"
+
+//--------------------------------------------------------------------+
+// Configuration
+//--------------------------------------------------------------------+
+// mutex is only needed for RTOS. For OS None, we don't get preempted
+#define CFG_FIFO_MUTEX      OSAL_MUTEX_REQUIRED
+
+#define CFG_TUSB_FIFO_HWFIFO_API (CFG_TUD_EDPT_DEDICATED_HWFIFO || CFG_TUH_EDPT_DEDICATED_HWFIFO)
+
+#ifndef CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE
+  #define CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE 0
+#endif
+
+#ifndef CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE
+  #define CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE 0
+#endif
+
+// Due to the use of unmasked pointers, this FIFO does not suffer from losing
+// one item slice. Furthermore, write and read operations are completely
+// decoupled as write and read functions do not modify a common state. Henceforth,
+// writing or reading from the FIFO within an ISR is safe as long as no other
+// process (thread or ISR) interferes.
+// Also, this FIFO is ready to be used in combination with a DMA as the write and
+// read pointers can be updated from within a DMA ISR. Overflows are detectable
+// within a certain number (see tu_fifo_overflow()).
+
+/* Write/Read "pointer" is in the range of: 0 .. depth - 1, and is used to get the fifo data.
+ * Write/Read "index" is always in the range of: 0 .. 2*depth-1
+ *
+ * The extra window allow us to determine the fifo state of empty or full with only 2 indices
+ * Following are examples with depth = 3
+ *
+ * - empty: W = R
+ *                |
+ *    -------------------------
+ *    | 0 | RW| 2 | 3 | 4 | 5 |
+ *
+ * - full 1: W > R
+ *                |
+ *    -------------------------
+ *    | 0 | R | 2 | 3 | W | 5 |
+ *
+ * - full 2: W < R
+ *                |
+ *    -------------------------
+ *    | 0 | 1 | W | 3 | 4 | R |
+ *
+ * - Number of items in the fifo can be determined in either cases:
+ *    - case W >= R: Count = W - R
+ *    - case W <  R: Count = 2*depth - (R - W)
+ *
+ * In non-overwritable mode, computed Count (in above 2 cases) is at most equal to depth.
+ * However, in over-writable mode, write index can be repeatedly increased and count can be
+ * temporarily larger than depth (overflowed condition) e.g
+ *
+ *  - Overflowed 1: write(3), write(1)
+ *    In this case we will adjust Read index when read()/peek() is called so that count = depth.
+ *                  |
+ *      -------------------------
+ *      | R | 1 | 2 | 3 | W | 5 |
+ *
+ *  - Double Overflowed i.e index is out of allowed range [0,2*depth)
+ *    This occurs when we continue to write after 1st overflowed to 2nd overflowed. e.g:
+ *      write(3), write(1), write(2)
+ *    This must be prevented since it will cause unrecoverable state, in above example
+ *    if not handled the fifo will be empty instead of continue-to-be full. Since we must not modify
+ *    read index in write() function, which cause race condition. We will re-position write index so that
+ *    after data is written it is a full fifo i.e W = depth - R
+ *
+ *      re-position W = 1 before write(2)
+ *      Note: we should also move data from mem[3] to read index as well, but deliberately skipped here
+ *      since it is an expensive operation !!!
+ *                  |
+ *      -------------------------
+ *      | R | W | 2 | 3 | 4 | 5 |
+ *
+ *      perform write(2), result is still a full fifo.
+ *
+ *                  |
+ *      -------------------------
+ *      | R | 1 | 2 | W | 4 | 5 |
+ */
+typedef struct {
+  uint8_t *buffer;              // buffer pointer
+  uint16_t depth;               // max items
+  bool     overwritable;        // overwritable when full
+  // 1 byte padding  here
+
+  volatile uint16_t wr_idx;     // write index TODO maybe can drop volatile
+  volatile uint16_t rd_idx;     // read index
+
+#if OSAL_MUTEX_REQUIRED
+  osal_mutex_t mutex_wr;
+  osal_mutex_t mutex_rd;
+#endif
+} tu_fifo_t;
+
+typedef struct {
+  struct {
+    uint16_t len; // length
+    uint8_t *ptr; // buffer pointer
+  } linear, wrapped;
+} tu_fifo_buffer_info_t;
+
+// Access mode for hardware fifo read/write
+typedef struct {
+  uint8_t   data_stride;
+  uintptr_t param;
+} tu_hwfifo_access_t;
+
+#define TU_FIFO_INIT(_buffer, _depth, _overwritable) \
+  {                                                  \
+    .buffer       = _buffer,                         \
+    .depth        = _depth,                          \
+    .overwritable = _overwritable,                   \
+  }
+
+#define TU_FIFO_DEF(_name, _depth, _overwritable)                    \
+  uint8_t   _name##_buf[_depth];                                     \
+  tu_fifo_t _name = TU_FIFO_INIT(_name##_buf, _depth, _overwritable)
+
+// Moving data from tusb_fifo <-> USB hardware FIFOs e.g. STM32s need to use a special stride mode which reads/writes
+// data in 2/4 byte chunks from/to a fixed address (USB FIFO register) instead of incrementing the address. For this use
+// read/write access_mode with stride_mode = true. The STRIDE DATA and ADDR stride must be configured with
+// CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE and CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE
+
+//--------------------------------------------------------------------+
+// Setup API
+//--------------------------------------------------------------------+
+bool tu_fifo_config(tu_fifo_t *f, void *buffer, uint16_t depth, bool overwritable);
+void tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable);
+void tu_fifo_clear(tu_fifo_t *f);
+
+#if OSAL_MUTEX_REQUIRED
+TU_ATTR_ALWAYS_INLINE static inline
+void tu_fifo_config_mutex(tu_fifo_t *f, osal_mutex_t wr_mutex, osal_mutex_t rd_mutex) {
+  f->mutex_wr = wr_mutex;
+  f->mutex_rd = rd_mutex;
+}
+#else
+#define tu_fifo_config_mutex(_f, _wr_mutex, _rd_mutex)
+#endif
+
+//--------------------------------------------------------------------+
+// Index API
+//--------------------------------------------------------------------+
+void tu_fifo_correct_read_pointer(tu_fifo_t *f);
+
+// Pointer modifications intended to be used in combinations with DMAs.
+// USE WITH CARE - NO SAFETY CHECKS CONDUCTED HERE! NOT MUTEX PROTECTED!
+void tu_fifo_advance_write_pointer(tu_fifo_t *f, uint16_t n);
+void tu_fifo_advance_read_pointer(tu_fifo_t *f, uint16_t n);
+
+// If you want to read/write from/to the FIFO by use of a DMA, you may need to conduct two copies
+// to handle a possible wrapping part. These functions deliver a pointer to start
+// reading/writing from/to and a valid linear length along which no wrap occurs.
+void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info);
+void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info);
+
+//--------------------------------------------------------------------+
+// Peek API
+// peek() will correct/re-index read pointer in case of an overflowed fifo to form a full fifo
+//--------------------------------------------------------------------+
+uint16_t tu_fifo_peek_n_access_mode(tu_fifo_t *f, void *p_buffer, uint16_t n, uint16_t wr_idx, uint16_t rd_idx,
+                                    const tu_hwfifo_access_t *access_mode);
+bool     tu_fifo_peek(tu_fifo_t *f, void *p_buffer);
+uint16_t tu_fifo_peek_n(tu_fifo_t *f, void *p_buffer, uint16_t n);
+
+//--------------------------------------------------------------------+
+// Read API
+// peek() + advance read index
+//--------------------------------------------------------------------+
+uint16_t tu_fifo_read_n_access_mode(tu_fifo_t *f, void *buffer, uint16_t n, const tu_hwfifo_access_t *access_mode);
+bool     tu_fifo_read(tu_fifo_t *f, void *buffer);
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_read_n(tu_fifo_t *f, void *buffer, uint16_t n) {
+  return tu_fifo_read_n_access_mode(f, buffer, n, NULL);
+}
+
+// discard first n items from fifo i.e advance read pointer by n with mutex
+// return number of discarded items
+uint16_t tu_fifo_discard_n(tu_fifo_t *f, uint16_t n);
+
+//--------------------------------------------------------------------+
+// Write API
+//--------------------------------------------------------------------+
+uint16_t tu_fifo_write_n_access_mode(tu_fifo_t *f, const void *data, uint16_t n, const tu_hwfifo_access_t *access_mode);
+bool     tu_fifo_write(tu_fifo_t *f, const void *data);
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_write_n(tu_fifo_t *f, const void *data, uint16_t n) {
+  return tu_fifo_write_n_access_mode(f, data, n, NULL);
+}
+
+//--------------------------------------------------------------------+
+// Hardware FIFO API
+// Special hardware FIFO/Buffer to hold USB data, usually requires certain access method these can be configured with
+// CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE (data width) and CFG_TUSB_FIFO_HWFIFO_ADDR_STRIDE (address increment)
+// Note: these usually has opposite direction (read/write) to/from our software FIFO  (tu_fifo_t)
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_hwfifo_write_from_fifo(volatile void *hwfifo, tu_fifo_t *f, uint16_t n,
+                                                                       const tu_hwfifo_access_t *access_mode) {
+  const tu_hwfifo_access_t default_access = {.data_stride = CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE, .param = 0};
+  return tu_fifo_read_n_access_mode(f, (void *)(uintptr_t)hwfifo, n,
+                                    (access_mode != NULL) ? access_mode : &default_access);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_hwfifo_read_to_fifo(const volatile void *hwfifo, tu_fifo_t *f,
+                                                                    uint16_t n, const tu_hwfifo_access_t *access_mode) {
+  const tu_hwfifo_access_t default_access = {.data_stride = CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE, .param = 0};
+  return tu_fifo_write_n_access_mode(f, (const void *)(uintptr_t)hwfifo, n,
+                                     (access_mode != NULL) ? access_mode : &default_access);
+}
+
+#if CFG_TUSB_FIFO_HWFIFO_API
+// read from hwfifo to buffer
+void tu_hwfifo_read(const volatile void *hwfifo, uint8_t *dest, uint16_t len, const tu_hwfifo_access_t *access_mode);
+
+// write to hwfifo from buffer with access mode
+void tu_hwfifo_write(volatile void *hwfifo, const uint8_t *src, uint16_t len, const tu_hwfifo_access_t *access_mode);
+
+#endif
+
+//--------------------------------------------------------------------+
+// Internal Helper Local
+// work on local copies of read/write indices in order to only access them once for re-entrancy
+//--------------------------------------------------------------------+
+// return overflowable count (index difference), which can be used to determine both fifo count and an overflow state
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_ff_overflow_count(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) {
+  const int32_t diff = (int32_t)wr_idx - (int32_t)rd_idx;
+  if (diff >= 0) {
+    return (uint16_t)diff;
+  } else {
+    return (uint16_t)(2 * depth + diff);
+  }
+}
+
+// return remaining slot in fifo
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_ff_remaining_local(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) {
+  const uint16_t ovf_count = tu_ff_overflow_count(depth, wr_idx, rd_idx);
+  return (depth > ovf_count) ? (depth - ovf_count) : 0;
+}
+
+//--------------------------------------------------------------------+
+// State API
+// Following functions are reentrant since they only access read/write indices once, therefore can be used in thread and
+// ISRs context without the need of mutexes
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_depth(const tu_fifo_t *f) {
+  return f->depth;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tu_fifo_empty(const tu_fifo_t *f) {
+  const uint16_t wr_idx = f->wr_idx;
+  const uint16_t rd_idx = f->rd_idx;
+  return wr_idx == rd_idx;
+}
+
+// return number of items in fifo, capped to fifo's depth
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_count(const tu_fifo_t *f) {
+  return tu_min16(tu_ff_overflow_count(f->depth, f->wr_idx, f->rd_idx), f->depth);
+}
+
+// check if fifo is full
+TU_ATTR_ALWAYS_INLINE static inline bool tu_fifo_full(const tu_fifo_t *f) {
+  return tu_ff_overflow_count(f->depth, f->wr_idx, f->rd_idx) >= f->depth;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_remaining(const tu_fifo_t *f) {
+  return tu_ff_remaining_local(f->depth, f->wr_idx, f->rd_idx);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,706 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#pragma once
+
+//--------------------------------------------------------------------+
+// Port/Platform Specific
+// TUP stand for TinyUSB Port/Platform (can be renamed)
+//--------------------------------------------------------------------+
+
+//------------- Unaligned Memory Access -------------//
+
+#ifdef __ARM_ARCH
+  // ARM Architecture set __ARM_FEATURE_UNALIGNED to 1 for mcu supports unaligned access
+  #if defined(__ARM_FEATURE_UNALIGNED) && __ARM_FEATURE_UNALIGNED == 1
+    #define TUP_ARCH_STRICT_ALIGN 0
+  #else
+    #define TUP_ARCH_STRICT_ALIGN 1
+  #endif
+#else
+  // TODO default to strict align for others
+  // Should investigate other architecture such as risv, xtensa, mips for optimal setting
+  #define TUP_ARCH_STRICT_ALIGN 1
+#endif
+
+/* USB Controller Attributes for Device, Host or MCU (both)
+ * - ENDPOINT_MAX: max (logical) number of endpoint
+ * - ENDPOINT_EXCLUSIVE_NUMBER: endpoint number with different direction IN and OUT aren't allowed,
+ *                              e.g EP1 OUT & EP1 IN cannot exist together
+ * - RHPORT_HIGHSPEED: support highspeed with on-chip PHY
+ */
+
+//--------------------------------------------------------------------+
+// NXP
+//--------------------------------------------------------------------+
+#if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX)
+  #define TUP_USBIP_IP3511
+  #define TUP_DCD_ENDPOINT_MAX 5
+
+#elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
+  #define TUP_DCD_ENDPOINT_MAX 16
+  #define TUP_USBIP_OHCI
+  #define TUP_USBIP_OHCI_NXP
+  #define TUP_OHCI_RHPORTS 2
+
+#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX)
+  #define TUP_USBIP_IP3511
+  #define TUP_DCD_ENDPOINT_MAX 5
+
+#elif TU_CHECK_MCU(OPT_MCU_LPC54)
+  // TODO USB0 has 5, USB1 has 6
+  #define TUP_USBIP_IP3511
+  #define TUP_DCD_ENDPOINT_MAX 6
+
+#elif TU_CHECK_MCU(OPT_MCU_LPC55)
+  // TODO USB0 has 5, USB1 has 6
+  #define TUP_USBIP_IP3511
+  #define TUP_USBIP_OHCI
+  #define TUP_USBIP_OHCI_NXP
+  #define TUP_OHCI_RHPORTS     1 // 1 downstream port
+
+  #define TUP_DCD_ENDPOINT_MAX 6
+
+#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
+  // USB0 has 6 with HS PHY, USB1 has 4 only FS
+  #define TUP_USBIP_CHIPIDEA_HS
+  #define TUP_USBIP_EHCI
+
+  #define TUP_DCD_ENDPOINT_MAX 6
+  #define TUP_RHPORT_HIGHSPEED 1
+
+#elif TU_CHECK_MCU(OPT_MCU_MCXN9)
+  // USB0 is chipidea FS
+  #define TUP_USBIP_CHIPIDEA_FS
+  #define TUP_USBIP_CHIPIDEA_FS_MCX
+
+  // USB1 is chipidea HS
+  #define TUP_USBIP_CHIPIDEA_HS
+  #define TUP_USBIP_EHCI
+
+  #define TUP_DCD_ENDPOINT_MAX 8
+  #define TUP_RHPORT_HIGHSPEED 1
+
+#elif TU_CHECK_MCU(OPT_MCU_MCXA15)
+  // USB0 is chipidea FS
+  #define TUP_USBIP_CHIPIDEA_FS
+  #define TUP_USBIP_CHIPIDEA_FS_MCX
+
+  #define TUP_DCD_ENDPOINT_MAX 16
+
+#elif TU_CHECK_MCU(OPT_MCU_RW61X)
+  // USB0 is chipidea HS
+  #define TUP_USBIP_CHIPIDEA_HS
+  #define TUP_USBIP_EHCI
+
+  #define TUP_DCD_ENDPOINT_MAX 8
+  #define TUP_RHPORT_HIGHSPEED 1
+
+#elif TU_CHECK_MCU(OPT_MCU_MIMXRT1XXX)
+  #include "fsl_device_registers.h"
+
+  #define TUP_USBIP_CHIPIDEA_HS
+  #define TUP_USBIP_EHCI
+
+  #define TUP_DCD_ENDPOINT_MAX 8
+  #define TUP_RHPORT_HIGHSPEED 1
+
+  #if __CORTEX_M == 7
+    #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT     1
+    #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT     1
+    #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 32
+  #endif
+
+#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L, OPT_MCU_KINETIS_K)
+  #define TUP_USBIP_CHIPIDEA_FS
+  #define TUP_USBIP_CHIPIDEA_FS_KINETIS
+  #define TUP_DCD_ENDPOINT_MAX 16
+
+#elif TU_CHECK_MCU(OPT_MCU_MM32F327X)
+  #define TUP_DCD_ENDPOINT_MAX 16
+  #define TUP_DCD_EDPT_CLOSE_API
+
+//--------------------------------------------------------------------+
+// Nordic
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_NRF5X)
+  // 8 CBI + 1 ISO
+  #define TUP_DCD_ENDPOINT_MAX 9
+  #define TUP_DCD_EDPT_CLOSE_API
+
+#elif TU_CHECK_MCU(OPT_MCU_NRF54)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_NRF
+  #define TUP_DCD_ENDPOINT_MAX            16
+  #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0
+
+//--------------------------------------------------------------------+
+// Microchip
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML2X, OPT_MCU_SAMD21) || TU_CHECK_MCU(OPT_MCU_SAMD51, OPT_MCU_SAME5X)
+  #define TUP_DCD_ENDPOINT_MAX 8
+
+#elif TU_CHECK_MCU(OPT_MCU_SAMG)
+  #define TUP_DCD_ENDPOINT_MAX 6
+  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+
+#elif TU_CHECK_MCU(OPT_MCU_SAMX7X)
+  #define TUP_DCD_ENDPOINT_MAX 10
+  #define TUP_RHPORT_HIGHSPEED 1
+  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+
+#elif TU_CHECK_MCU(OPT_MCU_PIC32MZ)
+  #define TUP_DCD_ENDPOINT_MAX 8
+  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+
+#elif TU_CHECK_MCU(OPT_MCU_PIC32MX, OPT_MCU_PIC32MM, OPT_MCU_PIC32MK) || TU_CHECK_MCU(OPT_MCU_PIC24, OPT_MCU_DSPIC33)
+  #define TUP_DCD_ENDPOINT_MAX 16
+  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+  #define TUP_DCD_EDPT_CLOSE_API
+
+//--------------------------------------------------------------------+
+// ST
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_STM32C0)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define CFG_TUSB_FSDEV_PMA_SIZE 2048u
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32F0)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define CFG_TUSB_FSDEV_PMA_SIZE 1024u
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32F1)
+  // - F102, F103 use fsdev
+  // - F105, F107 use dwc2
+  #if defined(STM32F105x8) || defined(STM32F105xB) || defined(STM32F105xC) || defined(STM32F107xB) || \
+    defined(STM32F107xC)
+    #define TUP_USBIP_DWC2
+    #define TUP_USBIP_DWC2_STM32
+    #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0
+
+    #define TUP_DCD_ENDPOINT_MAX            4
+  #elif defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6) || defined(STM32F103xB) || \
+    defined(STM32F103xE) || defined(STM32F103xG)
+    #define TUP_USBIP_FSDEV
+    #define TUP_USBIP_FSDEV_STM32
+    #define CFG_TUSB_FSDEV_PMA_SIZE 512u
+  #else
+    #error "Unsupported STM32F1 mcu"
+  #endif
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32F2)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_STM32
+
+  // FS has 4 ep, HS has 5 ep
+  #define TUP_DCD_ENDPOINT_MAX 6
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32F3)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+
+  #if defined(STM32F302xB) || defined(STM32F302xC) || defined(STM32F303xB) || defined(STM32F303xC) || \
+    defined(STM32F373xC)
+    #define CFG_TUSB_FSDEV_PMA_SIZE 512u
+  #elif defined(STM32F302x6) || defined(STM32F302x8) || defined(STM32F302xD) || defined(STM32F302xE) || \
+    defined(STM32F303xD) || defined(STM32F303xE)
+    #define CFG_TUSB_FSDEV_PMA_SIZE 1024u
+  #else
+    #error "Unsupported STM32F3 mcu"
+  #endif
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32F4)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_STM32
+
+  // For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9
+  #define TUP_DCD_ENDPOINT_MAX 6
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32F7)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_STM32
+
+  // FS has 6, HS has 9
+  #define TUP_DCD_ENDPOINT_MAX 9
+
+  // MCU with on-chip HS Phy
+  #if defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F733xx)
+    #define TUP_RHPORT_HIGHSPEED 1 // Port0: FS, Port1: HS
+  #endif
+
+  // Enable dcache if DMA is enabled
+  #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUD_DWC2_DMA_ENABLE
+  #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUH_DWC2_DMA_ENABLE
+  #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 32
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32G0)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define CFG_TUSB_FSDEV_PMA_SIZE 2048u
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32G4)
+  // Device controller
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define CFG_TUSB_FSDEV_PMA_SIZE 1024u
+
+  // TypeC controller
+  #define TUP_USBIP_TYPEC_STM32
+  #define TUP_TYPEC_RHPORTS_NUM 1
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32H5)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define CFG_TUSB_FSDEV_PMA_SIZE 2048u
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32H7)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_STM32
+
+  #define TUP_DCD_ENDPOINT_MAX 9
+
+  #ifndef CORE_CM4
+    // Enable dcache if DMA is enabled
+    #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUD_DWC2_DMA_ENABLE
+    #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUH_DWC2_DMA_ENABLE
+    #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 32
+  #endif
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32H7RS, OPT_MCU_STM32N6)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_STM32
+
+  // FS has 6, HS has 9
+  #define TUP_DCD_ENDPOINT_MAX                  9
+
+  // MCU with on-chip HS Phy
+  #define TUP_RHPORT_HIGHSPEED                  1
+
+  // Enable dcache if DMA is enabled
+  #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUD_DWC2_DMA_ENABLE
+  #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUH_DWC2_DMA_ENABLE
+  #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 32
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32L0)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define CFG_TUSB_FSDEV_PMA_SIZE 1024u
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32L1)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define CFG_TUSB_FSDEV_PMA_SIZE 512u
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32L4)
+  // - L4x2, L4x3 use fsdev
+  // - L4x4, L4x6, L4x7, L4x9 use dwc2
+  #if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \
+    defined(STM32L496xx) || defined(STM32L4A6xx) || defined(STM32L4P5xx) || defined(STM32L4Q5xx) ||   \
+    defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) ||   \
+    defined(STM32L4S7xx) || defined(STM32L4S9xx)
+    #define TUP_USBIP_DWC2
+    #define TUP_USBIP_DWC2_STM32
+
+    #define TUP_DCD_ENDPOINT_MAX 6
+  #elif defined(STM32L412xx) || defined(STM32L422xx) || defined(STM32L432xx) || defined(STM32L433xx) || \
+    defined(STM32L442xx) || defined(STM32L443xx) || defined(STM32L452xx) || defined(STM32L462xx)
+    #define TUP_USBIP_FSDEV
+    #define TUP_USBIP_FSDEV_STM32
+    #define CFG_TUSB_FSDEV_PMA_SIZE 1024u
+  #else
+    #error "Unsupported STM32L4 mcu"
+  #endif
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32L5)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define CFG_TUSB_FSDEV_PMA_SIZE (1024u)
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32U0)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define CFG_TUSB_FSDEV_PMA_SIZE 1024u
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32U3)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define CFG_TUSB_FSDEV_PMA_SIZE 2048u
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32U5)
+  // U535/545 use fsdev
+  #if defined(STM32U535xx) || defined(STM32U545xx)
+    #define TUP_USBIP_FSDEV
+    #define TUP_USBIP_FSDEV_STM32
+    #define CFG_TUSB_FSDEV_PMA_SIZE 2048u
+  #else
+    #define TUP_USBIP_DWC2
+    #define TUP_USBIP_DWC2_STM32
+
+    // U59x/5Ax/5Fx/5Gx are highspeed with built-in HS PHY
+    #if defined(STM32U595xx) || defined(STM32U599xx) || defined(STM32U5A5xx) || defined(STM32U5A9xx) || \
+      defined(STM32U5F7xx) || defined(STM32U5F9xx) || defined(STM32U5G7xx) || defined(STM32U5G9xx)
+      #define TUP_DCD_ENDPOINT_MAX 9
+      #define TUP_RHPORT_HIGHSPEED 1
+    #else
+      #define TUP_DCD_ENDPOINT_MAX 6
+    #endif
+  #endif
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32WB)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define CFG_TUSB_FSDEV_PMA_SIZE 1024u
+
+#elif TU_CHECK_MCU(OPT_MCU_STM32WBA)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_STM32
+  #define TUP_DCD_ENDPOINT_MAX 9
+  #define TUP_RHPORT_HIGHSPEED 1
+
+//--------------------------------------------------------------------+
+// Sony
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_CXD56)
+  #define TUP_DCD_ENDPOINT_MAX 7
+  #define TUP_RHPORT_HIGHSPEED 1
+  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+
+//--------------------------------------------------------------------+
+// TI
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx)
+  #define TUP_DCD_ENDPOINT_MAX 8
+
+#elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129)
+  #define TUP_USBIP_MUSB
+  #define TUP_USBIP_MUSB_TI
+  #define TUP_DCD_ENDPOINT_MAX 8
+
+//--------------------------------------------------------------------+
+// ValentyUSB (Litex)
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI)
+  #define TUP_DCD_ENDPOINT_MAX 16
+
+//--------------------------------------------------------------------+
+// Nuvoton
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126)
+  #define TUP_DCD_ENDPOINT_MAX 8
+
+#elif TU_CHECK_MCU(OPT_MCU_NUC120)
+  #define TUP_DCD_ENDPOINT_MAX 6
+
+#elif TU_CHECK_MCU(OPT_MCU_NUC505)
+  #define TUP_DCD_ENDPOINT_MAX 12
+  #define TUP_RHPORT_HIGHSPEED 1
+
+//--------------------------------------------------------------------+
+// Espressif
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_ESP32H4)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_ESP32
+  #define TUP_DCD_ENDPOINT_MAX         7 // only 5 TX FIFO for endpoint IN
+
+  // clang-format off
+  #define CFG_TUSB_OS_INC_PATH_DEFAULT freertos/
+  // clang-format on
+
+  #if CFG_TUSB_MCU == OPT_MCU_ESP32S3
+    #define TUP_MCU_MULTIPLE_CORE 1
+  #endif
+
+#elif TU_CHECK_MCU(OPT_MCU_ESP32P4)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_ESP32
+  #define TUP_RHPORT_HIGHSPEED                  1  // port0 FS, port1 HS
+  #define TUP_DCD_ENDPOINT_MAX                  16 // FS 7 ep, HS 16 ep
+
+  // clang-format off
+  #define CFG_TUSB_OS_INC_PATH_DEFAULT          freertos/
+  // clang-format on
+
+  #define TUP_MCU_MULTIPLE_CORE                 1
+
+  // Enable dcache if DMA is enabled
+  #define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUD_DWC2_DMA_ENABLE
+  #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUH_DWC2_DMA_ENABLE
+  #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 64
+
+#elif TU_CHECK_MCU(OPT_MCU_ESP32, OPT_MCU_ESP32C2, OPT_MCU_ESP32C3, OPT_MCU_ESP32C5, OPT_MCU_ESP32C6, \
+                   OPT_MCU_ESP32C61, OPT_MCU_ESP32H2)
+  #if (CFG_TUD_ENABLED || !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421))
+    #error "MCUs are only supported with CFG_TUH_MAX3421 enabled"
+  #endif
+
+  #define TUP_DCD_ENDPOINT_MAX         0
+
+  // clang-format off
+  #define CFG_TUSB_OS_INC_PATH_DEFAULT freertos/
+  // clang-format on
+
+
+//--------------------------------------------------------------------+
+// Dialog
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_DA1469X)
+  #define TUP_DCD_ENDPOINT_MAX 4
+  #define TUP_DCD_EDPT_CLOSE_API
+
+//--------------------------------------------------------------------+
+// Raspberry Pi
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_RP2040)
+  #define TUP_DCD_ENDPOINT_MAX  16
+  #define TUP_MCU_MULTIPLE_CORE 1
+
+  #define TU_ATTR_FAST_FUNC     __not_in_flash("tinyusb")
+
+//--------------------------------------------------------------------+
+// Silabs
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_EFM32GG)
+  #define TUP_USBIP_DWC2
+  #define TUP_DCD_ENDPOINT_MAX 7
+
+//--------------------------------------------------------------------+
+// Renesas
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N, OPT_MCU_RAXXX)
+  #define TUP_USBIP_RUSB2
+  #define TUP_DCD_ENDPOINT_MAX 10
+
+//--------------------------------------------------------------------+
+// GigaDevice
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_GD32VF103)
+  #define TUP_USBIP_DWC2
+  #define TUP_DCD_ENDPOINT_MAX 4
+
+//--------------------------------------------------------------------+
+// Broadcom
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837)
+  #define TUP_USBIP_DWC2
+  #define TUP_DCD_ENDPOINT_MAX 8
+  #define TUP_RHPORT_HIGHSPEED 1
+
+//--------------------------------------------------------------------+
+// Infineon
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_XMC4000)
+  #define TUP_USBIP_DWC2
+  #define TUP_DCD_ENDPOINT_MAX 8
+
+//--------------------------------------------------------------------+
+// BridgeTek
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_FT90X)
+  #define TUP_DCD_ENDPOINT_MAX 8
+  #define TUP_RHPORT_HIGHSPEED 1
+  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+
+#elif TU_CHECK_MCU(OPT_MCU_FT93X)
+  #define TUP_DCD_ENDPOINT_MAX 16
+  #define TUP_RHPORT_HIGHSPEED 1
+  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+
+//--------------------------------------------------------------------+
+// Allwinner
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_F1C100S)
+  #define TUP_DCD_ENDPOINT_MAX 4
+  #define TUP_DCD_EDPT_CLOSE_API
+
+//--------------------------------------------------------------------+
+// WCH
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_CH32F20X)
+  #define TUP_USBIP_WCH_USBHS
+  #define TUP_USBIP_WCH_USBFS
+
+  #if !defined(CFG_TUD_WCH_USBIP_USBFS)
+    #define CFG_TUD_WCH_USBIP_USBFS 0
+  #endif
+
+  #if !defined(CFG_TUD_WCH_USBIP_USBHS)
+    #define CFG_TUD_WCH_USBIP_USBHS (CFG_TUD_WCH_USBIP_USBFS ? 0 : 1)
+  #endif
+
+  #define TUP_RHPORT_HIGHSPEED CFG_TUD_WCH_USBIP_USBHS
+  #define TUP_DCD_ENDPOINT_MAX (CFG_TUD_WCH_USBIP_USBHS ? 16 : 8)
+
+  #if CFG_TUD_WCH_USBIP_USBHS
+    #define TUP_DCD_EDPT_CLOSE_API
+  #endif
+
+#elif TU_CHECK_MCU(OPT_MCU_CH32V103)
+  #define TUP_USBIP_WCH_USBFS
+
+  #if !defined(CFG_TUD_WCH_USBIP_USBFS)
+    #define CFG_TUD_WCH_USBIP_USBFS 1
+  #endif
+
+  #define TUP_DCD_ENDPOINT_MAX 8
+
+#elif TU_CHECK_MCU(OPT_MCU_CH32V20X)
+  // v20x support both port0 FSDEV (USBD) and port1 USBFS
+  #define TUP_USBIP_WCH_USBFS
+
+  #ifndef CFG_TUH_WCH_USBIP_USBFS
+    #define CFG_TUH_WCH_USBIP_USBFS 1
+  #endif
+
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_CH32
+  #define CFG_TUSB_FSDEV_PMA_SIZE 512u
+
+  // default to FSDEV for device
+  #if !defined(CFG_TUD_WCH_USBIP_USBFS)
+    #define CFG_TUD_WCH_USBIP_USBFS 0
+  #endif
+
+  #if !defined(CFG_TUD_WCH_USBIP_FSDEV)
+    #define CFG_TUD_WCH_USBIP_FSDEV (CFG_TUD_WCH_USBIP_USBFS ? 0 : 1)
+  #endif
+
+  #define TUP_DCD_ENDPOINT_MAX 8
+
+#elif TU_CHECK_MCU(OPT_MCU_CH32V307)
+  // v307 support both FS and HS, default to HS
+  #define TUP_USBIP_WCH_USBHS
+  #define TUP_USBIP_WCH_USBFS
+
+  #if !defined(CFG_TUD_WCH_USBIP_USBFS)
+    #define CFG_TUD_WCH_USBIP_USBFS 0
+  #endif
+
+  #if !defined(CFG_TUD_WCH_USBIP_USBHS)
+    #define CFG_TUD_WCH_USBIP_USBHS (CFG_TUD_WCH_USBIP_USBFS ? 0 : 1)
+  #endif
+
+  #define TUP_RHPORT_HIGHSPEED CFG_TUD_WCH_USBIP_USBHS
+  #define TUP_DCD_ENDPOINT_MAX (CFG_TUD_WCH_USBIP_USBHS ? 16 : 8)
+
+  #if CFG_TUD_WCH_USBIP_USBHS
+    #define TUP_DCD_EDPT_CLOSE_API
+  #endif
+
+//--------------------------------------------------------------------+
+// Analog Devices
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_MAX32650, OPT_MCU_MAX32666, OPT_MCU_MAX32690, OPT_MCU_MAX78002)
+  #define TUP_USBIP_MUSB
+  #define TUP_USBIP_MUSB_ADI
+  #define TUP_DCD_ENDPOINT_MAX 12
+  #define TUP_RHPORT_HIGHSPEED 1
+  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+
+//--------------------------------------------------------------------+
+// ArteryTek
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_AT32F403A_407, OPT_MCU_AT32F413)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_AT32
+  #define CFG_TUSB_FSDEV_PMA_SIZE 512u
+
+#elif TU_CHECK_MCU(OPT_MCU_AT32F415)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_AT32
+  #define TUP_DCD_ENDPOINT_MAX 4
+
+#elif TU_CHECK_MCU(OPT_MCU_AT32F402_405, OPT_MCU_AT32F423, OPT_MCU_AT32F425, OPT_MCU_AT32F435_437, OPT_MCU_AT32F45X)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_AT32
+  #define TUP_DCD_ENDPOINT_MAX 8
+
+  // AT32F405xx has on-chip HS PHY
+  #if defined(AT32F405CBT7) || defined(AT32F405CBU7) || defined(AT32F405CCT7) || defined(AT32F405CCU7) ||     \
+    defined(AT32F405KBU7_4) || defined(AT32F405KCU7_4) || defined(AT32F405RBT7_7) || defined(AT32F405RBT7) || \
+    defined(AT32F405RCT7_7) || defined(AT32F405RCT7)
+    #define TUP_RHPORT_HIGHSPEED 1 // Port0: FS, Port1: HS
+  #endif
+
+//--------------------------------------------------------------------+
+// HPMicro
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_HPM)
+  #define TUP_USBIP_CHIPIDEA_HS
+  #define TUP_USBIP_EHCI
+
+  #define TUP_DCD_ENDPOINT_MAX    16
+  #define TUP_RHPORT_HIGHSPEED    1
+
+  #define TU_ATTR_FAST_FUNC __attribute__((section(".fast")))
+
+#endif
+
+// External USB controller
+#if defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
+  #ifndef CFG_TUH_MAX3421_ENDPOINT_TOTAL
+    #define CFG_TUH_MAX3421_ENDPOINT_TOTAL (8 + 4 * (CFG_TUH_DEVICE_MAX - 1))
+  #endif
+#endif
+
+
+//--------------------------------------------------------------------+
+// Default Values
+//--------------------------------------------------------------------+
+
+#if defined(TUP_USBIP_FSDEV)
+  #define TUP_DCD_ENDPOINT_MAX 8
+#endif
+
+#ifndef TUP_MCU_MULTIPLE_CORE
+  #define TUP_MCU_MULTIPLE_CORE 0
+#endif
+
+#if !defined(TUP_DCD_ENDPOINT_MAX) && defined(CFG_TUD_ENABLED) && CFG_TUD_ENABLED
+  #warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8"
+  #define TUP_DCD_ENDPOINT_MAX 8
+#endif
+
+// Default to fullspeed if not defined
+#ifndef TUP_RHPORT_HIGHSPEED
+  #define TUP_RHPORT_HIGHSPEED 0
+#endif
+
+// fast function, normally mean placing function in SRAM
+#ifndef TU_ATTR_FAST_FUNC
+  #define TU_ATTR_FAST_FUNC
+#endif
+
+#if defined(TUP_USBIP_IP3511) || defined(TUP_USBIP_RUSB2)
+  #define TUP_DCD_EDPT_CLOSE_API
+#endif
+
+// USBIP implement dcd_edpt_close() and does not support ISO alloc & activate API
+#ifndef TUP_DCD_EDPT_CLOSE_API
+  #define TUP_DCD_EDPT_ISO_ALLOC
+#endif
@@ -0,0 +1,197 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2022, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_PRIVATE_H_
+#define TUSB_PRIVATE_H_
+
+// Internal Helper used by Host and Device Stack
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Configuration
+//--------------------------------------------------------------------+
+
+#define TUP_USBIP_CONTROLLER_NUM 2
+extern tusb_role_t _tusb_rhport_role[TUP_USBIP_CONTROLLER_NUM];
+
+//--------------------------------------------------------------------+
+// Endpoint
+//--------------------------------------------------------------------+
+
+enum {
+ TU_EDPT_STATE_BUSY    = 0x01,
+ TU_EDPT_STATE_STALLED = 0x02,
+ TU_EDPT_STATE_CLAIMED = 0x04,
+};
+
+typedef struct TU_ATTR_PACKED {
+  volatile uint8_t busy    : 1;
+  volatile uint8_t stalled : 1;
+  volatile uint8_t claimed : 1;
+} tu_edpt_state_t;
+
+typedef struct {
+  uint8_t  hwid;    // device: rhport, host: daddr
+  bool     is_host; // 1: host, 0: device
+  uint8_t ep_addr;
+  uint16_t mps;
+
+  uint16_t ep_bufsize;
+  uint8_t  *ep_buf; // set to NULL to use xfer_fifo when CFG_TUD_EDPT_DEDICATED_HWFIFO = 1
+  tu_fifo_t ff;
+
+  // mutex: read if rx, otherwise write
+  OSAL_MUTEX_DEF(ff_mutexdef);
+}tu_edpt_stream_t;
+
+//--------------------------------------------------------------------+
+// Endpoint
+//--------------------------------------------------------------------+
+
+// Check if endpoint descriptor is valid per USB specs if debug is enabled
+#if CFG_TUSB_DEBUG
+bool tu_edpt_validate(const tusb_desc_endpoint_t *desc_ep, tusb_speed_t speed);
+#else
+TU_ATTR_ALWAYS_INLINE static inline bool tu_edpt_validate(const tusb_desc_endpoint_t *desc_ep, tusb_speed_t speed) {
+  (void)desc_ep;
+  (void)speed;
+  return true;
+}
+#endif
+
+// Bind drivers to all interfaces and endpoints in the provided configuration descriptor
+bool tu_bind_driver_to_ep_itf(uint8_t driver_id, uint8_t ep2drv[][2], uint8_t itf2drv[], uint8_t itf_max,
+                              const uint8_t *p_desc, uint16_t desc_len);
+
+// Claim an endpoint with provided mutex
+bool tu_edpt_claim(tu_edpt_state_t* ep_state, osal_mutex_t mutex);
+
+// Release an endpoint with provided mutex
+bool tu_edpt_release(tu_edpt_state_t* ep_state, osal_mutex_t mutex);
+
+//--------------------------------------------------------------------+
+// Endpoint Stream
+//--------------------------------------------------------------------+
+
+// Init an endpoint stream
+bool tu_edpt_stream_init(tu_edpt_stream_t *s, bool is_host, bool is_tx, bool overwritable, void *ff_buf,
+                         uint16_t ff_bufsize, uint8_t *ep_buf, uint16_t ep_bufsize);
+
+// Deinit an endpoint stream
+TU_ATTR_ALWAYS_INLINE static inline void tu_edpt_stream_deinit(tu_edpt_stream_t *s) {
+  (void)s;
+#if OSAL_MUTEX_REQUIRED
+  if (s->ff.mutex_wr) {
+    osal_mutex_delete(s->ff.mutex_wr);
+  }
+  if (s->ff.mutex_rd) {
+    osal_mutex_delete(s->ff.mutex_rd);
+  }
+#endif
+}
+
+// Open an endpoint stream
+TU_ATTR_ALWAYS_INLINE static inline void tu_edpt_stream_open(tu_edpt_stream_t *s, uint8_t hwid,
+                                                             const tusb_desc_endpoint_t *desc_ep) {
+  s->hwid    = hwid;
+  s->ep_addr = desc_ep->bEndpointAddress;
+  s->mps = tu_edpt_packet_size(desc_ep);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tu_edpt_stream_is_opened(const tu_edpt_stream_t *s) {
+  return s->ep_addr != 0;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tu_edpt_stream_close(tu_edpt_stream_t* s) {
+  s->ep_addr = 0;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tu_edpt_stream_clear(tu_edpt_stream_t *s) {
+  tu_fifo_clear(&s->ff);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tu_edpt_stream_empty(tu_edpt_stream_t *s) {
+  return tu_fifo_empty(&s->ff);
+}
+
+//--------------------------------------------------------------------+
+// Stream Write
+//--------------------------------------------------------------------+
+
+// Write to stream
+uint32_t tu_edpt_stream_write(tu_edpt_stream_t *s, const void *buffer, uint32_t bufsize);
+
+// Start an usb transfer if endpoint is not busy. Return number of queued bytes
+uint32_t tu_edpt_stream_write_xfer(tu_edpt_stream_t *s);
+
+// Start an zero-length packet if needed
+bool tu_edpt_stream_write_zlp_if_needed(tu_edpt_stream_t *s, uint32_t last_xferred_bytes);
+
+// Get the number of bytes available for writing to FIFO
+// Note: if no fifo, return endpoint size if not busy, 0 otherwise
+uint32_t tu_edpt_stream_write_available(tu_edpt_stream_t *s);
+
+//--------------------------------------------------------------------+
+// Stream Read
+//--------------------------------------------------------------------+
+
+// Read from stream
+uint32_t tu_edpt_stream_read(tu_edpt_stream_t *s, void *buffer, uint32_t bufsize);
+
+// Start an usb transfer if endpoint is not busy
+uint32_t tu_edpt_stream_read_xfer(tu_edpt_stream_t *s);
+
+// Complete read transfer by writing EP -> FIFO. Must be called in the transfer complete callback
+TU_ATTR_ALWAYS_INLINE static inline
+void tu_edpt_stream_read_xfer_complete(tu_edpt_stream_t* s, uint32_t xferred_bytes) {
+  if (s->ep_buf != NULL) {
+    tu_fifo_write_n(&s->ff, s->ep_buf, (uint16_t)xferred_bytes);
+  }
+}
+
+// Complete read transfer with provided buffer
+TU_ATTR_ALWAYS_INLINE static inline
+void tu_edpt_stream_read_xfer_complete_with_buf(tu_edpt_stream_t *s, const void *buf, uint32_t xferred_bytes) {
+  tu_fifo_write_n(&s->ff, buf, (uint16_t)xferred_bytes);
+}
+
+// Get the number of bytes available for reading
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_edpt_stream_read_available(const tu_edpt_stream_t *s) {
+  return (uint32_t) tu_fifo_count(&s->ff);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tu_edpt_stream_peek(tu_edpt_stream_t *s, uint8_t *ch) {
+  return tu_fifo_peek(&s->ff, ch);
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
@@ -0,0 +1,575 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_TYPES_H_
+#define TUSB_TYPES_H_
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "tusb_compiler.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//------------- Device DCache declaration -------------//
+#define TUD_EPBUF_DCACHE_SIZE(_size) (CFG_TUD_MEM_DCACHE_ENABLE ? \
+  (TU_DIV_CEIL(_size, CFG_TUD_MEM_DCACHE_LINE_SIZE) * CFG_TUD_MEM_DCACHE_LINE_SIZE) : (_size))
+
+// Declare an endpoint buffer with uint8_t[size]
+#define TUD_EPBUF_DEF(_name, _size) \
+  union { \
+    CFG_TUD_MEM_ALIGN uint8_t _name[_size]; \
+    TU_ATTR_ALIGNED(CFG_TUD_MEM_DCACHE_ENABLE ? CFG_TUD_MEM_DCACHE_LINE_SIZE : 1) uint8_t _name##_dcache_padding[TUD_EPBUF_DCACHE_SIZE(_size)]; \
+  }
+
+// Declare an endpoint buffer with a type
+#define TUD_EPBUF_TYPE_DEF(_type, _name) \
+  union { \
+    CFG_TUD_MEM_ALIGN _type _name; \
+    TU_ATTR_ALIGNED(CFG_TUD_MEM_DCACHE_ENABLE ? CFG_TUD_MEM_DCACHE_LINE_SIZE : 1) uint8_t _name##_dcache_padding[TUD_EPBUF_DCACHE_SIZE(sizeof(_type))]; \
+  }
+
+//------------- Host DCache declaration -------------//
+#define TUH_EPBUF_DCACHE_SIZE(_size) (CFG_TUH_MEM_DCACHE_ENABLE ? \
+  (TU_DIV_CEIL(_size, CFG_TUH_MEM_DCACHE_LINE_SIZE) * CFG_TUH_MEM_DCACHE_LINE_SIZE) : (_size))
+
+// Declare an endpoint buffer with uint8_t[size]
+#define TUH_EPBUF_DEF(_name, _size) \
+  union { \
+    CFG_TUH_MEM_ALIGN uint8_t _name[_size]; \
+    TU_ATTR_ALIGNED(CFG_TUH_MEM_DCACHE_ENABLE ? CFG_TUH_MEM_DCACHE_LINE_SIZE : 1) uint8_t _name##_dcache_padding[TUH_EPBUF_DCACHE_SIZE(_size)]; \
+  }
+
+// Declare an endpoint buffer with a type
+#define TUH_EPBUF_TYPE_DEF(_type, _name) \
+  union { \
+    CFG_TUH_MEM_ALIGN _type _name; \
+    TU_ATTR_ALIGNED(CFG_TUH_MEM_DCACHE_ENABLE ? CFG_TUH_MEM_DCACHE_LINE_SIZE : 1) uint8_t _name##_dcache_padding[TUH_EPBUF_DCACHE_SIZE(sizeof(_type))]; \
+  }
+
+
+/*------------------------------------------------------------------*/
+/* CONSTANTS
+ *------------------------------------------------------------------*/
+
+typedef enum {
+  TUSB_ROLE_INVALID = 0u,
+  TUSB_ROLE_DEVICE  = 0x1,
+  TUSB_ROLE_HOST    = 0x2,
+} tusb_role_t;
+
+/// defined base on EHCI specs value for Endpoint Speed
+typedef enum {
+  TUSB_SPEED_FULL = 0,
+  TUSB_SPEED_LOW  = 1,
+  TUSB_SPEED_HIGH = 2,
+  TUSB_SPEED_AUTO = 0xaa,
+  TUSB_SPEED_INVALID = 0xff,
+} tusb_speed_t;
+
+/// defined base on USB Specs Endpoint's bmAttributes
+typedef enum {
+  TUSB_XFER_CONTROL     = 0,
+  TUSB_XFER_ISOCHRONOUS = 1,
+  TUSB_XFER_BULK        = 2,
+  TUSB_XFER_INTERRUPT   = 3
+} tusb_xfer_type_t;
+
+typedef enum {
+  TUSB_DIR_OUT = 0,
+  TUSB_DIR_IN  = 1,
+
+  TUSB_EPNUM_MASK = 0x0F,
+  TUSB_DIR_IN_MASK = 0x80
+} tusb_dir_t;
+
+enum {
+  TUSB_EPSIZE_BULK_FS = 64,
+  TUSB_EPSIZE_BULK_HS = 512,
+
+  TUSB_EPSIZE_ISO_FS_MAX = 1023,
+  TUSB_EPSIZE_ISO_HS_MAX = 1024,
+};
+
+/// Isochronous Endpoint Attributes
+typedef enum {
+  TUSB_ISO_EP_ATT_NO_SYNC         = 0x00,
+  TUSB_ISO_EP_ATT_ASYNCHRONOUS    = 0x04,
+  TUSB_ISO_EP_ATT_ADAPTIVE        = 0x08,
+  TUSB_ISO_EP_ATT_SYNCHRONOUS     = 0x0C,
+  TUSB_ISO_EP_ATT_DATA            = 0x00, ///< Data End Point
+  TUSB_ISO_EP_ATT_EXPLICIT_FB     = 0x10, ///< Feedback End Point
+  TUSB_ISO_EP_ATT_IMPLICIT_FB     = 0x20, ///< Data endpoint that also serves as an implicit feedback
+} tusb_iso_ep_attribute_t;
+
+/// USB Descriptor Types
+typedef enum {
+  TUSB_DESC_DEVICE                = 0x01,
+  TUSB_DESC_CONFIGURATION         = 0x02,
+  TUSB_DESC_STRING                = 0x03,
+  TUSB_DESC_INTERFACE             = 0x04,
+  TUSB_DESC_ENDPOINT              = 0x05,
+  TUSB_DESC_DEVICE_QUALIFIER      = 0x06,
+  TUSB_DESC_OTHER_SPEED_CONFIG    = 0x07,
+  TUSB_DESC_INTERFACE_POWER       = 0x08,
+  TUSB_DESC_OTG                   = 0x09,
+  TUSB_DESC_DEBUG                 = 0x0A,
+  TUSB_DESC_INTERFACE_ASSOCIATION = 0x0B,
+
+  TUSB_DESC_BOS                   = 0x0F,
+  TUSB_DESC_DEVICE_CAPABILITY     = 0x10,
+
+  TUSB_DESC_FUNCTIONAL            = 0x21,
+
+  // Class Specific Descriptor
+  TUSB_DESC_CS_DEVICE             = 0x21,
+  TUSB_DESC_CS_CONFIGURATION      = 0x22,
+  TUSB_DESC_CS_STRING             = 0x23,
+  TUSB_DESC_CS_INTERFACE          = 0x24,
+  TUSB_DESC_CS_ENDPOINT           = 0x25,
+
+  TUSB_DESC_SUPERSPEED_ENDPOINT_COMPANION     = 0x30,
+  TUSB_DESC_SUPERSPEED_ISO_ENDPOINT_COMPANION = 0x31
+} tusb_desc_type_t;
+
+typedef enum {
+  TUSB_REQ_GET_STATUS        = 0  ,
+  TUSB_REQ_CLEAR_FEATURE     = 1  ,
+  TUSB_REQ_RESERVED          = 2  ,
+  TUSB_REQ_SET_FEATURE       = 3  ,
+  TUSB_REQ_RESERVED2         = 4  ,
+  TUSB_REQ_SET_ADDRESS       = 5  ,
+  TUSB_REQ_GET_DESCRIPTOR    = 6  ,
+  TUSB_REQ_SET_DESCRIPTOR    = 7  ,
+  TUSB_REQ_GET_CONFIGURATION = 8  ,
+  TUSB_REQ_SET_CONFIGURATION = 9  ,
+  TUSB_REQ_GET_INTERFACE     = 10 ,
+  TUSB_REQ_SET_INTERFACE     = 11 ,
+  TUSB_REQ_SYNCH_FRAME       = 12
+} tusb_request_code_t;
+
+typedef enum {
+  TUSB_REQ_FEATURE_EDPT_HALT     = 0,
+  TUSB_REQ_FEATURE_REMOTE_WAKEUP = 1,
+  TUSB_REQ_FEATURE_TEST_MODE     = 2
+} tusb_request_feature_selector_t;
+
+typedef enum {
+  TUSB_REQ_TYPE_STANDARD = 0u,
+  TUSB_REQ_TYPE_CLASS,
+  TUSB_REQ_TYPE_VENDOR,
+  TUSB_REQ_TYPE_INVALID
+} tusb_request_type_t;
+
+typedef enum {
+  TUSB_REQ_RCPT_DEVICE =0,
+  TUSB_REQ_RCPT_INTERFACE,
+  TUSB_REQ_RCPT_ENDPOINT,
+  TUSB_REQ_RCPT_OTHER
+} tusb_request_recipient_t;
+
+// https://www.usb.org/defined-class-codes
+typedef enum {
+  TUSB_CLASS_UNSPECIFIED          = 0    ,
+  TUSB_CLASS_AUDIO                = 1    ,
+  TUSB_CLASS_CDC                  = 2    ,
+  TUSB_CLASS_HID                  = 3    ,
+  TUSB_CLASS_RESERVED_4           = 4    ,
+  TUSB_CLASS_PHYSICAL             = 5    ,
+  TUSB_CLASS_IMAGE                = 6    ,
+  TUSB_CLASS_PRINTER              = 7    ,
+  TUSB_CLASS_MSC                  = 8    ,
+  TUSB_CLASS_HUB                  = 9    ,
+  TUSB_CLASS_CDC_DATA             = 10   ,
+  TUSB_CLASS_SMART_CARD           = 11   ,
+  TUSB_CLASS_RESERVED_12          = 12   ,
+  TUSB_CLASS_CONTENT_SECURITY     = 13   ,
+  TUSB_CLASS_VIDEO                = 14   ,
+  TUSB_CLASS_PERSONAL_HEALTHCARE  = 15   ,
+  TUSB_CLASS_AUDIO_VIDEO          = 16   ,
+
+  TUSB_CLASS_DIAGNOSTIC           = 0xDC ,
+  TUSB_CLASS_WIRELESS_CONTROLLER  = 0xE0 ,
+  TUSB_CLASS_MISC                 = 0xEF ,
+  TUSB_CLASS_APPLICATION_SPECIFIC = 0xFE ,
+  TUSB_CLASS_VENDOR_SPECIFIC      = 0xFF
+} tusb_class_code_t;
+
+typedef enum
+{
+  MISC_SUBCLASS_COMMON = 2
+}misc_subclass_type_t;
+
+typedef enum {
+  MISC_PROTOCOL_IAD = 1
+} misc_protocol_type_t;
+
+typedef enum {
+  APP_SUBCLASS_USBTMC = 0x03,
+  APP_SUBCLASS_DFU_RUNTIME = 0x01
+} app_subclass_type_t;
+
+typedef enum {
+  DEVICE_CAPABILITY_WIRELESS_USB               = 0x01,
+  DEVICE_CAPABILITY_USB20_EXTENSION            = 0x02,
+  DEVICE_CAPABILITY_SUPERSPEED_USB             = 0x03,
+  DEVICE_CAPABILITY_CONTAINER_id               = 0x04,
+  DEVICE_CAPABILITY_PLATFORM                   = 0x05,
+  DEVICE_CAPABILITY_POWER_DELIVERY             = 0x06,
+  DEVICE_CAPABILITY_BATTERY_INFO               = 0x07,
+  DEVICE_CAPABILITY_PD_CONSUMER_PORT           = 0x08,
+  DEVICE_CAPABILITY_PD_PROVIDER_PORT           = 0x09,
+  DEVICE_CAPABILITY_SUPERSPEED_PLUS            = 0x0A,
+  DEVICE_CAPABILITY_PRECESION_TIME_MEASUREMENT = 0x0B,
+  DEVICE_CAPABILITY_WIRELESS_USB_EXT           = 0x0C,
+  DEVICE_CAPABILITY_BILLBOARD                  = 0x0D,
+  DEVICE_CAPABILITY_AUTHENTICATION             = 0x0E,
+  DEVICE_CAPABILITY_BILLBOARD_EX               = 0x0F,
+  DEVICE_CAPABILITY_CONFIGURATION_SUMMARY      = 0x10
+} device_capability_type_t;
+
+enum {
+  TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP = 1 << 5,
+  TUSB_DESC_CONFIG_ATT_SELF_POWERED  = 1 << 6,
+};
+
+#define TUSB_DESC_CONFIG_POWER_MA(x)  ((x)/2)
+
+// USB 2.0 Spec Table 9-7: Test Mode Selectors
+typedef enum {
+  TUSB_FEATURE_TEST_J = 1,
+  TUSB_FEATURE_TEST_K = 2,
+  TUSB_FEATURE_TEST_SE0_NAK = 3,
+  TUSB_FEATURE_TEST_PACKET = 4,
+  TUSB_FEATURE_TEST_FORCE_ENABLE = 5,
+} tusb_feature_test_mode_t;
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+typedef enum {
+  XFER_RESULT_SUCCESS = 0,
+  XFER_RESULT_FAILED,
+  XFER_RESULT_STALLED,
+  XFER_RESULT_TIMEOUT,
+  XFER_RESULT_INVALID
+} xfer_result_t;
+
+#define tusb_xfer_result_t xfer_result_t
+
+// TODO remove
+enum {
+  DESC_OFFSET_LEN  = 0,
+  DESC_OFFSET_TYPE = 1,
+  DESC_OFFSET_SUBTYPE = 2
+};
+
+enum {
+  INTERFACE_INVALID_NUMBER = 0xff
+};
+
+typedef enum {
+  MS_OS_20_SET_HEADER_DESCRIPTOR       = 0x00,
+  MS_OS_20_SUBSET_HEADER_CONFIGURATION = 0x01,
+  MS_OS_20_SUBSET_HEADER_FUNCTION      = 0x02,
+  MS_OS_20_FEATURE_COMPATBLE_ID        = 0x03,
+  MS_OS_20_FEATURE_REG_PROPERTY        = 0x04,
+  MS_OS_20_FEATURE_MIN_RESUME_TIME     = 0x05,
+  MS_OS_20_FEATURE_MODEL_ID            = 0x06,
+  MS_OS_20_FEATURE_CCGP_DEVICE         = 0x07,
+  MS_OS_20_FEATURE_VENDOR_REVISION     = 0x08
+} microsoft_os_20_type_t;
+
+enum {
+  CONTROL_STAGE_IDLE = 0,
+  CONTROL_STAGE_SETUP, // 1
+  CONTROL_STAGE_DATA,  // 2
+  CONTROL_STAGE_ACK    // 3
+};
+
+enum {
+  TUSB_INDEX_INVALID_8 = 0xFF
+};
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+typedef struct {
+  tusb_role_t role;
+  tusb_speed_t speed;
+} tusb_rhport_init_t;
+
+typedef struct {
+  uint16_t len;
+  uint8_t *buffer;
+} tusb_buffer_t;
+
+//--------------------------------------------------------------------+
+// USB Descriptors
+//--------------------------------------------------------------------+
+
+// Start of all packed definitions for compiler without per-type packed
+TU_ATTR_PACKED_BEGIN
+TU_ATTR_BIT_FIELD_ORDER_BEGIN
+
+/// USB Device Descriptor
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength            ; ///< Size of this descriptor in bytes.
+  uint8_t  bDescriptorType    ; ///< DEVICE Descriptor Type.
+  uint16_t bcdUSB             ; ///< BUSB Specification Release Number in Binary-Coded Decimal (i.e., 2.10 is 210H).
+
+  uint8_t  bDeviceClass       ; ///< Class code (assigned by the USB-IF).
+  uint8_t  bDeviceSubClass    ; ///< Subclass code (assigned by the USB-IF).
+  uint8_t  bDeviceProtocol    ; ///< Protocol code (assigned by the USB-IF).
+  uint8_t  bMaxPacketSize0    ; ///< Maximum packet size for endpoint zero (only 8, 16, 32, or 64 are valid). For HS devices is fixed to 64.
+
+  uint16_t idVendor           ; ///< Vendor ID (assigned by the USB-IF).
+  uint16_t idProduct          ; ///< Product ID (assigned by the manufacturer).
+  uint16_t bcdDevice          ; ///< Device release number in binary-coded decimal.
+  uint8_t  iManufacturer      ; ///< Index of string descriptor describing manufacturer.
+  uint8_t  iProduct           ; ///< Index of string descriptor describing product.
+  uint8_t  iSerialNumber      ; ///< Index of string descriptor describing the device's serial number.
+  uint8_t  bNumConfigurations ; ///< Number of possible configurations.
+} tusb_desc_device_t;
+
+TU_VERIFY_STATIC( sizeof(tusb_desc_device_t) == 18u, "size is not correct");
+
+// USB Binary Device Object Store (BOS) Descriptor
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength         ; ///< Size of this descriptor in bytes
+  uint8_t  bDescriptorType ; ///< CONFIGURATION Descriptor Type
+  uint16_t wTotalLength    ; ///< Total length of data returned for this descriptor
+  uint8_t  bNumDeviceCaps  ; ///< Number of device capability descriptors in the BOS
+} tusb_desc_bos_t;
+
+TU_VERIFY_STATIC( sizeof(tusb_desc_bos_t) == 5u, "size is not correct");
+
+/// USB Configuration Descriptor
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength             ; ///< Size of this descriptor in bytes
+  uint8_t  bDescriptorType     ; ///< CONFIGURATION Descriptor Type
+  uint16_t wTotalLength        ; ///< Total length of data returned for this configuration. Includes the combined length of all descriptors (configuration, interface, endpoint, and class- or vendor-specific) returned for this configuration.
+
+  uint8_t  bNumInterfaces      ; ///< Number of interfaces supported by this configuration
+  uint8_t  bConfigurationValue ; ///< Value to use as an argument to the SetConfiguration() request to select this configuration.
+  uint8_t  iConfiguration      ; ///< Index of string descriptor describing this configuration
+  uint8_t  bmAttributes        ; ///< Configuration characteristics \n D7: Reserved (set to one)\n D6: Self-powered \n D5: Remote Wakeup \n D4...0: Reserved (reset to zero) \n D7 is reserved and must be set to one for historical reasons. \n A device configuration that uses power from the bus and a local source reports a non-zero value in bMaxPower to indicate the amount of bus power required and sets D6. The actual power source at runtime may be determined using the GetStatus(DEVICE) request (see USB 2.0 spec Section 9.4.5). \n If a device configuration supports remote wakeup, D5 is set to one.
+  uint8_t  bMaxPower           ; ///< Maximum power consumption of the USB device from the bus in this specific configuration when the device is fully operational. Expressed in 2 mA units (i.e., 50 = 100 mA).
+} tusb_desc_configuration_t;
+
+TU_VERIFY_STATIC( sizeof(tusb_desc_configuration_t) == 9u, "size is not correct");
+
+/// USB Interface Descriptor
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength            ; ///< Size of this descriptor in bytes
+  uint8_t  bDescriptorType    ; ///< INTERFACE Descriptor Type
+
+  uint8_t  bInterfaceNumber   ; ///< Number of this interface. Zero-based value identifying the index in the array of concurrent interfaces supported by this configuration.
+  uint8_t  bAlternateSetting  ; ///< Value used to select this alternate setting for the interface identified in the prior field
+  uint8_t  bNumEndpoints      ; ///< Number of endpoints used by this interface (excluding endpoint zero). If this value is zero, this interface only uses the Default Control Pipe.
+  uint8_t  bInterfaceClass    ; ///< Class code (assigned by the USB-IF). \li A value of zero is reserved for future standardization. \li If this field is set to FFH, the interface class is vendor-specific. \li All other values are reserved for assignment by the USB-IF.
+  uint8_t  bInterfaceSubClass ; ///< Subclass code (assigned by the USB-IF). \n These codes are qualified by the value of the bInterfaceClass field. \li If the bInterfaceClass field is reset to zero, this field must also be reset to zero. \li If the bInterfaceClass field is not set to FFH, all values are reserved for assignment by the USB-IF.
+  uint8_t  bInterfaceProtocol ; ///< Protocol code (assigned by the USB). \n These codes are qualified by the value of the bInterfaceClass and the bInterfaceSubClass fields. If an interface supports class-specific requests, this code identifies the protocols that the device uses as defined by the specification of the device class. \li If this field is reset to zero, the device does not use a class-specific protocol on this interface. \li If this field is set to FFH, the device uses a vendor-specific protocol for this interface.
+  uint8_t  iInterface         ; ///< Index of string descriptor describing this interface
+} tusb_desc_interface_t;
+
+TU_VERIFY_STATIC( sizeof(tusb_desc_interface_t) == 9u, "size is not correct");
+
+/// USB Endpoint Descriptor
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength          ; // Size of this descriptor in bytes
+  uint8_t  bDescriptorType  ; // ENDPOINT Descriptor Type
+
+  uint8_t  bEndpointAddress ; // The address of the endpoint
+
+  struct TU_ATTR_PACKED {
+    uint8_t xfer  : 2;        // Control, ISO, Bulk, Interrupt
+    uint8_t sync  : 2;        // None, Asynchronous, Adaptive, Synchronous
+    uint8_t usage : 2;        // Data, Feedback, Implicit feedback
+    uint8_t       : 2;
+  } bmAttributes;
+
+  uint16_t wMaxPacketSize   ; // Bit 10..0 : max packet size, bit 12..11 additional transaction per highspeed micro-frame
+  uint8_t  bInterval        ; // Polling interval, in frames or microframes depending on the operating speed
+} tusb_desc_endpoint_t;
+
+TU_VERIFY_STATIC( sizeof(tusb_desc_endpoint_t) == 7u, "size is not correct");
+
+/// USB Other Speed Configuration Descriptor
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength             ; ///< Size of descriptor
+  uint8_t  bDescriptorType     ; ///< Other_speed_Configuration Type
+  uint16_t wTotalLength        ; ///< Total length of data returned
+
+  uint8_t  bNumInterfaces      ; ///< Number of interfaces supported by this speed configuration
+  uint8_t  bConfigurationValue ; ///< Value to use to select configuration
+  uint8_t  iConfiguration      ; ///< Index of string descriptor
+  uint8_t  bmAttributes        ; ///< Same as Configuration descriptor
+  uint8_t  bMaxPower           ; ///< Same as Configuration descriptor
+} tusb_desc_other_speed_t;
+
+/// USB Device Qualifier Descriptor
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength            ; ///< Size of descriptor
+  uint8_t  bDescriptorType    ; ///< Device Qualifier Type
+  uint16_t bcdUSB             ; ///< USB specification version number (e.g., 0200H for V2.00)
+
+  uint8_t  bDeviceClass       ; ///< Class Code
+  uint8_t  bDeviceSubClass    ; ///< SubClass Code
+  uint8_t  bDeviceProtocol    ; ///< Protocol Code
+
+  uint8_t  bMaxPacketSize0    ; ///< Maximum packet size for other speed
+  uint8_t  bNumConfigurations ; ///< Number of Other-speed Configurations
+  uint8_t  bReserved          ; ///< Reserved for future use, must be zero
+} tusb_desc_device_qualifier_t;
+
+TU_VERIFY_STATIC( sizeof(tusb_desc_device_qualifier_t) == 10u, "size is not correct");
+
+/// USB Interface Association Descriptor (IAD ECN)
+typedef struct TU_ATTR_PACKED {
+  uint8_t bLength           ; ///< Size of descriptor
+  uint8_t bDescriptorType   ; ///< Other_speed_Configuration Type
+
+  uint8_t bFirstInterface   ; ///< Index of the first associated interface.
+  uint8_t bInterfaceCount   ; ///< Total number of associated interfaces.
+
+  uint8_t bFunctionClass    ; ///< Interface class ID.
+  uint8_t bFunctionSubClass ; ///< Interface subclass ID.
+  uint8_t bFunctionProtocol ; ///< Interface protocol ID.
+
+  uint8_t iFunction         ; ///< Index of the string descriptor describing the interface association.
+} tusb_desc_interface_assoc_t;
+
+TU_VERIFY_STATIC( sizeof(tusb_desc_interface_assoc_t) == 8u, "size is not correct");
+
+// USB String Descriptor
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength         ; ///< Size of this descriptor in bytes
+  uint8_t  bDescriptorType ; ///< Descriptor Type
+  uint16_t utf16le[];
+} tusb_desc_string_t;
+
+// USB Binary Device Object Store (BOS)
+typedef struct TU_ATTR_PACKED {
+  uint8_t bLength;
+  uint8_t bDescriptorType ;
+  uint8_t bDevCapabilityType;
+  uint8_t bReserved;
+  uint8_t PlatformCapabilityUUID[16];
+  uint8_t CapabilityData[];
+} tusb_desc_bos_platform_t;
+
+// USB WebUSB URL Descriptor
+typedef struct TU_ATTR_PACKED {
+  uint8_t bLength;
+  uint8_t bDescriptorType;
+  uint8_t bScheme;
+  char    url[];
+} tusb_desc_webusb_url_t;
+
+// DFU Functional Descriptor
+typedef struct TU_ATTR_PACKED {
+  uint8_t  bLength;
+  uint8_t  bDescriptorType;
+
+  union {
+    struct TU_ATTR_PACKED {
+      uint8_t bitCanDnload             : 1;
+      uint8_t bitCanUpload             : 1;
+      uint8_t bitManifestationTolerant : 1;
+      uint8_t bitWillDetach            : 1;
+      uint8_t reserved                 : 4;
+    } bmAttributes;
+
+    uint8_t bAttributes;
+  };
+
+  uint16_t wDetachTimeOut;
+  uint16_t wTransferSize;
+  uint16_t bcdDFUVersion;
+} tusb_desc_dfu_functional_t;
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+typedef struct TU_ATTR_PACKED {
+  union {
+    struct TU_ATTR_PACKED {
+      uint8_t recipient :  5; ///< Recipient type tusb_request_recipient_t.
+      uint8_t type      :  2; ///< Request type tusb_request_type_t.
+      uint8_t direction :  1; ///< Direction type. tusb_dir_t
+    } bmRequestType_bit;
+
+    uint8_t bmRequestType;
+  };
+
+  uint8_t  bRequest;
+  uint16_t wValue;
+  uint16_t wIndex;
+  uint16_t wLength;
+} tusb_control_request_t;
+
+TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8u, "size is not correct");
+
+TU_ATTR_PACKED_END  // End of all packed definitions
+TU_ATTR_BIT_FIELD_ORDER_END
+
+//--------------------------------------------------------------------+
+// Endpoint helper
+//--------------------------------------------------------------------+
+
+// Get direction from Endpoint address
+TU_ATTR_ALWAYS_INLINE static inline tusb_dir_t tu_edpt_dir(uint8_t addr) {
+  return (addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT;
+}
+
+// Get Endpoint number from address
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_number(uint8_t addr) {
+  return (uint8_t) (addr & TUSB_EPNUM_MASK);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir) {
+  return (uint8_t) (num | (dir == (uint8_t)TUSB_DIR_IN ? (uint8_t)TUSB_DIR_IN_MASK : 0u));
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const* desc_ep) {
+  return tu_le16toh(desc_ep->wMaxPacketSize) & 0x7FF;
+}
+
+#if CFG_TUSB_DEBUG
+TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_type_str(tusb_xfer_type_t t) {
+  tu_static const char *str[] = {"control", "isochronous", "bulk", "interrupt"};
+  return str[t];
+}
+#endif
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif // TUSB_TYPES_H_
@@ -0,0 +1,138 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+#ifndef TUSB_VERIFY_H_
+#define TUSB_VERIFY_H_
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "tusb_option.h"
+#include "tusb_compiler.h"
+
+/*------------------------------------------------------------------*/
+/* This file use an advanced macro technique to mimic the default parameter
+ * as C++ for the sake of code simplicity. Beware of a headache macro
+ * manipulation that you are told to stay away.
+ *
+ * This contains macros for both VERIFY and ASSERT:
+ *
+ *   VERIFY: Used when there is an error condition which is not the
+ *           fault of the MCU. For example, bounds checking on data
+ *           sent to the micro over USB should use this function.
+ *           Another example is checking for buffer overflows, where
+ *           returning from the active function causes a NAK.
+ *
+ *   ASSERT: Used for error conditions that are caused by MCU firmware
+ *           bugs. This is used to discover bugs in the code more
+ *           quickly. One example would be adding assertions in library
+ *           function calls to confirm a function's (untainted)
+ *           parameters are valid.
+ *
+ * The difference in behavior is that ASSERT triggers a breakpoint while
+ * verify does not.
+ *
+ *   #define TU_VERIFY(cond)                  if (!cond) return false;
+ *   #define TU_VERIFY(cond,ret)              if (!cond) return ret;
+ *
+ *   #define TU_ASSERT(cond)                  if (!cond) {TU_MESS_FAILED(); TU_BREAKPOINT(), return false;}
+ *   #define TU_ASSERT(cond,ret)              if (!cond) {TU_MESS_FAILED(); TU_BREAKPOINT(), return ret;}
+ *------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// TU_VERIFY Helper
+//--------------------------------------------------------------------+
+#if CFG_TUSB_DEBUG
+  #define TU_MESS_FAILED()    TU_LOG1("%s %d: ASSERT FAILED\r\n", __func__, __LINE__)
+#else
+  #define TU_MESS_FAILED() do {} while (0)
+#endif
+
+// Custom defined application function
+#ifdef CFG_TUSB_DEBUG_BREAKPOINT
+  extern void CFG_TUSB_DEBUG_BREAKPOINT(void);
+  #define TU_BREAKPOINT() CFG_TUSB_DEBUG_BREAKPOINT()
+
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7, M33. M55
+#elif defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__) || \
+    defined(__ARM7M__) || defined (__ARM7EM__) || defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
+  #define TU_BREAKPOINT() do {                                                                              \
+    volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+    if (0u != ((*ARM_CM_DHCSR) & 1UL)) { __asm("BKPT #0\n"); } /* Only halt mcu if debugger is attached */   \
+  } while(0)
+
+#elif defined(__riscv) && !TUSB_MCU_VENDOR_ESPRESSIF
+  #define TU_BREAKPOINT() do { __asm("ebreak\n"); } while(0)
+
+#elif defined(_mips)
+  #define TU_BREAKPOINT() do { __asm("sdbbp 0"); } while (0)
+
+#else
+  #define TU_BREAKPOINT() do {} while (0)
+#endif
+
+/*------------------------------------------------------------------*/
+/* TU_VERIFY
+ * - TU_VERIFY_1ARGS : return false if failed
+ * - TU_VERIFY_2ARGS : return provided value if failed
+ *------------------------------------------------------------------*/
+#define TU_VERIFY_DEFINE(_cond, _ret) \
+  do {                                \
+    if (!(_cond)) {                   \
+      return _ret;                    \
+    }                                 \
+  } while (0)
+
+#define TU_VERIFY_1ARGS(_cond)         TU_VERIFY_DEFINE(_cond, false)
+#define TU_VERIFY_2ARGS(_cond, _ret)   TU_VERIFY_DEFINE(_cond, _ret)
+
+#define TU_VERIFY(...)                 TU_GET_3RD_ARG(__VA_ARGS__, TU_VERIFY_2ARGS, TU_VERIFY_1ARGS, _dummy)(__VA_ARGS__)
+
+/*------------------------------------------------------------------*/
+/* ASSERT
+ * basically TU_VERIFY with TU_BREAKPOINT() as handler
+ * - 1 arg : return false if failed
+ * - 2 arg : return error if failed
+ *------------------------------------------------------------------*/
+#define TU_ASSERT_DEFINE(_cond, _ret)                                 \
+  do {                                                                \
+    if ( !(_cond) ) { TU_MESS_FAILED(); TU_BREAKPOINT(); return _ret; } \
+  } while(0)
+
+#define TU_ASSERT_1ARGS(_cond)         TU_ASSERT_DEFINE(_cond, false)
+#define TU_ASSERT_2ARGS(_cond, _ret)   TU_ASSERT_DEFINE(_cond, _ret)
+
+#ifndef TU_ASSERT
+#define TU_ASSERT(...)                 TU_GET_3RD_ARG(__VA_ARGS__, TU_ASSERT_2ARGS, TU_ASSERT_1ARGS, _dummy)(__VA_ARGS__)
+#endif
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
@@ -0,0 +1,248 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_DCD_H_
+#define TUSB_DCD_H_
+
+#include "common/tusb_common.h"
+#include "osal/osal.h"
+#include "common/tusb_fifo.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF PROTYPES
+//--------------------------------------------------------------------+
+
+typedef enum {
+  DCD_EVENT_INVALID = 0,    // 0
+  DCD_EVENT_BUS_RESET,      // 1
+  DCD_EVENT_UNPLUGGED,      // 2
+  DCD_EVENT_SOF,            // 3
+  DCD_EVENT_SUSPEND,        // 4 TODO LPM Sleep L1 support
+  DCD_EVENT_RESUME,         // 5
+  DCD_EVENT_SETUP_RECEIVED, // 6
+  DCD_EVENT_XFER_COMPLETE,  // 7
+  USBD_EVENT_FUNC_CALL,     // 8 Not an DCD event, just a convenient way to defer ISR function
+  DCD_EVENT_COUNT
+} dcd_eventid_t;
+
+typedef struct TU_ATTR_ALIGNED(4) {
+  uint8_t rhport;
+  uint8_t event_id;
+
+  union {
+    // BUS RESET
+    struct {
+      tusb_speed_t speed;
+    } bus_reset;
+
+    // SOF
+    struct {
+      uint32_t frame_count;
+    }sof;
+
+    // SETUP_RECEIVED
+    tusb_control_request_t setup_received;
+
+    // XFER_COMPLETE
+    struct {
+      uint8_t  ep_addr;
+      uint8_t  result;
+      uint32_t len;
+    }xfer_complete;
+
+    // FUNC_CALL
+    struct {
+      void (*func) (void* param);
+      void* param;
+    }func_call;
+  };
+} dcd_event_t;
+
+//TU_VERIFY_STATIC(sizeof(dcd_event_t) <= 12, "size is not correct");
+
+//--------------------------------------------------------------------+
+// Memory API
+//--------------------------------------------------------------------+
+
+// clean/flush data cache: write cache -> memory.
+// Required before an DMA TX transfer to make sure data is in memory
+bool dcd_dcache_clean(const void* addr, uint32_t data_size);
+
+// invalidate data cache: mark cache as invalid, next read will read from memory
+// Required BOTH before and after an DMA RX transfer
+bool dcd_dcache_invalidate(const void* addr, uint32_t data_size);
+
+// clean and invalidate data cache
+// Required before an DMA transfer where memory is both read/write by DMA
+bool dcd_dcache_clean_invalidate(const void* addr, uint32_t data_size);
+
+//--------------------------------------------------------------------+
+// Controller API
+//--------------------------------------------------------------------+
+
+// optional dcd configuration, called by tud_configure()
+bool dcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param);
+
+// Initialize controller to device mode
+bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init);
+
+// Deinitialize controller, unset device mode.
+bool dcd_deinit(uint8_t rhport);
+
+// Interrupt Handler
+void dcd_int_handler(uint8_t rhport);
+
+// Enable device interrupt
+void dcd_int_enable (uint8_t rhport);
+
+// Disable device interrupt
+void dcd_int_disable(uint8_t rhport);
+
+// Receive Set Address request, mcu port must also include status IN response
+void dcd_set_address(uint8_t rhport, uint8_t dev_addr);
+
+// Wake up host
+void dcd_remote_wakeup(uint8_t rhport);
+
+// Connect by enabling internal pull-up resistor on D+/D-
+void dcd_connect(uint8_t rhport);
+
+// Disconnect by disabling internal pull-up resistor on D+/D-
+void dcd_disconnect(uint8_t rhport);
+
+// Enable/Disable Start-of-frame interrupt. Default is disabled
+void dcd_sof_enable(uint8_t rhport, bool en);
+
+#if CFG_TUD_TEST_MODE
+// Put device into a test mode (needs power cycle to quit)
+void dcd_enter_test_mode(uint8_t rhport, tusb_feature_test_mode_t test_selector);
+#endif
+//--------------------------------------------------------------------+
+// Endpoint API
+//--------------------------------------------------------------------+
+
+// Invoked when a control transfer's status stage is complete.
+// May help DCD to prepare for next control transfer, this API is optional.
+void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * request);
+
+// Configure endpoint's registers according to descriptor
+bool dcd_edpt_open            (uint8_t rhport, tusb_desc_endpoint_t const * desc_ep);
+
+// Close all non-control endpoints, cancel all pending transfers if any.
+// Invoked when switching from a non-zero Configuration by SET_CONFIGURE therefore
+// required for multiple configuration support.
+void dcd_edpt_close_all       (uint8_t rhport);
+
+// Submit a transfer, When complete dcd_event_xfer_complete() is invoked to notify the stack
+bool dcd_edpt_xfer            (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes, bool is_isr);
+
+// Submit an transfer using fifo, When complete dcd_event_xfer_complete() is invoked to notify the stack
+// This API is optional, may be useful for register-based for transferring data.
+bool dcd_edpt_xfer_fifo       (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes, bool is_isr);
+
+// Stall endpoint, any queuing transfer should be removed from endpoint
+void dcd_edpt_stall           (uint8_t rhport, uint8_t ep_addr);
+
+// clear stall, data toggle is also reset to DATA0
+// This API never calls with control endpoints, since it is auto cleared when receiving setup packet
+void dcd_edpt_clear_stall     (uint8_t rhport, uint8_t ep_addr);
+
+#ifdef TUP_DCD_EDPT_CLOSE_API
+// Close an endpoint.
+void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr);
+
+#else
+
+// Allocate packet buffer used by ISO endpoints
+// Some MCU need manual packet buffer allocation, we allocate the largest size to avoid clustering
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size);
+
+// Configure and enable an ISO endpoint according to descriptor
+bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep);
+
+#endif
+
+//--------------------------------------------------------------------+
+// Event API (implemented by stack)
+//--------------------------------------------------------------------+
+
+// Called by DCD to notify device stack
+extern void dcd_event_handler(dcd_event_t const * event, bool in_isr);
+
+// helper to send bus signal event
+TU_ATTR_ALWAYS_INLINE static inline void dcd_event_bus_signal (uint8_t rhport, dcd_eventid_t eid, bool in_isr) {
+  dcd_event_t event;
+  event.rhport = rhport;
+  event.event_id = eid;
+  dcd_event_handler(&event, in_isr);
+}
+
+// helper to send bus reset event
+TU_ATTR_ALWAYS_INLINE static inline  void dcd_event_bus_reset (uint8_t rhport, tusb_speed_t speed, bool in_isr) {
+  dcd_event_t event;
+  event.rhport = rhport;
+  event.event_id = DCD_EVENT_BUS_RESET;
+  event.bus_reset.speed = speed;
+  dcd_event_handler(&event, in_isr);
+}
+
+// helper to send setup received
+TU_ATTR_ALWAYS_INLINE static inline void dcd_event_setup_received(uint8_t rhport, uint8_t const * setup, bool in_isr) {
+  dcd_event_t event;
+  event.rhport = rhport;
+  event.event_id = DCD_EVENT_SETUP_RECEIVED;
+  (void) memcpy(&event.setup_received, setup, sizeof(tusb_control_request_t));
+  dcd_event_handler(&event, in_isr);
+}
+
+// helper to send transfer complete event
+TU_ATTR_ALWAYS_INLINE static inline void dcd_event_xfer_complete (uint8_t rhport, uint8_t ep_addr, uint32_t xferred_bytes, uint8_t result, bool in_isr) {
+  dcd_event_t event;
+  event.rhport = rhport;
+  event.event_id = DCD_EVENT_XFER_COMPLETE;
+  event.xfer_complete.ep_addr = ep_addr;
+  event.xfer_complete.len     = xferred_bytes;
+  event.xfer_complete.result  = result;
+  dcd_event_handler(&event, in_isr);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void dcd_event_sof(uint8_t rhport, uint32_t frame_count, bool in_isr) {
+  dcd_event_t event;
+  event.rhport = rhport;
+  event.event_id = DCD_EVENT_SOF;
+  event.sof.frame_count = frame_count;
+  dcd_event_handler(&event, in_isr);
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
@@ -0,0 +1,139 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+#ifndef TUSB_USBD_PVT_H_
+#define TUSB_USBD_PVT_H_
+
+#include "osal/osal.h"
+#include "common/tusb_fifo.h"
+#include "common/tusb_private.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define TU_LOG_USBD(...)   TU_LOG(CFG_TUD_LOG_LEVEL, __VA_ARGS__)
+
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF PROTYPES
+//--------------------------------------------------------------------+
+
+typedef enum {
+  SOF_CONSUMER_USER = 0,
+  SOF_CONSUMER_AUDIO,
+} sof_consumer_t;
+
+//--------------------------------------------------------------------+
+// Class Driver API
+//--------------------------------------------------------------------+
+
+typedef struct {
+  char const* name;
+  void     (* init             ) (void);
+  bool     (* deinit           ) (void);
+  void     (* reset            ) (uint8_t rhport);
+  uint16_t (* open             ) (uint8_t rhport, tusb_desc_interface_t const * desc_intf, uint16_t max_len);
+  bool     (* control_xfer_cb  ) (uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+  bool     (* xfer_cb          ) (uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
+  bool     (* xfer_isr         ) (uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes); // optional, return false to defer to xfer_cb()
+  void     (* sof              ) (uint8_t rhport, uint32_t frame_count); // optional
+} usbd_class_driver_t;
+
+// Invoked when initializing device stack to get additional class drivers.
+// Can be implemented by application to extend/overwrite class driver support.
+// Note: The drivers array must be accessible at all time when stack is active
+usbd_class_driver_t const* usbd_app_driver_get_cb(uint8_t* driver_count);
+
+typedef bool (*usbd_control_xfer_cb_t)(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+
+void usbd_int_set(bool enabled);
+void usbd_spin_lock(bool in_isr);
+void usbd_spin_unlock(bool in_isr);
+
+//--------------------------------------------------------------------+
+// USBD Endpoint API
+// Note: rhport should be 0 since device stack only support 1 rhport for now
+//--------------------------------------------------------------------+
+
+// Open an endpoint
+bool usbd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep);
+
+// Close an endpoint
+void usbd_edpt_close(uint8_t rhport, uint8_t ep_addr);
+
+// Submit a usb transfer
+bool usbd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes, bool is_isr);
+
+// Submit a usb ISO transfer by use of a FIFO (ring buffer) - all bytes in FIFO get transmitted
+bool usbd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes, bool is_isr);
+
+// Claim an endpoint before submitting a transfer.
+// If caller does not make any transfer, it must release endpoint for others.
+bool usbd_edpt_claim(uint8_t rhport, uint8_t ep_addr);
+
+// Release claimed endpoint without submitting a transfer
+bool usbd_edpt_release(uint8_t rhport, uint8_t ep_addr);
+
+// Check if endpoint is busy transferring
+bool usbd_edpt_busy(uint8_t rhport, uint8_t ep_addr);
+
+// Stall endpoint
+void usbd_edpt_stall(uint8_t rhport, uint8_t ep_addr);
+
+// Clear stalled endpoint
+void usbd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr);
+
+// Check if endpoint is stalled
+bool usbd_edpt_stalled(uint8_t rhport, uint8_t ep_addr);
+
+// Allocate packet buffer used by ISO endpoints
+bool usbd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size);
+
+// Configure and enable an ISO endpoint according to descriptor
+bool usbd_edpt_iso_activate(uint8_t rhport,  tusb_desc_endpoint_t const * p_endpoint_desc);
+
+// Check if endpoint is ready (not busy and not stalled)
+TU_ATTR_ALWAYS_INLINE static inline
+bool usbd_edpt_ready(uint8_t rhport, uint8_t ep_addr) {
+  const bool is_busy = usbd_edpt_busy(rhport, ep_addr);
+  const bool is_stalled = usbd_edpt_stalled(rhport, ep_addr);
+  return !is_busy && !is_stalled;
+}
+
+// Enable SOF interrupt
+void usbd_sof_enable(uint8_t rhport, sof_consumer_t consumer, bool en);
+
+bool usbd_open_edpt_pair(uint8_t rhport, uint8_t const* p_desc, uint8_t ep_count, uint8_t xfer_type, uint8_t* ep_out, uint8_t* ep_in);
+void usbd_defer_func(osal_task_func_t func, void *param, bool in_isr);
+
+#if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
+void usbd_driver_print_control_complete_name(usbd_control_xfer_cb_t callback);
+#endif
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
@@ -0,0 +1,228 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_HCD_H_
+#define TUSB_HCD_H_
+
+#include "common/tusb_common.h"
+#include "osal/osal.h"
+#include "common/tusb_fifo.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Configuration
+//--------------------------------------------------------------------+
+
+// Max number of endpoints pair per device
+// TODO optimize memory usage
+#ifndef CFG_TUH_ENDPOINT_MAX
+  #define CFG_TUH_ENDPOINT_MAX   16
+//  #ifdef TUP_HCD_ENDPOINT_MAX
+//    #define CFG_TUH_ENDPPOINT_MAX   TUP_HCD_ENDPOINT_MAX
+//  #else
+//    #define
+//  #endif
+#endif
+
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF
+//--------------------------------------------------------------------+
+typedef enum {
+  HCD_EVENT_DEVICE_ATTACH,
+  HCD_EVENT_DEVICE_REMOVE,
+  HCD_EVENT_XFER_COMPLETE,
+
+  USBH_EVENT_FUNC_CALL, // Not an HCD event
+  HCD_EVENT_COUNT
+} hcd_eventid_t;
+
+typedef struct {
+  uint8_t rhport;
+  uint8_t event_id;
+  uint8_t dev_addr;
+
+  union {
+    // Attach, Remove
+    struct {
+      uint8_t hub_addr;
+      uint8_t hub_port;
+      uint8_t speed;
+    } connection;
+
+    // XFER_COMPLETE
+    struct {
+      uint8_t ep_addr;
+      uint8_t result;
+      uint32_t len;
+    } xfer_complete;
+
+    // FUNC_CALL
+    struct {
+      void (*func) (void* param);
+      void* param;
+    }func_call;
+  };
+} hcd_event_t;
+
+//--------------------------------------------------------------------+
+// Memory API
+//--------------------------------------------------------------------+
+
+// clean/flush data cache: write cache -> memory.
+// Required before an DMA TX transfer to make sure data is in memory
+bool hcd_dcache_clean(void const* addr, uint32_t data_size);
+
+// invalidate data cache: mark cache as invalid, next read will read from memory
+// Required BOTH before and after an DMA RX transfer
+bool hcd_dcache_invalidate(void const* addr, uint32_t data_size);
+
+// clean and invalidate data cache
+// Required before an DMA transfer where memory is both read/write by DMA
+bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size);
+
+//--------------------------------------------------------------------+
+// Controller API
+//--------------------------------------------------------------------+
+
+// optional hcd configuration, called by tuh_configure()
+bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param);
+
+// Initialize controller to host mode
+bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init);
+
+// De-initialize controller
+bool hcd_deinit(uint8_t rhport);
+
+// Interrupt Handler
+void hcd_int_handler(uint8_t rhport, bool in_isr);
+
+// Enable USB interrupt
+void hcd_int_enable (uint8_t rhport);
+
+// Disable USB interrupt
+void hcd_int_disable(uint8_t rhport);
+
+// Get frame number (1ms)
+uint32_t hcd_frame_number(uint8_t rhport);
+
+//--------------------------------------------------------------------+
+// Port API
+//--------------------------------------------------------------------+
+
+// Get the current connect status of roothub port
+bool hcd_port_connect_status(uint8_t rhport);
+
+// Reset USB bus on the port. Return immediately, bus reset sequence may not be complete.
+// Some port would require hcd_port_reset_end() to be invoked after 10ms to complete the reset sequence.
+void hcd_port_reset(uint8_t rhport);
+
+// Complete bus reset sequence, may be required by some controllers
+void hcd_port_reset_end(uint8_t rhport);
+
+// Get port link speed
+tusb_speed_t hcd_port_speed_get(uint8_t rhport);
+
+// HCD closes all opened endpoints belong to this device
+void hcd_device_close(uint8_t rhport, uint8_t dev_addr);
+
+//--------------------------------------------------------------------+
+// Endpoints API
+//--------------------------------------------------------------------+
+
+// Open an endpoint
+// return true if successfully opened or endpoint is currently opened
+bool hcd_edpt_open(uint8_t rhport, uint8_t daddr, tusb_desc_endpoint_t const * ep_desc);
+
+// Close an endpoint
+bool hcd_edpt_close(uint8_t rhport, uint8_t daddr, uint8_t ep_addr);
+
+// Submit a transfer, when complete hcd_event_xfer_complete() must be invoked
+bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen);
+
+// Abort a queued transfer. Note: it can only abort transfer that has not been started
+// Return true if a queued transfer is aborted, false if there is no transfer to abort
+bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr);
+
+// Submit a special transfer to send 8-byte Setup Packet, when complete hcd_event_xfer_complete() must be invoked
+bool hcd_setup_send(uint8_t rhport, uint8_t daddr, uint8_t const setup_packet[8]);
+
+// clear stall, data toggle is also reset to DATA0
+bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr);
+
+//--------------------------------------------------------------------+
+// USBH implemented API
+//--------------------------------------------------------------------+
+
+// Called by HCD to notify stack
+extern void hcd_event_handler(hcd_event_t const* event, bool in_isr);
+
+// Helper to send device attach event
+TU_ATTR_ALWAYS_INLINE static inline
+void hcd_event_device_attach(uint8_t rhport, bool in_isr) {
+  hcd_event_t event;
+  event.rhport              = rhport;
+  event.event_id            = HCD_EVENT_DEVICE_ATTACH;
+  event.connection.hub_addr = 0;
+  event.connection.hub_port = 0;
+
+  hcd_event_handler(&event, in_isr);
+}
+
+// Helper to send device removal event
+TU_ATTR_ALWAYS_INLINE static inline
+void hcd_event_device_remove(uint8_t rhport, bool in_isr) {
+  hcd_event_t event;
+  event.rhport              = rhport;
+  event.event_id            = HCD_EVENT_DEVICE_REMOVE;
+  event.connection.hub_addr = 0;
+  event.connection.hub_port = 0;
+
+  hcd_event_handler(&event, in_isr);
+}
+
+// Helper to send USB transfer event
+TU_ATTR_ALWAYS_INLINE static inline
+void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, uint32_t xferred_bytes, xfer_result_t result, bool in_isr) {
+  hcd_event_t event = {
+    .rhport   = 0, // TODO correct rhport
+    .event_id = HCD_EVENT_XFER_COMPLETE,
+    .dev_addr = dev_addr,
+  };
+  event.xfer_complete.ep_addr = ep_addr;
+  event.xfer_complete.result = result;
+  event.xfer_complete.len = xferred_bytes;
+
+  hcd_event_handler(&event, in_isr);
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
@@ -0,0 +1,220 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_HUB_H_
+#define TUSB_HUB_H_
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Configuration
+//--------------------------------------------------------------------+
+
+#ifndef CFG_TUH_HUB_BUFSIZE
+  #define CFG_TUH_HUB_BUFSIZE 12
+#endif
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+enum {
+  HUB_REQUEST_GET_STATUS      = 0  ,
+  HUB_REQUEST_CLEAR_FEATURE   = 1  ,
+  // 2 is reserved
+  HUB_REQUEST_SET_FEATURE     = 3  ,
+  // 4-5 are reserved
+  HUB_REQUEST_GET_DESCRIPTOR  = 6  ,
+  HUB_REQUEST_SET_DESCRIPTOR  = 7  ,
+  HUB_REQUEST_CLEAR_TT_BUFFER = 8  ,
+  HUB_REQUEST_RESET_TT        = 9  ,
+  HUB_REQUEST_GET_TT_STATE    = 10 ,
+  HUB_REQUEST_STOP_TT         = 11
+};
+
+enum {
+  HUB_FEATURE_HUB_LOCAL_POWER_CHANGE = 0,
+  HUB_FEATURE_HUB_OVER_CURRENT_CHANGE
+};
+
+enum{
+  HUB_FEATURE_PORT_CONNECTION          = 0,
+  HUB_FEATURE_PORT_ENABLE              = 1,
+  HUB_FEATURE_PORT_SUSPEND             = 2,
+  HUB_FEATURE_PORT_OVER_CURRENT        = 3,
+  HUB_FEATURE_PORT_RESET               = 4,
+  // 5-7 are reserved
+  HUB_FEATURE_PORT_POWER               = 8,
+  HUB_FEATURE_PORT_LOW_SPEED           = 9,
+  // 10-15 are reserved
+  HUB_FEATURE_PORT_CONNECTION_CHANGE   = 16,
+  HUB_FEATURE_PORT_ENABLE_CHANGE       = 17,
+  HUB_FEATURE_PORT_SUSPEND_CHANGE      = 18,
+  HUB_FEATURE_PORT_OVER_CURRENT_CHANGE = 19,
+  HUB_FEATURE_PORT_RESET_CHANGE        = 20,
+  HUB_FEATURE_PORT_TEST                = 21,
+  HUB_FEATURE_PORT_INDICATOR           = 22
+};
+
+enum {
+  HUB_CHARS_POWER_GANGED_SWITCHING = 0,
+  HUB_CHARS_POWER_INDIVIDUAL_SWITCHING = 1,
+};
+
+enum {
+  HUB_CHARS_OVER_CURRENT_GLOBAL = 0,
+  HUB_CHARS_OVER_CURRENT_INDIVIDUAL = 1,
+};
+
+typedef struct TU_ATTR_PACKED{
+  uint8_t  bLength           ; ///< Size of descriptor
+  uint8_t  bDescriptorType   ; ///< Other_speed_Configuration Type
+  uint8_t  bNbrPorts;
+  uint16_t wHubCharacteristics;
+  uint8_t  bPwrOn2PwrGood;
+  uint8_t  bHubContrCurrent;
+  uint8_t  DeviceRemovable; // bitmap each bit for a port (from bit1)
+  uint8_t  PortPwrCtrlMask; // just for compatibility, should be 0xff
+} hub_desc_cs_t;
+TU_VERIFY_STATIC(sizeof(hub_desc_cs_t) == 9, "size is not correct");
+TU_VERIFY_STATIC(CFG_TUH_HUB_BUFSIZE >= sizeof(hub_desc_cs_t), "buffer is not big enough");
+
+typedef struct TU_ATTR_PACKED {
+  struct TU_ATTR_PACKED {
+    uint8_t logical_power_switching_mode : 2; // [0..1] gannged or individual power switching
+    uint8_t compound_device              : 1; // [2] hub is part of compound device
+    uint8_t over_current_protect_mode    : 2; // [3..4] global or individual port over-current protection
+    uint8_t tt_think_time                : 2; // [5..6] TT think time
+    uint8_t port_indicator_supported     : 1; // [7] port indicator supported
+  };
+  uint8_t rsv1;
+} hub_characteristics_t;
+TU_VERIFY_STATIC(sizeof(hub_characteristics_t) == 2, "size is not correct");
+
+// data in response of HUB_REQUEST_GET_STATUS, wIndex = 0 (hub)
+typedef struct {
+  union{
+    struct TU_ATTR_PACKED {
+      uint16_t local_power_source : 1;
+      uint16_t over_current       : 1;
+      uint16_t : 14;
+    };
+
+    uint16_t value;
+  } status, change;
+} hub_status_response_t;
+TU_VERIFY_STATIC( sizeof(hub_status_response_t) == 4, "size is not correct");
+
+// data in response of HUB_REQUEST_GET_STATUS, wIndex = Port num
+typedef struct {
+  union TU_ATTR_PACKED {
+    struct TU_ATTR_PACKED {
+      // Bit 0-4 are for change & status
+      uint16_t connection             : 1; // [0] 0 = no device, 1 = device connected
+      uint16_t port_enable            : 1; // [1] port is enabled
+      uint16_t suspend                : 1; // [2]
+      uint16_t over_current           : 1; // [3] over-current exists
+      uint16_t reset                  : 1; // [4] 0 = no reset, 1 = resetting
+
+      // From Bit 5 are for status only
+      uint16_t rsv5_7                 : 3; // [5..7] reserved
+      uint16_t port_power             : 1; // [8] 0 = port is off, 1 = port is on
+      uint16_t low_speed              : 1; // [9] low speed device attached
+      uint16_t high_speed             : 1; // [10] high speed device attached
+      uint16_t port_test_mode         : 1; // [11] port in test mode
+      uint16_t port_indicator_control : 1; // [12] 0: default color, 1: indicator is software controlled
+      uint16_t TU_RESERVED            : 3; // [13..15] reserved
+    };
+
+    uint16_t value;
+  } status, change;
+} hub_port_status_response_t;
+TU_VERIFY_STATIC( sizeof(hub_port_status_response_t) == 4, "size is not correct");
+
+//--------------------------------------------------------------------+
+// HUB API
+//--------------------------------------------------------------------+
+
+// Clear port feature
+bool hub_port_clear_feature(uint8_t hub_addr, uint8_t hub_port, uint8_t feature,
+                            tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Set port feature
+bool hub_port_set_feature(uint8_t hub_addr, uint8_t hub_port, uint8_t feature,
+                          tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get port status
+// If hub_port != 0, resp is ignored. hub_port_get_status_local() can be used to retrieve the status
+bool hub_port_get_status(uint8_t hub_addr, uint8_t hub_port, void *resp,
+                         tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get port status from local cache. This does not send a request to the device
+bool hub_port_get_status_local(uint8_t hub_addr, uint8_t hub_port, hub_port_status_response_t* resp);
+
+// Get status from Interrupt endpoint
+bool hub_edpt_status_xfer(uint8_t daddr);
+
+// Reset a port
+TU_ATTR_ALWAYS_INLINE static inline
+bool hub_port_reset(uint8_t hub_addr, uint8_t hub_port, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  return hub_port_set_feature(hub_addr, hub_port, HUB_FEATURE_PORT_RESET, complete_cb, user_data);
+}
+
+// Clear Port Reset Change
+TU_ATTR_ALWAYS_INLINE static inline
+bool hub_port_clear_reset_change(uint8_t hub_addr, uint8_t hub_port, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  return hub_port_clear_feature(hub_addr, hub_port, HUB_FEATURE_PORT_RESET_CHANGE, complete_cb, user_data);
+}
+
+// Get Hub status (port = 0)
+TU_ATTR_ALWAYS_INLINE static inline
+bool hub_get_status(uint8_t hub_addr, void* resp, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  return hub_port_get_status(hub_addr, 0, resp, complete_cb, user_data);
+}
+
+// Clear Hub feature
+TU_ATTR_ALWAYS_INLINE static inline
+bool hub_clear_feature(uint8_t hub_addr, uint8_t feature, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  return hub_port_clear_feature(hub_addr, 0, feature, complete_cb, user_data);
+}
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+bool     hub_init(void);
+bool     hub_deinit(void);
+uint16_t hub_open(uint8_t rhport, uint8_t dev_addr, const tusb_desc_interface_t *itf_desc, uint16_t max_len);
+bool     hub_set_config(uint8_t daddr, uint8_t itf_num);
+bool     hub_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
+void     hub_close(uint8_t dev_addr);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
@@ -0,0 +1,400 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_USBH_H_
+#define TUSB_USBH_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "common/tusb_common.h"
+
+#if CFG_TUH_MAX3421
+#include "portable/analog/max3421/hcd_max3421.h"
+#endif
+
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF
+//--------------------------------------------------------------------+
+
+// Endpoint Bulk size depending on host mx speed
+#define TUH_EPSIZE_BULK_MPS   (TUH_OPT_HIGH_SPEED ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS)
+
+// forward declaration
+struct tuh_xfer_s;
+typedef struct tuh_xfer_s tuh_xfer_t;
+typedef void (*tuh_xfer_cb_t)(tuh_xfer_t* xfer);
+
+// Note1: layout and order of this will be changed in near future
+// it is advised to initialize it using member name
+// Note2: not all field is available/meaningful in callback,
+// some info is not saved by usbh to save SRAM
+struct tuh_xfer_s {
+  uint8_t daddr;
+  uint8_t ep_addr;
+  uint8_t TU_RESERVED;      // reserved
+  xfer_result_t result;
+
+  uint32_t actual_len;      // excluding setup packet
+
+  union {
+    tusb_control_request_t const* setup; // setup packet pointer if control transfer
+    uint32_t buflen;                     // expected length if not control transfer (not available in callback)
+  };
+
+  uint8_t* buffer;           // not available in callback if not control transfer
+  tuh_xfer_cb_t complete_cb;
+  uintptr_t user_data;
+
+  // uint32_t timeout_ms;    // place holder, not supported yet
+};
+
+// Subject to change
+typedef struct {
+  uint8_t daddr;
+  tusb_desc_interface_t desc;
+} tuh_itf_info_t;
+
+typedef struct {
+  uint8_t rhport;
+  uint8_t hub_addr;
+  uint8_t hub_port;
+  uint8_t speed;
+} tuh_bus_info_t;
+
+// backward compatibility for hcd_devtree_info_t, maybe removed in the future
+#define hcd_devtree_info_t tuh_bus_info_t
+#define hcd_devtree_get_info(_daddr, _bus_info) tuh_bus_info_get(_daddr, _bus_info)
+
+// ConfigID for tuh_configure()
+enum {
+  TUH_CFGID_INVALID = 0,
+  TUH_CFGID_RPI_PIO_USB_CONFIGURATION = 100, // cfg_param: pio_usb_configuration_t
+  TUH_CFGID_MAX3421 = 200,
+  TUH_CFGID_FSDEV = 300,
+};
+
+typedef struct {
+  uint8_t max_nak; // max NAK per endpoint per frame to save CPU/SPI bus usage (0=unlimited)
+  uint8_t cpuctl; // R16: CPU Control Register
+  uint8_t pinctl; // R17: Pin Control Register. FDUPSPI bit is ignored
+} tuh_configure_max3421_t;
+
+typedef struct {
+  uint8_t max_nak; // max NAK per endpoint per frame to save CPU usage (0=unlimited)
+} tuh_configure_fsdev_t;
+
+typedef union {
+  // For TUH_CFGID_RPI_PIO_USB_CONFIGURATION use pio_usb_configuration_t
+  tuh_configure_max3421_t max3421;
+  tuh_configure_fsdev_t fsdev;
+} tuh_configure_param_t;
+
+//--------------------------------------------------------------------+
+// APPLICATION CALLBACK
+//--------------------------------------------------------------------+
+
+// Invoked when enumeration get device descriptor
+// Device is not ready to communicate yet, application can copy the descriptor if needed
+void tuh_enum_descriptor_device_cb(uint8_t daddr, const tusb_desc_device_t *desc_device);
+
+// Invoked when enumeration get configuration descriptor
+// For multi-configuration device return false to skip, true to proceed with this configuration (may not be implemented yet)
+// Device is not ready to communicate yet, application can copy the descriptor if needed
+bool tuh_enum_descriptor_configuration_cb(uint8_t daddr, uint8_t cfg_index, const tusb_desc_configuration_t *desc_config);
+
+// Invoked when a device is mounted (configured)
+void tuh_mount_cb (uint8_t daddr);
+
+// Invoked when a device failed to mount during enumeration process
+// void tuh_mount_failed_cb (uint8_t daddr);
+
+// Invoked when a device is unmounted (detached)
+void tuh_umount_cb(uint8_t daddr);
+
+// Invoked when there is a new usb event, which need to be processed by tuh_task()/tuh_task_ext()
+void tuh_event_hook_cb(uint8_t rhport, uint32_t eventid, bool in_isr);
+
+//--------------------------------------------------------------------+
+// APPLICATION API
+//--------------------------------------------------------------------+
+
+// Configure host stack behavior with dynamic or port-specific parameters.
+// Should be called before tuh_init()
+// - cfg_id   : configure ID (TBD)
+// - cfg_param: configure data, structure depends on the ID
+bool tuh_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param);
+
+// New API to replace tuh_init() to init host stack on specific roothub port
+// Must be called in the same task/context as tuh_task() if RTOS is used
+bool tuh_rhport_init(uint8_t rhport, const tusb_rhport_init_t* rh_init);
+
+// Init host stack
+#if TUSB_VERSION_NUMBER > 2000  // 0.20.0
+TU_ATTR_DEPRECATED("Please use tusb_init(rhport, rh_init) instead")
+#endif
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_init(uint8_t rhport) {
+  const tusb_rhport_init_t rh_init = {
+    .role = TUSB_ROLE_HOST,
+    .speed = TUH_OPT_HIGH_SPEED ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL,
+  };
+  return tuh_rhport_init(rhport, &rh_init);
+}
+
+// Deinit host stack on rhport
+// Must be called in the same task/context as tuh_task() if RTOS is used
+bool tuh_deinit(uint8_t rhport);
+
+// Check if host stack is already initialized with any roothub ports
+// To check if an rhport is initialized, use tuh_rhport_is_active()
+bool tuh_inited(void);
+
+// Task function should be called in main/rtos loop, extended version of tuh_task()
+// - timeout_ms: millisecond to wait, zero = no wait, 0xFFFFFFFF = wait forever
+// - in_isr: if function is called in ISR
+void tuh_task_ext(uint32_t timeout_ms, bool in_isr);
+
+// Task function should be called in main/rtos loop
+TU_ATTR_ALWAYS_INLINE static inline void tuh_task(void) {
+  tuh_task_ext(UINT32_MAX, false);
+}
+
+// Check if there is pending events need processing by tuh_task()
+bool tuh_task_event_ready(void);
+
+#ifndef TUSB_HCD_H_
+extern void hcd_int_handler(uint8_t rhport, bool in_isr);
+#endif
+
+// Interrupt handler alias to HCD with in_isr as optional parameter
+#define _tuh_int_handler_arg0()                   TU_VERIFY_STATIC(false, "tuh_int_handler() must have 1 or 2 arguments")
+#define _tuh_int_handler_arg1(_rhport)            hcd_int_handler(_rhport, true)
+#define _tuh_int_handler_arg2(_rhport, _in_isr)   hcd_int_handler(_rhport, _in_isr)
+
+// 1st argument is rhport (mandatory), 2nd argument in_isr (optional)
+#define tuh_int_handler(...)   TU_FUNC_OPTIONAL_ARG(_tuh_int_handler, __VA_ARGS__)
+
+// Check if roothub port is initialized and active as a host
+bool tuh_rhport_is_active(uint8_t rhport);
+
+// Assert/de-assert Bus Reset signal to roothub port. USB specs: it should last 10-50ms
+bool tuh_rhport_reset_bus(uint8_t rhport, bool active);
+
+//--------------------------------------------------------------------+
+// Device API
+//--------------------------------------------------------------------+
+
+// Get VID/PID of device
+bool tuh_vid_pid_get(uint8_t daddr, uint16_t* vid, uint16_t* pid);
+
+// Get local (cached) device descriptor once device is enumerated
+bool tuh_descriptor_get_device_local(uint8_t daddr, tusb_desc_device_t* desc_device);
+
+// Get speed of device
+tusb_speed_t tuh_speed_get(uint8_t daddr);
+
+// Check if device is connected and configured
+bool tuh_mounted(uint8_t daddr);
+
+// Check if device is connected which mean device has at least 1 successful transfer
+// Note: It may not be addressed/configured/mounted yet
+bool tuh_connected(uint8_t daddr);
+
+// Check if device is suspended
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_suspended(uint8_t daddr) {
+  // TODO implement suspend & resume on host
+  (void) daddr;
+  return false;
+}
+
+// Check if device is ready to communicate with
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_ready(uint8_t daddr) {
+  return tuh_mounted(daddr) && !tuh_suspended(daddr);
+}
+
+// Get bus information of device
+bool tuh_bus_info_get(uint8_t daddr, tuh_bus_info_t* bus_info);
+
+//--------------------------------------------------------------------+
+// Transfer API
+// Each Function will make a USB transfer request to device. If
+// - complete_cb != NULL, the function will return immediately and invoke the callback when request is complete.
+// - complete_cb == NULL, the function will block until request is complete.
+// In this case, user_data should be tusb_xfer_result_t* to hold the transfer result.
+//--------------------------------------------------------------------+
+
+// Helper to make Sync API from async one
+#define TU_API_SYNC(_async_api, ...) \
+   xfer_result_t result = XFER_RESULT_INVALID;\
+   TU_VERIFY(_async_api(__VA_ARGS__, NULL, (uintptr_t) &result), XFER_RESULT_TIMEOUT); \
+   return result
+
+// Submit a control transfer
+//  - async: complete callback invoked when finished.
+//  - sync : blocking if complete callback is NULL.
+bool tuh_control_xfer(tuh_xfer_t* xfer);
+
+// Submit a bulk/interrupt transfer
+//  - async: complete callback invoked when finished.
+//  - sync : blocking if complete callback is NULL.
+bool tuh_edpt_xfer(tuh_xfer_t* xfer);
+
+// Open a non-control endpoint
+bool tuh_edpt_open(uint8_t daddr, tusb_desc_endpoint_t const * desc_ep);
+
+// Close a non-control endpoint, it will abort any pending transfer
+bool tuh_edpt_close(uint8_t daddr, uint8_t ep_addr);
+
+// Abort a queued transfer. Note: it can only abort transfer that has not been started
+// Return true if a queued transfer is aborted, false if there is no transfer to abort
+bool tuh_edpt_abort_xfer(uint8_t daddr, uint8_t ep_addr);
+
+// Set Address (control transfer)
+bool tuh_address_set(uint8_t daddr, uint8_t new_addr,
+                     tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Set Configuration (control transfer)
+// config_num = 0 will un-configure device. Note: config_num = config_descriptor_index + 1
+// true on success, false if there is on-going control transfer or incorrect parameters
+// if complete_cb == NULL i.e blocking, user_data should be pointed to xfer_reuslt_t*
+bool tuh_configuration_set(uint8_t daddr, uint8_t config_num,
+                           tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Set Interface (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+// if complete_cb == NULL i.e blocking, user_data should be pointed to xfer_reuslt_t*
+bool tuh_interface_set(uint8_t daddr, uint8_t itf_num, uint8_t itf_alt,
+                       tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+//--------------------------------------------------------------------+
+// Descriptors Asynchronous (non-blocking)
+//--------------------------------------------------------------------+
+
+// Get an descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get(uint8_t daddr, uint8_t type, uint8_t index, void* buffer, uint16_t len,
+                        tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get device descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get_device(uint8_t daddr, void* buffer, uint16_t len,
+                               tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get configuration descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get_configuration(uint8_t daddr, uint8_t index, void* buffer, uint16_t len,
+                                      tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get HID report descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get_hid_report(uint8_t daddr, uint8_t itf_num, uint8_t desc_type, uint8_t index, void* buffer, uint16_t len,
+                                   tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get string descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+// Blocking if complete callback is NULL, in this case 'user_data' must contain xfer_result_t variable
+bool tuh_descriptor_get_string(uint8_t daddr, uint8_t index, uint16_t language_id, void* buffer, uint16_t len,
+                               tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get language id string descriptor (control transfer)
+TU_ATTR_ALWAYS_INLINE static inline
+bool tuh_descriptor_get_string_langid(uint8_t daddr, void* buffer, uint16_t len,
+                               tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  return tuh_descriptor_get_string(daddr, 0, 0, buffer, len, complete_cb, user_data);
+}
+
+// Get manufacturer string descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get_manufacturer_string(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len,
+                                            tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get product string descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get_product_string(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len,
+                                       tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Get serial string descriptor (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_descriptor_get_serial_string(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len,
+                                      tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+//--------------------------------------------------------------------+
+// Descriptors Synchronous (blocking)
+// Sync API which is blocking until transfer is complete.
+// return transfer result
+//--------------------------------------------------------------------+
+
+// Sync version of tuh_descriptor_get()
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_descriptor_get_sync(uint8_t daddr, uint8_t type, uint8_t index, void* buffer, uint16_t len) {
+  TU_API_SYNC(tuh_descriptor_get, daddr, type, index, buffer, len);
+}
+
+// Sync version of tuh_descriptor_get_device()
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_descriptor_get_device_sync(uint8_t daddr, void* buffer, uint16_t len) {
+  TU_API_SYNC(tuh_descriptor_get_device, daddr, buffer, len);
+}
+
+// Sync version of tuh_descriptor_get_configuration()
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_descriptor_get_configuration_sync(uint8_t daddr, uint8_t index, void* buffer, uint16_t len) {
+  TU_API_SYNC(tuh_descriptor_get_configuration, daddr, index, buffer, len);
+}
+
+// Sync version of tuh_descriptor_get_hid_report()
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_descriptor_get_hid_report_sync(uint8_t daddr, uint8_t itf_num, uint8_t desc_type, uint8_t index, void* buffer, uint16_t len) {
+  TU_API_SYNC(tuh_descriptor_get_hid_report, daddr, itf_num, desc_type, index, buffer, len);
+}
+
+// Sync version of tuh_descriptor_get_string()
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_descriptor_get_string_sync(uint8_t daddr, uint8_t index, uint16_t language_id, void* buffer, uint16_t len) {
+  TU_API_SYNC(tuh_descriptor_get_string, daddr, index, language_id, buffer, len);
+}
+
+// Sync version of tuh_descriptor_get_string_langid()
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_descriptor_get_string_langid_sync(uint8_t daddr, void* buffer, uint16_t len) {
+  return tuh_descriptor_get_string_sync(daddr, 0, 0, buffer, len);
+}
+
+// Sync version of tuh_descriptor_get_manufacturer_string()
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_descriptor_get_manufacturer_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len) {
+  TU_API_SYNC(tuh_descriptor_get_manufacturer_string, daddr, language_id, buffer, len);
+}
+
+// Sync version of tuh_descriptor_get_product_string()
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_descriptor_get_product_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len) {
+  TU_API_SYNC(tuh_descriptor_get_product_string, daddr, language_id, buffer, len);
+}
+
+// Sync version of tuh_descriptor_get_serial_string()
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_descriptor_get_serial_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len) {
+  TU_API_SYNC(tuh_descriptor_get_serial_string, daddr, language_id, buffer, len);
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
@@ -0,0 +1,103 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_USBH_PVT_H_
+#define TUSB_USBH_PVT_H_
+
+#include "osal/osal.h"
+#include "common/tusb_fifo.h"
+#include "common/tusb_private.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define TU_LOG_USBH(...)      TU_LOG(CFG_TUH_LOG_LEVEL, __VA_ARGS__)
+#define TU_LOG_MEM_USBH(...)  TU_LOG_MEM(CFG_TUH_LOG_LEVEL, __VA_ARGS__)
+#define TU_LOG_BUF_USBH(...)  TU_LOG_BUF(CFG_TUH_LOG_LEVEL, __VA_ARGS__)
+#define TU_LOG_INT_USBH(...)  TU_LOG_INT(CFG_TUH_LOG_LEVEL, __VA_ARGS__)
+#define TU_LOG_HEX_USBH(...)  TU_LOG_HEX(CFG_TUH_LOG_LEVEL, __VA_ARGS__)
+
+//--------------------------------------------------------------------+
+// Class Driver API
+//--------------------------------------------------------------------+
+typedef struct {
+   const char *name;
+   bool (*const init)(void);
+   bool (*const deinit)(void);
+   uint16_t (*const open)(uint8_t rhport, uint8_t dev_addr, const tusb_desc_interface_t *itf_desc, uint16_t max_len);
+   bool (*const set_config)(uint8_t dev_addr, uint8_t itf_num);
+   bool (*const xfer_cb)(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
+   void (*const close)(uint8_t dev_addr);
+ } usbh_class_driver_t;
+
+// Invoked when initializing host stack to get additional class drivers.
+// Can be implemented by application to extend/overwrite class driver support.
+// Note: The drivers array must be accessible at all time when stack is active
+usbh_class_driver_t const* usbh_app_driver_get_cb(uint8_t* driver_count);
+
+// Call by class driver to tell USBH that it has complete the enumeration
+void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num);
+
+uint8_t usbh_get_rhport(uint8_t daddr);
+
+uint8_t* usbh_get_enum_buf(void);
+
+void usbh_int_set(bool enabled);
+
+void usbh_defer_func(osal_task_func_t func, void *param, bool in_isr);
+
+void usbh_spin_lock(bool in_isr);
+void usbh_spin_unlock(bool in_isr);
+
+//--------------------------------------------------------------------+
+// USBH Endpoint API
+//--------------------------------------------------------------------+
+
+// Submit a usb transfer with callback support, require CFG_TUH_API_EDPT_XFER
+bool usbh_edpt_xfer_with_callback(uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes,
+                                  tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+TU_ATTR_ALWAYS_INLINE static inline
+bool usbh_edpt_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) {
+  return usbh_edpt_xfer_with_callback(dev_addr, ep_addr, buffer, total_bytes, NULL, 0);
+}
+
+// Claim an endpoint before submitting a transfer.
+// If caller does not make any transfer, it must release endpoint for others.
+bool usbh_edpt_claim(uint8_t dev_addr, uint8_t ep_addr);
+
+// Release claimed endpoint without submitting a transfer
+bool usbh_edpt_release(uint8_t dev_addr, uint8_t ep_addr);
+
+// Check if endpoint transferring is complete
+bool usbh_edpt_busy(uint8_t dev_addr, uint8_t ep_addr);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
@@ -0,0 +1,104 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_OSAL_H_
+#define TUSB_OSAL_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "common/tusb_common.h"
+
+typedef void (*osal_task_func_t)(void* param);
+
+// Timeout
+#define OSAL_TIMEOUT_NOTIMEOUT     (0)          // Return immediately
+#define OSAL_TIMEOUT_NORMAL        (10)         // Default timeout
+#define OSAL_TIMEOUT_WAIT_FOREVER  (UINT32_MAX) // Wait forever
+#define OSAL_TIMEOUT_CONTROL_XFER  OSAL_TIMEOUT_WAIT_FOREVER
+
+// Mutex is required when using a preempted RTOS or MCU has multiple cores
+#if (CFG_TUSB_OS == OPT_OS_NONE) && !TUP_MCU_MULTIPLE_CORE
+  #define OSAL_MUTEX_REQUIRED   0
+  #define OSAL_MUTEX_DEF(_name) uint8_t :0
+#else
+  #define OSAL_MUTEX_REQUIRED   1
+  #define OSAL_MUTEX_DEF(_name) osal_mutex_def_t _name
+#endif
+
+// OS thin implementation
+#if CFG_TUSB_OS == OPT_OS_NONE
+  #include "osal_none.h"
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  #include "osal_freertos.h"
+#elif CFG_TUSB_OS == OPT_OS_MYNEWT
+  #include "osal_mynewt.h"
+#elif CFG_TUSB_OS == OPT_OS_PICO
+  #include "osal_pico.h"
+#elif CFG_TUSB_OS == OPT_OS_RTTHREAD
+  #include "osal_rtthread.h"
+#elif CFG_TUSB_OS == OPT_OS_RTX4
+  #include "osal_rtx4.h"
+#elif CFG_TUSB_OS == OPT_OS_ZEPHYR
+  #include "osal_zephyr.h"
+#elif CFG_TUSB_OS == OPT_OS_CUSTOM
+  #include "tusb_os_custom.h" // implemented by application
+#else
+  #error OS is not supported yet
+#endif
+
+/*--------------------------------------------------------------------
+  OSAL Porting API
+  Should be implemented as static inline function in osal_port.h header
+   void osal_spin_init(osal_spinlock_t *ctx);
+   void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr)
+   void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr);
+
+   osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef);
+   bool osal_semaphore_delete(osal_semaphore_t semd_hdl);
+   bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr);
+   bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec);
+   void osal_semaphore_reset(osal_semaphore_t sem_hdl);
+
+   osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef);
+   bool osal_mutex_delete(osal_mutex_t mutex_hdl)
+   bool osal_mutex_lock (osal_mutex_t sem_hdl, uint32_t msec);
+   bool osal_mutex_unlock(osal_mutex_t mutex_hdl);
+
+   osal_queue_t osal_queue_create(osal_queue_def_t* qdef);
+   bool osal_queue_delete(osal_queue_t qhdl);
+   bool osal_queue_receive(osal_queue_t qhdl, void* data, uint32_t msec);
+   bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr);
+   bool osal_queue_empty(osal_queue_t qhdl);
+--------------------------------------------------------------------------*/
+
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
@@ -0,0 +1,272 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_OSAL_FREERTOS_H_
+#define TUSB_OSAL_FREERTOS_H_
+
+// FreeRTOS Headers
+#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,FreeRTOS.h)
+#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,semphr.h)
+#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,queue.h)
+#include TU_INCLUDE_PATH(CFG_TUSB_OS_INC_PATH,task.h)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF PROTYPES
+//--------------------------------------------------------------------+
+
+#if configSUPPORT_STATIC_ALLOCATION
+typedef StaticSemaphore_t osal_semaphore_def_t;
+typedef StaticSemaphore_t osal_mutex_def_t;
+#else
+
+// not used therefore defined to the smallest possible type to save space
+typedef uint8_t osal_semaphore_def_t;
+typedef uint8_t osal_mutex_def_t;
+#endif
+
+typedef SemaphoreHandle_t osal_semaphore_t;
+typedef SemaphoreHandle_t osal_mutex_t;
+typedef QueueHandle_t osal_queue_t;
+
+typedef struct {
+  uint16_t depth;
+  uint16_t item_sz;
+  void*    buf;
+
+#if defined(configQUEUE_REGISTRY_SIZE) && (configQUEUE_REGISTRY_SIZE>0)
+  char const* name;
+#endif
+
+#if configSUPPORT_STATIC_ALLOCATION
+  StaticQueue_t sq;
+#endif
+} osal_queue_def_t;
+
+#if defined(configQUEUE_REGISTRY_SIZE) && (configQUEUE_REGISTRY_SIZE>0)
+  #define OSAL_Q_NAME(_name) .name = #_name
+#else
+  #define OSAL_Q_NAME(_name)
+#endif
+
+// _int_set is not used with an RTOS
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type) \
+  static _type _name##_##buf[_depth];\
+  osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf, OSAL_Q_NAME(_name) }
+
+//--------------------------------------------------------------------+
+// TASK API
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t _osal_ms2tick(uint32_t msec) {
+  if (msec == OSAL_TIMEOUT_WAIT_FOREVER) { return portMAX_DELAY; }
+  if (msec == 0) { return 0; }
+
+  uint32_t ticks = pdMS_TO_TICKS(msec);
+
+  // If configTICK_RATE_HZ is less than 1000 and 1 tick > 1 ms, we still need to delay at least 1 tick
+  if (ticks == 0) { ticks = 1; }
+
+  return ticks;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) {
+  vTaskDelay(pdMS_TO_TICKS(msec));
+}
+
+//--------------------------------------------------------------------+
+// Spinlock API
+//--------------------------------------------------------------------+
+#define OSAL_SPINLOCK_DEF(_name, _int_set) \
+  osal_spinlock_t _name
+
+#if TUSB_MCU_VENDOR_ESPRESSIF
+// Espressif critical take spinlock as argument and does not use in_isr
+typedef portMUX_TYPE osal_spinlock_t;
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
+  spinlock_initialize(ctx);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
+  if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+    return; // single core MCU does not need to lock in ISR
+  }
+  portENTER_CRITICAL(ctx);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
+  if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+    return; // single core MCU does not need to lock in ISR
+  }
+  portEXIT_CRITICAL(ctx);
+}
+
+#else
+
+typedef UBaseType_t osal_spinlock_t;
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
+  (void) ctx;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
+  if (in_isr) {
+    if (TUP_MCU_MULTIPLE_CORE == 0) {
+      (void) ctx;
+      return; // single core MCU does not need to lock in ISR
+    }
+    *ctx = taskENTER_CRITICAL_FROM_ISR();
+  } else {
+    taskENTER_CRITICAL();
+  }
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
+  if (in_isr) {
+    if (TUP_MCU_MULTIPLE_CORE == 0) {
+      (void) ctx;
+      return; // single core MCU does not need to lock in ISR
+    }
+    taskEXIT_CRITICAL_FROM_ISR(*ctx);
+  } else {
+    taskEXIT_CRITICAL();
+  }
+}
+
+#endif
+
+//--------------------------------------------------------------------+
+// Semaphore API
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t *semdef) {
+#if configSUPPORT_STATIC_ALLOCATION
+  return xSemaphoreCreateBinaryStatic((StaticSemaphore_t*) semdef);
+#else
+  (void) semdef;
+  return xSemaphoreCreateBinary();
+#endif
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_delete(osal_semaphore_t semd_hdl) {
+  vSemaphoreDelete((SemaphoreHandle_t) semd_hdl);
+  return true;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) {
+  if (!in_isr) {
+    return xSemaphoreGive(sem_hdl) != 0;
+  } else {
+    BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+    BaseType_t res = xSemaphoreGiveFromISR(sem_hdl, &xHigherPriorityTaskWoken);
+    portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
+    return res != 0;
+  }
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec) {
+  return xSemaphoreTake(sem_hdl, _osal_ms2tick(msec));
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl) {
+  xQueueReset(sem_hdl);
+}
+
+//--------------------------------------------------------------------+
+// MUTEX API (priority inheritance)
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t *mdef) {
+#if configSUPPORT_STATIC_ALLOCATION
+  return xSemaphoreCreateMutexStatic(mdef);
+#else
+  (void) mdef;
+  return xSemaphoreCreateMutex();
+#endif
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_delete(osal_mutex_t mutex_hdl) {
+  vSemaphoreDelete(mutex_hdl);
+  return true;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_lock(osal_mutex_t mutex_hdl, uint32_t msec) {
+  return osal_semaphore_wait(mutex_hdl, msec);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) {
+  return xSemaphoreGive(mutex_hdl);
+}
+
+//--------------------------------------------------------------------+
+// QUEUE API
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) {
+  osal_queue_t q;
+
+#if configSUPPORT_STATIC_ALLOCATION
+  q = xQueueCreateStatic(qdef->depth, qdef->item_sz, (uint8_t*) qdef->buf, &qdef->sq);
+#else
+  q = xQueueCreate(qdef->depth, qdef->item_sz);
+#endif
+
+#if defined(configQUEUE_REGISTRY_SIZE) && (configQUEUE_REGISTRY_SIZE>0)
+  vQueueAddToRegistry(q, qdef->name);
+#endif
+
+  return q;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_delete(osal_queue_t qhdl) {
+  vQueueDelete(qhdl);
+  return true;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, void* data, uint32_t msec) {
+  return xQueueReceive(qhdl, data, _osal_ms2tick(msec));
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void const *data, bool in_isr) {
+  if (!in_isr) {
+    return xQueueSendToBack(qhdl, data, OSAL_TIMEOUT_WAIT_FOREVER) != 0;
+  } else {
+    BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+    BaseType_t res = xQueueSendToBackFromISR(qhdl, data, &xHigherPriorityTaskWoken);
+    portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
+    return res != 0;
+  }
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl) {
+  return uxQueueMessagesWaiting(qhdl) == 0;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,203 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef OSAL_MYNEWT_H_
+#define OSAL_MYNEWT_H_
+
+#include "os/os.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// TASK API
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) {
+  os_time_delay( os_time_ms_to_ticks32(msec) );
+}
+
+//--------------------------------------------------------------------+
+// Spinlock API
+//--------------------------------------------------------------------+
+typedef os_sr_t osal_spinlock_t;
+
+#define OSAL_SPINLOCK_DEF(_name, _int_set) \
+  osal_spinlock_t _name
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
+ (void) ctx;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
+  if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+    return; // single core MCU does not need to lock in ISR
+  }
+  OS_ENTER_CRITICAL(*ctx);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
+  if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+    return; // single core MCU does not need to lock in ISR
+  }
+  OS_EXIT_CRITICAL(*ctx);
+}
+
+//--------------------------------------------------------------------+
+// Semaphore API
+//--------------------------------------------------------------------+
+typedef struct os_sem  osal_semaphore_def_t;
+typedef struct os_sem* osal_semaphore_t;
+
+TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef) {
+  return (os_sem_init(semdef, 0) == OS_OK) ? (osal_semaphore_t) semdef : NULL;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_delete(osal_semaphore_t semd_hdl) {
+  (void) semd_hdl;
+  return true; // nothing to do
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) {
+  (void) in_isr;
+  return os_sem_release(sem_hdl) == OS_OK;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec) {
+  uint32_t const ticks = (msec == OSAL_TIMEOUT_WAIT_FOREVER) ? OS_TIMEOUT_NEVER : os_time_ms_to_ticks32(msec);
+  return os_sem_pend(sem_hdl, ticks) == OS_OK;
+}
+
+static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl) {
+  // TODO implement later
+}
+
+//--------------------------------------------------------------------+
+// MUTEX API (priority inheritance)
+//--------------------------------------------------------------------+
+typedef struct os_mutex osal_mutex_def_t;
+typedef struct os_mutex* osal_mutex_t;
+
+TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef) {
+  return (os_mutex_init(mdef) == OS_OK) ? (osal_mutex_t) mdef : NULL;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_delete(osal_mutex_t mutex_hdl) {
+  (void) mutex_hdl;
+  return true; // nothing to do
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_lock(osal_mutex_t mutex_hdl, uint32_t msec) {
+  uint32_t const ticks = (msec == OSAL_TIMEOUT_WAIT_FOREVER) ? OS_TIMEOUT_NEVER : os_time_ms_to_ticks32(msec);
+  return os_mutex_pend(mutex_hdl, ticks) == OS_OK;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) {
+  return os_mutex_release(mutex_hdl) == OS_OK;
+}
+
+//--------------------------------------------------------------------+
+// QUEUE API
+//--------------------------------------------------------------------+
+
+// role device/host is used by OS NONE for mutex (disable usb isr) only
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type) \
+  static _type _name##_##buf[_depth];\
+  static struct os_event _name##_##evbuf[_depth];\
+  osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf, .evbuf =  _name##_##evbuf};\
+
+typedef struct {
+  uint16_t depth;
+  uint16_t item_sz;
+  void*    buf;
+  void*    evbuf;
+
+  struct os_mempool mpool;
+  struct os_mempool epool;
+
+  struct os_eventq  evq;
+}osal_queue_def_t;
+
+typedef osal_queue_def_t* osal_queue_t;
+
+TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) {
+  if ( OS_OK != os_mempool_init(&qdef->mpool, qdef->depth, qdef->item_sz, qdef->buf, "usb queue") ) return NULL;
+  if ( OS_OK != os_mempool_init(&qdef->epool, qdef->depth, sizeof(struct os_event), qdef->evbuf, "usb evqueue") ) return NULL;
+
+  os_eventq_init(&qdef->evq);
+  return (osal_queue_t) qdef;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_delete(osal_queue_t qhdl) {
+  (void) qhdl;
+  return true; // nothing to do
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, void* data, uint32_t msec) {
+  (void) msec; // os_eventq_get() does not take timeout, always behave as msec = WAIT_FOREVER
+
+  struct os_event* ev;
+  ev = os_eventq_get(&qhdl->evq);
+
+  memcpy(data, ev->ev_arg, qhdl->item_sz); // copy message
+  os_memblock_put(&qhdl->mpool, ev->ev_arg); // put back mem block
+  os_memblock_put(&qhdl->epool, ev);         // put back ev block
+
+  return true;
+}
+
+static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr) {
+  (void) in_isr;
+
+  // get a block from mem pool for data
+  void* ptr = os_memblock_get(&qhdl->mpool);
+  if (!ptr) return false;
+  memcpy(ptr, data, qhdl->item_sz);
+
+  // get a block from event pool to put into queue
+  struct os_event* ev = (struct os_event*) os_memblock_get(&qhdl->epool);
+  if (!ev) {
+    os_memblock_put(&qhdl->mpool, ptr);
+    return false;
+  }
+  tu_memclr(ev, sizeof(struct os_event));
+  ev->ev_arg = ptr;
+
+  os_eventq_put(&qhdl->evq, ev);
+
+  return true;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl) {
+  return STAILQ_EMPTY(&qhdl->evq.evq_list);
+}
+
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* OSAL_MYNEWT_H_ */
@@ -0,0 +1,217 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_OSAL_NONE_H_
+#define TUSB_OSAL_NONE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Spinlock API
+//--------------------------------------------------------------------+
+// Note: This implementation is designed for bare-metal single-core systems without RTOS.
+// - Supports nested locking within the same execution context
+// - NOT suitable for true SMP (Symmetric Multi-Processing) systems
+// - NOT thread-safe for multi-threaded environments
+// - Primarily manages interrupt enable/disable state for critical sections
+typedef struct {
+  void (* interrupt_set)(bool enabled);
+  uint32_t nested_count;
+} osal_spinlock_t;
+
+// For SMP, spinlock must be locked by hardware, cannot just use interrupt
+#define OSAL_SPINLOCK_DEF(_name, _int_set) \
+  osal_spinlock_t _name = { .interrupt_set = _int_set, .nested_count = 0 }
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
+  (void) ctx;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
+  // Disable interrupts first to make nested_count increment atomic
+  if (!in_isr && ctx->nested_count == 0) {
+    ctx->interrupt_set(false);
+  }
+  ctx->nested_count++;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
+  if (ctx->nested_count == 0) {
+    return; // spin is not locked to begin with
+  }
+
+  ctx->nested_count--;
+
+  // Only re-enable interrupts when fully unlocked
+  if (!in_isr && ctx->nested_count == 0) {
+    ctx->interrupt_set(true);
+  }
+}
+
+//--------------------------------------------------------------------+
+// Binary Semaphore API
+//--------------------------------------------------------------------+
+typedef struct {
+  volatile uint16_t count;
+} osal_semaphore_def_t;
+
+typedef osal_semaphore_def_t* osal_semaphore_t;
+
+TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef) {
+  semdef->count = 0;
+  return semdef;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_delete(osal_semaphore_t semd_hdl) {
+  (void) semd_hdl;
+  return true; // nothing to do
+}
+
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) {
+  (void) in_isr;
+  sem_hdl->count++;
+  return true;
+}
+
+// TODO blocking for now
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec) {
+  (void) msec;
+
+  while (sem_hdl->count == 0) {}
+  sem_hdl->count--;
+
+  return true;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl) {
+  sem_hdl->count = 0;
+}
+
+//--------------------------------------------------------------------+
+// MUTEX API
+// Within tinyusb, mutex is never used in ISR context
+//--------------------------------------------------------------------+
+typedef osal_semaphore_def_t osal_mutex_def_t;
+typedef osal_semaphore_t osal_mutex_t;
+
+#if OSAL_MUTEX_REQUIRED
+// Note: multiple cores MCUs usually do provide IPC API for mutex
+// or we can use std atomic function
+
+TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef) {
+  mdef->count = 1;
+  return mdef;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_delete(osal_mutex_t mutex_hdl) {
+  (void) mutex_hdl;
+  return true; // nothing to do
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_lock (osal_mutex_t mutex_hdl, uint32_t msec) {
+  return osal_semaphore_wait(mutex_hdl, msec);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) {
+  return osal_semaphore_post(mutex_hdl, false);
+}
+
+#else
+
+#define osal_mutex_create(_mdef)          (NULL)
+#define osal_mutex_lock(_mutex_hdl, _ms)  (true)
+#define osal_mutex_unlock(_mutex_hdl)     (true)
+
+#endif
+
+//--------------------------------------------------------------------+
+// QUEUE API
+//--------------------------------------------------------------------+
+#include "common/tusb_fifo.h"
+
+typedef struct {
+  void (* interrupt_set)(bool enabled);
+  uint16_t  item_size;
+  tu_fifo_t ff;
+} osal_queue_def_t;
+
+typedef osal_queue_def_t* osal_queue_t;
+
+// _int_set is used as mutex in OS NONE (disable/enable USB ISR)
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type)                                                 \
+  uint8_t          _name##_buf[_depth * sizeof(_type)];                                                \
+  osal_queue_def_t _name = {.interrupt_set = _int_set,                                                 \
+                            .item_size     = sizeof(_type),                                            \
+                            .ff            = TU_FIFO_INIT(_name##_buf, _depth * sizeof(_type), false)}
+
+TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) {
+  tu_fifo_clear(&qdef->ff);
+  return (osal_queue_t) qdef;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_delete(osal_queue_t qhdl) {
+  (void) qhdl;
+  return true; // nothing to do
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, void* data, uint32_t msec) {
+  (void) msec; // not used, always behave as msec = 0
+
+  qhdl->interrupt_set(false);
+  const bool success = tu_fifo_read_n(&qhdl->ff, data, qhdl->item_size);
+  qhdl->interrupt_set(true);
+
+  return success;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void const* data, bool in_isr) {
+  if (!in_isr) {
+    qhdl->interrupt_set(false);
+  }
+
+  const bool success = tu_fifo_write_n(&qhdl->ff, data, qhdl->item_size);
+
+  if (!in_isr) {
+    qhdl->interrupt_set(true);
+  }
+
+  return success;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl) {
+  // Skip queue lock/unlock since this function is primarily called
+  // with interrupt disabled before going into low power mode
+  return tu_fifo_empty(&qhdl->ff);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,182 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_OSAL_PICO_H_
+#define TUSB_OSAL_PICO_H_
+
+#include "pico/time.h"
+#include "pico/sem.h"
+#include "pico/mutex.h"
+#include "pico/critical_section.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// TASK API
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) {
+  sleep_ms(msec);
+}
+
+//--------------------------------------------------------------------+
+// Spinlock API
+//--------------------------------------------------------------------+
+typedef critical_section_t osal_spinlock_t; // pico implement critical section with spinlock
+#define OSAL_SPINLOCK_DEF(_name, _int_set) osal_spinlock_t _name
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
+  critical_section_init(ctx);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
+  (void)in_isr;
+  critical_section_enter_blocking(ctx);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
+  (void)in_isr;
+  critical_section_exit(ctx);
+}
+
+//--------------------------------------------------------------------+
+// Binary Semaphore API
+//--------------------------------------------------------------------+
+typedef struct semaphore osal_semaphore_def_t, *osal_semaphore_t;
+
+TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t *semdef) {
+  sem_init(semdef, 0, 255);
+  return semdef;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_delete(osal_semaphore_t semd_hdl) {
+  (void)semd_hdl;
+  return true; // nothing to do
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) {
+  (void)in_isr;
+  return sem_release(sem_hdl);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec) {
+  return sem_acquire_timeout_ms(sem_hdl, msec);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl) {
+  sem_reset(sem_hdl, 0);
+}
+
+//--------------------------------------------------------------------+
+// MUTEX API
+// Within tinyusb, mutex is never used in ISR context
+//--------------------------------------------------------------------+
+typedef struct mutex osal_mutex_def_t, *osal_mutex_t;
+
+TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t *mdef) {
+  mutex_init(mdef);
+  return mdef;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_delete(osal_mutex_t mutex_hdl) {
+  (void)mutex_hdl;
+  return true; // nothing to do
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_lock(osal_mutex_t mutex_hdl, uint32_t msec) {
+  return mutex_enter_timeout_ms(mutex_hdl, msec);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) {
+  mutex_exit(mutex_hdl);
+  return true;
+}
+
+//--------------------------------------------------------------------+
+// QUEUE API
+//--------------------------------------------------------------------+
+#include "common/tusb_fifo.h"
+
+typedef struct {
+  uint16_t                item_size;
+  tu_fifo_t               ff;
+  struct critical_section critsec; // osal_queue may be used in IRQs, so need critical section
+} osal_queue_def_t;
+
+typedef osal_queue_def_t *osal_queue_t;
+
+// role device/host is used by OS NONE for mutex (disable usb isr) only
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type)  \
+  uint8_t          _name##_buf[_depth * sizeof(_type)]; \
+  osal_queue_def_t _name = {.item_size = sizeof(_type), .ff = TU_FIFO_INIT(_name##_buf, _depth * sizeof(_type), false)}
+
+TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t *qdef) {
+  critical_section_init(&qdef->critsec);
+  tu_fifo_clear(&qdef->ff);
+  return (osal_queue_t)qdef;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_delete(osal_queue_t qhdl) {
+  osal_queue_def_t *qdef = (osal_queue_def_t *)qhdl;
+  critical_section_deinit(&qdef->critsec);
+  return true;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, void *data, uint32_t msec) {
+  (void)msec; // not used, always behave as msec = 0
+
+  critical_section_enter_blocking(&qhdl->critsec);
+  bool success = tu_fifo_read_n(&qhdl->ff, data, qhdl->item_size);
+  critical_section_exit(&qhdl->critsec);
+
+  return success;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, const void *data, bool in_isr) {
+  (void)in_isr;
+
+  critical_section_enter_blocking(&qhdl->critsec);
+  bool success = tu_fifo_write_n(&qhdl->ff, data, qhdl->item_size);
+  critical_section_exit(&qhdl->critsec);
+
+  return success;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl) {
+  // TODO: revisit; whether this is true or not currently, tu_fifo_empty is a single
+  //  volatile read.
+
+  // Skip queue lock/unlock since this function is primarily called
+  // with interrupt disabled before going into low power mode
+  return tu_fifo_empty(&qhdl->ff);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,174 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 tfx2001 (2479727366@qq.com)
+ * Copyright (c) 2020 yekai (2857693944@qq.com)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_OSAL_RTTHREAD_H_
+#define TUSB_OSAL_RTTHREAD_H_
+
+// RT-Thread Headers
+#include "rtthread.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// TASK API
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) {
+  rt_thread_mdelay(msec);
+}
+
+//--------------------------------------------------------------------+
+// Spinlock API
+//--------------------------------------------------------------------+
+typedef struct rt_spinlock osal_spinlock_t;
+
+#define OSAL_SPINLOCK_DEF(_name, _int_set) \
+  osal_spinlock_t _name
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
+  rt_spin_lock_init(ctx);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
+  if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+    return; // single core MCU does not need to lock in ISR
+  }
+  rt_spin_lock(ctx);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
+  if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+    return; // single core MCU does not need to lock in ISR
+  }
+  rt_spin_unlock(ctx);
+}
+
+//--------------------------------------------------------------------+
+// Semaphore API
+//--------------------------------------------------------------------+
+typedef struct rt_semaphore osal_semaphore_def_t;
+typedef rt_sem_t osal_semaphore_t;
+
+TU_ATTR_ALWAYS_INLINE static inline
+osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t *semdef) {
+  rt_sem_init(semdef, "tusb", 0, RT_IPC_FLAG_PRIO);
+  return semdef;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_delete(osal_semaphore_t semd_hdl) {
+  return RT_EOK == rt_sem_detach(semd_hdl);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) {
+  (void) in_isr;
+  return rt_sem_release(sem_hdl) == RT_EOK;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec) {
+  return rt_sem_take(sem_hdl, rt_tick_from_millisecond((rt_int32_t) msec)) == RT_EOK;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl) {
+  rt_sem_control(sem_hdl, RT_IPC_CMD_RESET, 0);
+}
+
+//--------------------------------------------------------------------+
+// MUTEX API (priority inheritance)
+//--------------------------------------------------------------------+
+typedef struct rt_mutex osal_mutex_def_t;
+typedef rt_mutex_t osal_mutex_t;
+
+TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t *mdef) {
+  rt_mutex_init(mdef, "tusb", RT_IPC_FLAG_PRIO);
+  return mdef;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_delete(osal_mutex_t mutex_hdl) {
+  return RT_EOK == rt_mutex_detach(mutex_hdl);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_lock(osal_mutex_t mutex_hdl, uint32_t msec) {
+  return rt_mutex_take(mutex_hdl, rt_tick_from_millisecond((rt_int32_t) msec)) == RT_EOK;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) {
+  return rt_mutex_release(mutex_hdl) == RT_EOK;
+}
+
+//--------------------------------------------------------------------+
+// QUEUE API
+//--------------------------------------------------------------------+
+
+// role device/host is used by OS NONE for mutex (disable usb isr) only
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type) \
+    static _type _name##_##buf[_depth]; \
+    osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf };
+
+typedef struct {
+    uint16_t depth;
+    uint16_t item_sz;
+    void *buf;
+
+    struct rt_messagequeue sq;
+} osal_queue_def_t;
+
+typedef rt_mq_t osal_queue_t;
+
+TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t *qdef) {
+  rt_mq_init(&(qdef->sq), "tusb", qdef->buf, qdef->item_sz,
+             qdef->item_sz * qdef->depth, RT_IPC_FLAG_PRIO);
+  return &(qdef->sq);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_delete(osal_queue_t qhdl) {
+  return RT_EOK == rt_mq_detach(qhdl);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, void *data, uint32_t msec) {
+  rt_tick_t tick = rt_tick_from_millisecond((rt_int32_t) msec);
+#if RT_VERSION_MAJOR >= 5
+  return rt_mq_recv(qhdl, data, qhdl->msg_size, tick) > 0;
+#else
+  return rt_mq_recv(qhdl, data, qhdl->msg_size, tick) == RT_EOK;
+#endif  /* RT_VERSION_MAJOR >= 5 */
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void const *data, bool in_isr) {
+  (void) in_isr;
+  return rt_mq_send(qhdl, (void *)data, qhdl->msg_size) == RT_EOK;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl) {
+  return (qhdl->entry) == 0;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,192 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Tian Yunhao (t123yh)
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_OSAL_RTX4_H_
+#define TUSB_OSAL_RTX4_H_
+
+#include <rtl.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// TASK API
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) {
+  uint16_t hi = msec >> 16;
+  uint16_t lo = msec;
+  while (hi--) {
+    os_dly_wait(0xFFFE);
+  }
+  os_dly_wait(lo);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t msec2wait(uint32_t msec) {
+  if (msec == OSAL_TIMEOUT_WAIT_FOREVER) {
+    return 0xFFFF;
+  } else if (msec >= 0xFFFE) {
+    return 0xFFFE;
+  } else {
+    return msec;
+  }
+}
+
+//--------------------------------------------------------------------+
+// Spinlock API, stub not implemented
+//--------------------------------------------------------------------+
+typedef uint8_t osal_spinlock_t;
+#define OSAL_SPINLOCK_DEF(_name, _int_set) \
+  osal_spinlock_t _name
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
+  (void) ctx;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
+  (void) ctx; (void) in_isr;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
+  (void) ctx; (void) in_isr;
+}
+
+//--------------------------------------------------------------------+
+// Semaphore API
+//--------------------------------------------------------------------+
+typedef OS_SEM osal_semaphore_def_t;
+typedef OS_ID osal_semaphore_t;
+
+TU_ATTR_ALWAYS_INLINE static inline OS_ID osal_semaphore_create(osal_semaphore_def_t* semdef) {
+  os_sem_init(semdef, 0);
+  return semdef;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_delete(osal_semaphore_t semd_hdl) {
+  (void) semd_hdl;
+  return true; // nothing to do
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) {
+  if ( !in_isr ) {
+    os_sem_send(sem_hdl);
+  } else {
+    isr_sem_send(sem_hdl);
+  }
+	return true;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait (osal_semaphore_t sem_hdl, uint32_t msec) {
+  return os_sem_wait(sem_hdl, msec2wait(msec)) != OS_R_TMO;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl) {
+  // TODO: implement
+}
+
+//--------------------------------------------------------------------+
+// MUTEX API (priority inheritance)
+//--------------------------------------------------------------------+
+typedef OS_MUT osal_mutex_def_t;
+typedef OS_ID osal_mutex_t;
+
+TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef) {
+  os_mut_init(mdef);
+  return mdef;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_delete(osal_mutex_t mutex_hdl) {
+  (void) mutex_hdl;
+  return true; // nothing to do
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_lock (osal_mutex_t mutex_hdl, uint32_t msec) {
+  return os_mut_wait(mutex_hdl, msec2wait(msec)) != OS_R_TMO;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) {
+  return os_mut_release(mutex_hdl) == OS_R_OK;
+}
+
+//--------------------------------------------------------------------+
+// QUEUE API
+//--------------------------------------------------------------------+
+
+// role device/host is used by OS NONE for mutex (disable usb isr) only
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type)   \
+  os_mbx_declare(_name##__mbox, _depth);              \
+  _declare_box(_name##__pool, sizeof(_type), _depth); \
+  osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .pool = _name##__pool, .mbox = _name##__mbox };
+
+typedef struct {
+  uint16_t depth;
+  uint16_t item_sz;
+  U32* pool;
+  U32* mbox;
+}osal_queue_def_t;
+
+typedef osal_queue_def_t* osal_queue_t;
+
+TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) {
+  os_mbx_init(qdef->mbox, (qdef->depth + 4) * 4);
+  _init_box(qdef->pool, ((qdef->item_sz+3)/4)*(qdef->depth) + 3, qdef->item_sz);
+  return qdef;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, void* data, uint32_t msec) {
+  void* buf;
+  os_mbx_wait(qhdl->mbox, &buf, msec2wait(msec));
+  memcpy(data, buf, qhdl->item_sz);
+  _free_box(qhdl->pool, buf);
+  return true;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_delete(osal_queue_t qhdl) {
+  (void) qhdl;
+  return true; // nothing to do ?
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr) {
+  void* buf = _alloc_box(qhdl->pool);
+  memcpy(buf, data, qhdl->item_sz);
+  if ( !in_isr ) {
+    os_mbx_send(qhdl->mbox, buf, 0xFFFF);
+  } else {
+    isr_mbx_send(qhdl->mbox, buf);
+  }
+  return true;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl) {
+  return os_mbx_check(qhdl->mbox) == qhdl->depth;
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
@@ -0,0 +1,152 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+#ifndef TUSB_OSAL_ZEPHYR_H
+#define TUSB_OSAL_ZEPHYR_H
+
+#include <zephyr/kernel.h>
+
+//--------------------------------------------------------------------+
+// TASK API
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) {
+  k_msleep(msec);
+}
+
+//--------------------------------------------------------------------+
+// Spinlock API
+//--------------------------------------------------------------------+
+typedef struct {
+  struct k_spinlock lock;
+  k_spinlock_key_t key;
+} osal_spinlock_t;
+
+#define OSAL_SPINLOCK_DEF(_name, _int_set) \
+  osal_spinlock_t _name
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
+  (void) ctx;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
+  if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+    return; // single core MCU does not need to lock in ISR
+  }
+  ctx->key = k_spin_lock(&ctx->lock);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
+  if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
+    return; // single core MCU does not need to lock in ISR
+  }
+  k_spin_unlock(&ctx->lock, ctx->key);
+}
+
+//--------------------------------------------------------------------+
+// Binary Semaphore API
+//--------------------------------------------------------------------+
+typedef struct k_sem osal_semaphore_def_t, * osal_semaphore_t;
+
+TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef) {
+  k_sem_init(semdef, 0, 255);
+  return semdef;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_delete(osal_semaphore_t semd_hdl) {
+  (void) semd_hdl;
+  return true; // nothing to do
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) {
+  (void) in_isr;
+  k_sem_give(sem_hdl);
+  return true;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec) {
+  return 0 == k_sem_take(sem_hdl, K_MSEC(msec));
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl) {
+  k_sem_reset(sem_hdl);
+}
+
+//--------------------------------------------------------------------+
+// MUTEX API
+//--------------------------------------------------------------------+
+typedef struct k_mutex osal_mutex_def_t, *osal_mutex_t;
+
+TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef) {
+  if ( 0 == k_mutex_init(mdef) ) {
+    return mdef;
+  } else {
+    return NULL;
+  }
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_delete(osal_mutex_t mutex_hdl) {
+  (void) mutex_hdl;
+  return true; // nothing to do
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_lock(osal_mutex_t mutex_hdl, uint32_t msec) {
+  return 0 == k_mutex_lock(mutex_hdl, K_MSEC(msec));
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) {
+  return 0 == k_mutex_unlock(mutex_hdl);
+}
+
+//--------------------------------------------------------------------+
+// QUEUE API
+//--------------------------------------------------------------------+
+typedef struct k_msgq osal_queue_def_t, * osal_queue_t;
+
+// role device/host is used by OS NONE for mutex (disable usb isr) only
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type)  K_MSGQ_DEFINE(_name, sizeof(_type), _depth, 4)
+
+TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) {
+  // K_MSGQ_DEFINE already initializes the queue
+  return (osal_queue_t) qdef;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_delete(osal_queue_t qhdl) {
+  (void) qhdl;
+  return true;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, void* data, uint32_t msec) {
+  return 0 == k_msgq_get(qhdl, data, K_MSEC(msec));
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void const* data, bool in_isr) {
+  return 0 == k_msgq_put(qhdl, data,  in_isr ? K_NO_WAIT : K_FOREVER);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl) {
+  return 0 == k_msgq_num_used_get(qhdl);
+}
+
+#endif
@@ -0,0 +1,63 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+#ifndef TUSB_HCD_MAX3421_H
+#define TUSB_HCD_MAX3421_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// SPI transfer API with MAX3421E are implemented by application
+// - spi_cs_api(), spi_xfer_api(), int_api()
+//--------------------------------------------------------------------+
+
+// API to control MAX3421 SPI CS
+extern void tuh_max3421_spi_cs_api(uint8_t rhport, bool active);
+
+// API to transfer data with MAX3421 SPI
+// Either tx_buf or rx_buf can be NULL, which means transfer is write or read only
+extern bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const* tx_buf, uint8_t* rx_buf, size_t xfer_bytes);
+
+// API to enable/disable MAX3421 INTR pin interrupt
+extern void tuh_max3421_int_api(uint8_t rhport, bool enabled);
+
+//--------------------------------------------------------------------+
+// API for read/write MAX3421 registers
+// are implemented by this driver, can be used by application
+//--------------------------------------------------------------------+
+
+// API to read MAX3421's register. Implemented by TinyUSB
+uint8_t tuh_max3421_reg_read(uint8_t rhport, uint8_t reg, bool in_isr);
+
+// API to write MAX3421's register. Implemented by TinyUSB
+bool tuh_max3421_reg_write(uint8_t rhport, uint8_t reg, uint8_t data, bool in_isr);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
@@ -0,0 +1,49 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _CI_FS_KINETIS_H
+#define _CI_FS_KINETIS_H
+
+#include "fsl_device_registers.h"
+
+//static const ci_fs_controller_t _ci_controller[] = {
+//    {.reg_base = USB0_BASE, .irqnum = USB0_IRQn}
+//};
+
+#define CI_FS_REG(_port)        ((ci_fs_regs_t*) USB0_BASE)
+#define CI_REG                  CI_FS_REG(0)
+
+void dcd_int_enable(uint8_t rhport) {
+  (void) rhport;
+  NVIC_EnableIRQ(USB0_IRQn);
+}
+
+void dcd_int_disable(uint8_t rhport) {
+  (void) rhport;
+  NVIC_DisableIRQ(USB0_IRQn);
+}
+
+#endif
@@ -0,0 +1,56 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _CI_FS_MCX_H
+#define _CI_FS_MCX_H
+
+#include "fsl_device_registers.h"
+
+#if CFG_TUSB_MCU == OPT_MCU_MCXN9
+  #define CI_FS_REG(_port)  ((ci_fs_regs_t*) USBFS0_BASE)
+  #define CIFS_IRQN 				USB0_FS_IRQn
+
+#elif CFG_TUSB_MCU == OPT_MCU_MCXA15
+  #define CI_FS_REG(_port)  ((ci_fs_regs_t*) USB0_BASE)
+  #define CIFS_IRQN         USB0_IRQn
+
+#else
+  #error "MCU is not supported"
+#endif
+
+#define CI_REG              CI_FS_REG(0)
+
+void dcd_int_enable(uint8_t rhport) {
+  (void) rhport;
+  NVIC_EnableIRQ(CIFS_IRQN);
+}
+
+void dcd_int_disable(uint8_t rhport) {
+  (void) rhport;
+  NVIC_DisableIRQ(CIFS_IRQN);
+}
+
+#endif
@@ -0,0 +1,118 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _CI_FS_TYPE_H
+#define _CI_FS_TYPE_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+// Note: some MCUs can only access these registers in 8-bit mode
+// align 4 is used to get rid of reserved fields
+#define _va32     volatile TU_ATTR_ALIGNED(4)
+
+typedef struct {
+  _va32 uint8_t PER_ID;                 // [00] Peripheral ID register
+  _va32 uint8_t ID_COMP;                // [04] Peripheral ID complement register
+  _va32 uint8_t REV;                    // [08] Peripheral revision register
+  _va32 uint8_t ADD_INFO;               // [0C] Peripheral additional info register
+  _va32 uint8_t OTG_ISTAT;              // [10] OTG Interrupt Status Register
+  _va32 uint8_t OTG_ICTRL;              // [14] OTG Interrupt Control Register
+  _va32 uint8_t OTG_STAT;               // [18] OTG Status Register
+  _va32 uint8_t OTG_CTRL;               // [1C] OTG Control register
+  uint32_t reserved_20[24];             // [20]
+  _va32 uint8_t INT_STAT;               // [80] Interrupt status register
+  _va32 uint8_t INT_EN;                 // [84] Interrupt enable register
+  _va32 uint8_t ERR_STAT;               // [88] Error interrupt status register
+  _va32 uint8_t ERR_ENB;                // [8C] Error interrupt enable register
+  _va32 uint8_t STAT;                   // [90] Status register
+  _va32 uint8_t CTL;                    // [94] Control register
+  _va32 uint8_t ADDR;                   // [98] Address register
+  _va32 uint8_t BDT_PAGE1;              // [9C] BDT page register 1
+  _va32 uint8_t FRM_NUML;               // [A0] Frame number register
+  _va32 uint8_t FRM_NUMH;               // [A4] Frame number register
+  _va32 uint8_t TOKEN;                  // [A8] Token register
+  _va32 uint8_t SOF_THLD;               // [AC] SOF threshold register
+  _va32 uint8_t BDT_PAGE2;              // [B0] BDT page register 2
+  _va32 uint8_t BDT_PAGE3;              // [B4] BDT page register 3
+
+  uint32_t reserved_b8;                 // [B8]
+  uint32_t reserved_bc;                 // [BC]
+
+  struct {
+    _va32 uint8_t CTL;
+  }EP[16];                              // [C0] Endpoint control register
+
+  //----- Following is only found available in NXP Kinetis
+  _va32 uint8_t USBCTRL;                // [100] USB Control register,
+  _va32 uint8_t OBSERVE;                // [104] USB OTG Observe register,
+  _va32 uint8_t CONTROL;                // [108] USB OTG Control register,
+  _va32 uint8_t USBTRC0;                // [10C] USB Transceiver Control Register 0,
+  uint32_t reserved_110;                // [110]
+  _va32 uint8_t USBFRMADJUST;           // [114] Frame Adjust Register,
+
+  //----- Following is only found available in NXP MCX
+  uint32_t reserved_118[3];             // [118]
+  _va32 uint8_t KEEP_ALIVE_CTRL;        // [124] Keep Alive Mode Control,
+  _va32 uint8_t KEEP_ALIVE_WKCTRL;      // [128] Keep Alive Mode Wakeup Control,
+  _va32 uint8_t MISCCTRL;               // [12C] Miscellaneous Control,
+  _va32 uint8_t STALL_IL_DIS;           // [130] Peripheral Mode Stall Disable for Endpoints[ 7..0] IN
+  _va32 uint8_t STALL_IH_DIS;           // [134] Peripheral Mode Stall Disable for Endpoints[15..8] IN
+  _va32 uint8_t STALL_OL_DIS;           // [138] Peripheral Mode Stall Disable for Endpoints[ 7..0] OUT
+  _va32 uint8_t STALL_OH_DIS;           // [13C] Peripheral Mode Stall Disable for Endpoints[15..8] OUT
+  _va32 uint8_t CLK_RECOVER_CTRL;       // [140] USB Clock Recovery Control,
+  _va32 uint8_t CLK_RECOVER_IRC_EN;     // [144] FIRC Oscillator Enable,
+  uint32_t reserved_148[3];             // [148]
+  _va32 uint8_t CLK_RECOVER_INT_EN;     // [154] Clock Recovery Combined Interrupt Enable,
+  uint32_t reserved_158;                // [158]
+  _va32 uint8_t CLK_RECOVER_INT_STATUS; // [15C] Clock Recovery Separated Interrupt Status,
+} ci_fs_regs_t;
+
+TU_VERIFY_STATIC(sizeof(ci_fs_regs_t) == 0x160, "Size is not correct");
+
+typedef struct
+{
+  uint32_t reg_base;
+  uint32_t irqnum;
+} ci_fs_controller_t;
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
@@ -0,0 +1,54 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _CI_HS_HPM_H_
+#define _CI_HS_HPM_H_
+
+#include "ci_hs_type.h"
+#include "hpm_soc.h"
+#include "hpm_interrupt.h"
+#include "hpm_usb_drv.h"
+
+static const ci_hs_controller_t _ci_controller[] =
+{
+    { .reg_base = HPM_USB0_BASE, .irqnum = IRQn_USB0},
+    #ifdef HPM_USB1_BASE
+    { .reg_base = HPM_USB1_BASE, .irqnum = IRQn_USB1},
+    #endif
+};
+
+#define CI_HS_REG(_port)        ((ci_hs_regs_t*) _ci_controller[_port].reg_base)
+
+//------------- DCD -------------//
+#define CI_DCD_INT_ENABLE(_p)   intc_m_enable_irq (_ci_controller[_p].irqnum)
+#define CI_DCD_INT_DISABLE(_p)  intc_m_disable_irq(_ci_controller[_p].irqnum)
+
+//------------- HCD -------------//
+#define CI_HCD_INT_ENABLE(_p)   intc_m_enable_irq (_ci_controller[_p].irqnum)
+#define CI_HCD_INT_DISABLE(_p)  intc_m_disable_irq(_ci_controller[_p].irqnum)
+
+
+#endif
@@ -0,0 +1,118 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _CI_HS_IMXRT_H_
+#define _CI_HS_IMXRT_H_
+
+#include "fsl_device_registers.h"
+
+#if !defined(USB1_BASE) && defined(USB_OTG1_BASE)
+#define USB1_BASE USB_OTG1_BASE
+#endif
+
+#if !defined(USB2_BASE) && defined(USB_OTG2_BASE)
+#define USB2_BASE USB_OTG2_BASE
+#endif
+
+// RT1040 calls its only USB USB_OTG (no 1)
+#if defined(MIMXRT1042_SERIES)
+#define USB_OTG1_IRQn USB_OTG_IRQn
+#endif
+
+static const ci_hs_controller_t _ci_controller[] =
+{
+  // RT1010 and RT1020 only has 1 USB controller
+  #if FSL_FEATURE_SOC_USBHS_COUNT == 1
+    { .reg_base = USB_BASE , .irqnum = USB_OTG1_IRQn }
+  #else
+    { .reg_base = USB1_BASE, .irqnum = USB_OTG1_IRQn},
+    { .reg_base = USB2_BASE, .irqnum = USB_OTG2_IRQn}
+  #endif
+};
+
+#define CI_HS_REG(_port)        ((ci_hs_regs_t*) _ci_controller[_port].reg_base)
+
+//------------- DCD -------------//
+#define CI_DCD_INT_ENABLE(_p)   NVIC_EnableIRQ ((IRQn_Type)_ci_controller[_p].irqnum)
+#define CI_DCD_INT_DISABLE(_p)  NVIC_DisableIRQ((IRQn_Type)_ci_controller[_p].irqnum)
+
+//------------- HCD -------------//
+#define CI_HCD_INT_ENABLE(_p)   NVIC_EnableIRQ ((IRQn_Type)_ci_controller[_p].irqnum)
+#define CI_HCD_INT_DISABLE(_p)  NVIC_DisableIRQ((IRQn_Type)_ci_controller[_p].irqnum)
+
+//------------- DCache -------------//
+#if CFG_TUD_MEM_DCACHE_ENABLE || CFG_TUH_MEM_DCACHE_ENABLE
+#if __CORTEX_M == 7
+TU_ATTR_ALWAYS_INLINE static inline uint32_t round_up_to_cache_line_size(uint32_t size) {
+  if (size & (CFG_TUD_MEM_DCACHE_LINE_SIZE-1)) {
+    size = (size & ~(CFG_TUD_MEM_DCACHE_LINE_SIZE-1)) + CFG_TUD_MEM_DCACHE_LINE_SIZE;
+  }
+  return size;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool imxrt_is_cache_mem(uintptr_t addr) {
+  return !(0x20000000 <= addr && addr < 0x20100000);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool imxrt_dcache_clean(void const* addr, uint32_t data_size) {
+  const uintptr_t addr32 = (uintptr_t) addr;
+  if (imxrt_is_cache_mem(addr32)) {
+    TU_ASSERT(tu_is_aligned32(addr32));
+    data_size = round_up_to_cache_line_size(data_size);
+    SCB_CleanDCache_by_Addr((uint32_t *) addr32, (int32_t) data_size);
+  }
+  return true;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool imxrt_dcache_invalidate(void const* addr, uint32_t data_size) {
+  const uintptr_t addr32 = (uintptr_t) addr;
+  if (imxrt_is_cache_mem(addr32)) {
+    // Invalidating does not push cached changes back to RAM so we need to be
+    // *very* careful when we do it. If we're not aligned, then we risk resetting
+    // values back to their RAM state.
+    TU_ASSERT(tu_is_aligned32(addr32));
+    data_size = round_up_to_cache_line_size(data_size);
+    SCB_InvalidateDCache_by_Addr((void*) addr32, (int32_t) data_size);
+  }
+  return true;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool imxrt_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
+  const uintptr_t addr32 = (uintptr_t) addr;
+  if (imxrt_is_cache_mem(addr32)) {
+    TU_ASSERT(tu_is_aligned32(addr32));
+    data_size = round_up_to_cache_line_size(data_size);
+    SCB_CleanInvalidateDCache_by_Addr((uint32_t *) addr32, (int32_t) data_size);
+  }
+  return true;
+}
+
+#elif __CORTEX_M == 4
+#error "Secondary M4 core's cache controller is not supported yet."
+#endif
+#endif
+
+#endif
@@ -0,0 +1,56 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _CI_HS_LPC18_43_H_
+#define _CI_HS_LPC18_43_H_
+
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wunused-parameter"
+#endif
+
+// LPCOpen for 18xx & 43xx
+#include "chip.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
+static const ci_hs_controller_t _ci_controller[] =
+{
+  { .reg_base = LPC_USB0_BASE, .irqnum = USB0_IRQn },
+  { .reg_base = LPC_USB1_BASE, .irqnum = USB1_IRQn }
+};
+
+#define CI_HS_REG(_port)        ((ci_hs_regs_t*) _ci_controller[_port].reg_base)
+
+#define CI_DCD_INT_ENABLE(_p)   NVIC_EnableIRQ (_ci_controller[_p].irqnum)
+#define CI_DCD_INT_DISABLE(_p)  NVIC_DisableIRQ(_ci_controller[_p].irqnum)
+
+#define CI_HCD_INT_ENABLE(_p)   NVIC_EnableIRQ (_ci_controller[_p].irqnum)
+#define CI_HCD_INT_DISABLE(_p)  NVIC_DisableIRQ(_ci_controller[_p].irqnum)
+
+#endif
@@ -0,0 +1,52 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _CI_HS_MCX_H_
+#define _CI_HS_MCX_H_
+
+#include "fsl_device_registers.h"
+
+// NOTE: MCX N9 has 2 different USB Controller
+// - USB0 is KHCI FullSpeed
+// - USB1 is ChipIdea HighSpeed, therefore rhport = 1 is actually index 0
+
+static const ci_hs_controller_t _ci_controller[] = {
+    {.reg_base = USBHS1__USBC_BASE, .irqnum = USB1_HS_IRQn}
+};
+
+TU_ATTR_ALWAYS_INLINE static inline ci_hs_regs_t* CI_HS_REG(uint8_t port) {
+  (void) port;
+  return ((ci_hs_regs_t*) _ci_controller[0].reg_base);
+}
+
+#define CI_DCD_INT_ENABLE(_p)   do { (void) _p; NVIC_EnableIRQ (_ci_controller[0].irqnum); } while (0)
+#define CI_DCD_INT_DISABLE(_p)  do { (void) _p; NVIC_DisableIRQ(_ci_controller[0].irqnum); } while (0)
+
+#define CI_HCD_INT_ENABLE(_p)   NVIC_EnableIRQ (_ci_controller[_p].irqnum)
+#define CI_HCD_INT_DISABLE(_p)  NVIC_DisableIRQ(_ci_controller[_p].irqnum)
+
+
+#endif
@@ -0,0 +1,48 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _CI_HS_RW61X_H_
+#define _CI_HS_RW61X_H_
+
+#include "fsl_device_registers.h"
+
+static const ci_hs_controller_t _ci_controller[] = {
+    {.reg_base = USBOTG_BASE, .irqnum = USB_IRQn}
+};
+
+TU_ATTR_ALWAYS_INLINE static inline ci_hs_regs_t* CI_HS_REG(uint8_t port) {
+  (void) port;
+  return ((ci_hs_regs_t*) _ci_controller[0].reg_base);
+}
+
+#define CI_DCD_INT_ENABLE(_p)   do { (void) _p; NVIC_EnableIRQ (_ci_controller[0].irqnum); } while (0)
+#define CI_DCD_INT_DISABLE(_p)  do { (void) _p; NVIC_DisableIRQ(_ci_controller[0].irqnum); } while (0)
+
+#define CI_HCD_INT_ENABLE(_p)   NVIC_EnableIRQ (_ci_controller[_p].irqnum)
+#define CI_HCD_INT_DISABLE(_p)  NVIC_DisableIRQ(_ci_controller[_p].irqnum)
+
+
+#endif
@@ -0,0 +1,152 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef CI_HS_TYPE_H_
+#define CI_HS_TYPE_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// DCCPARAMS
+enum {
+  DCCPARAMS_DEN_MASK = 0x1Fu, ///< DEN bit 4:0
+};
+
+// USBCMD
+enum {
+  USBCMD_RUN_STOP         = TU_BIT(0),
+  USBCMD_RESET            = TU_BIT(1),
+  USBCMD_SETUP_TRIPWIRE   = TU_BIT(13),
+  USBCMD_ADD_QTD_TRIPWIRE = TU_BIT(14), // This bit is used as a semaphore to ensure the to proper addition of a
+                                        // new dTD to an active (primed) endpoint’s linked list. This bit is set and
+                                        // cleared by software during the process of adding a new dTD
+
+  USBCMD_INTR_THRESHOLD_MASK = 0x00FF0000u, // Interrupt Threshold bit 23:16
+};
+
+// PORTSC1
+#define PORTSC1_PORT_SPEED_POS    26
+
+enum {
+  PORTSC1_CURRENT_CONNECT_STATUS = TU_BIT(0),
+  PORTSC1_FORCE_PORT_RESUME      = TU_BIT(6),
+  PORTSC1_SUSPEND                = TU_BIT(7),
+  PORTSC1_FORCE_FULL_SPEED       = TU_BIT(24),
+  PORTSC1_PORT_SPEED             = TU_BIT(26) | TU_BIT(27)
+};
+
+// OTGSC
+enum {
+  OTGSC_VBUS_DISCHARGE          = TU_BIT(0),
+  OTGSC_VBUS_CHARGE             = TU_BIT(1),
+//  OTGSC_HWASSIST_AUTORESET    = TU_BIT(2),
+  OTGSC_OTG_TERMINATION         = TU_BIT(3), ///< Must set to 1 when OTG go to device mode
+  OTGSC_DATA_PULSING            = TU_BIT(4),
+  OTGSC_ID_PULLUP               = TU_BIT(5),
+//  OTGSC_HWASSIT_DATA_PULSE    = TU_BIT(6),
+//  OTGSC_HWASSIT_BDIS_ACONN    = TU_BIT(7),
+  OTGSC_ID                      = TU_BIT(8), ///< 0 = A device, 1 = B Device
+  OTGSC_A_VBUS_VALID            = TU_BIT(9),
+  OTGSC_A_SESSION_VALID         = TU_BIT(10),
+  OTGSC_B_SESSION_VALID         = TU_BIT(11),
+  OTGSC_B_SESSION_END           = TU_BIT(12),
+  OTGSC_1MS_TOGGLE              = TU_BIT(13),
+  OTGSC_DATA_BUS_PULSING_STATUS = TU_BIT(14),
+};
+
+// USBMode
+enum {
+  USBMOD_CM_MASK    = TU_BIT(0) | TU_BIT(1),
+  USBMODE_CM_DEVICE = 2,
+  USBMODE_CM_HOST   = 3,
+
+  USBMODE_SLOM = TU_BIT(3),
+  USBMODE_SDIS = TU_BIT(4),
+
+  USBMODE_VBUS_POWER_SELECT = TU_BIT(5), // Need to be enabled for LPC18XX/43XX in host mode
+};
+
+// Device Registers
+typedef struct
+{
+  //------------- ID + HW Parameter Registers-------------//
+  volatile uint32_t TU_RESERVED[64]; ///< For iMX RT10xx, but not used by LPC18XX/LPC43XX
+
+  //------------- Capability Registers-------------//
+  volatile uint8_t  CAPLENGTH;       ///< Capability Registers Length
+  volatile uint8_t  TU_RESERVED[1];
+  volatile uint16_t HCIVERSION;      ///< Host Controller Interface Version
+
+  volatile uint32_t HCSPARAMS;       ///< Host Controller Structural Parameters
+  volatile uint32_t HCCPARAMS;       ///< Host Controller Capability Parameters
+  volatile uint32_t TU_RESERVED[5];
+
+  volatile uint16_t DCIVERSION;      ///< Device Controller Interface Version
+  volatile uint8_t  TU_RESERVED[2];
+
+  volatile uint32_t DCCPARAMS;       ///< Device Controller Capability Parameters
+  volatile uint32_t TU_RESERVED[6];
+
+  //------------- Operational Registers -------------//
+  volatile uint32_t USBCMD;          ///< USB Command Register
+  volatile uint32_t USBSTS;          ///< USB Status Register
+  volatile uint32_t USBINTR;         ///< Interrupt Enable Register
+  volatile uint32_t FRINDEX;         ///< USB Frame Index
+  volatile uint32_t TU_RESERVED;
+  volatile uint32_t DEVICEADDR;      ///< Device Address
+  volatile uint32_t ENDPTLISTADDR;   ///< Endpoint List Address
+  volatile uint32_t TU_RESERVED;
+  volatile uint32_t BURSTSIZE;       ///< Programmable Burst Size
+  volatile uint32_t TXFILLTUNING;    ///< TX FIFO Fill Tuning
+           uint32_t TU_RESERVED[4];
+  volatile uint32_t ENDPTNAK;        ///< Endpoint NAK
+  volatile uint32_t ENDPTNAKEN;      ///< Endpoint NAK Enable
+  volatile uint32_t TU_RESERVED;
+  volatile uint32_t PORTSC1;         ///< Port Status & Control
+  volatile uint32_t TU_RESERVED[7];
+  volatile uint32_t OTGSC;           ///< On-The-Go Status & control
+  volatile uint32_t USBMODE;         ///< USB Device Mode
+  volatile uint32_t ENDPTSETUPSTAT;  ///< Endpoint Setup Status
+  volatile uint32_t ENDPTPRIME;      ///< Endpoint Prime
+  volatile uint32_t ENDPTFLUSH;      ///< Endpoint Flush
+  volatile uint32_t ENDPTSTAT;       ///< Endpoint Status
+  volatile uint32_t ENDPTCOMPLETE;   ///< Endpoint Complete
+  volatile uint32_t ENDPTCTRL[8];    ///< Endpoint Control 0 - 7
+} ci_hs_regs_t;
+
+
+typedef struct
+{
+  uint32_t reg_base;
+  uint32_t irqnum;
+}ci_hs_controller_t;
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* CI_HS_TYPE_H_ */
@@ -0,0 +1,461 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_EHCI_H_
+#define TUSB_EHCI_H_
+
+
+/* Abbreviation
+ * HC: Host Controller
+ * HCD: Host Controller Driver
+ * QHD: Queue Head for non-ISO transfer
+ * QTD: Queue Transfer Descriptor for non-ISO transfer
+ * ITD: Iso Transfer Descriptor for highspeed
+ * SITD: Split ISO Transfer Descriptor for full-speed
+ * SMASK: Start Split mask for Slipt Transaction
+ * CMASK: Complete Split mask for Slipt Transaction
+*/
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// EHCI CONFIGURATION & CONSTANTS
+//--------------------------------------------------------------------+
+
+// TODO merge OHCI with EHCI
+enum {
+	EHCI_MAX_ITD  = 4,
+  EHCI_MAX_SITD = 16
+};
+
+//--------------------------------------------------------------------+
+// EHCI Data Structure
+//--------------------------------------------------------------------+
+enum {
+  EHCI_QTYPE_ITD = 0 ,
+  EHCI_QTYPE_QHD     ,
+  EHCI_QTYPE_SITD    ,
+  EHCI_QTYPE_FSTN
+};
+
+/// EHCI PID
+enum {
+  EHCI_PID_OUT = 0 ,
+  EHCI_PID_IN      ,
+  EHCI_PID_SETUP
+};
+
+/// Link pointer
+typedef union {
+  uint32_t address;
+  struct {
+    uint32_t terminate : 1;
+    uint32_t type      : 2;
+  };
+} ehci_link_t;
+
+TU_VERIFY_STATIC( sizeof(ehci_link_t) == 4, "size is not correct" );
+
+/// Queue Element Transfer Descriptor
+/// Qtd is used to declare overlay in ehci_qhd_t -> cannot be declared with TU_ATTR_ALIGNED(32)
+typedef struct {
+  // Word 0 Next QTD Pointer
+  ehci_link_t next;
+
+  // Word 1 Alternate Next QTD Pointer (not used)
+  union {
+    ehci_link_t alternate;
+    struct {
+      uint32_t                : 5;
+      uint32_t used           : 1;
+      uint32_t                : 10;
+      uint32_t expected_bytes : 16;
+    };
+  };
+
+  // Word 2 qTQ Token
+  volatile uint32_t ping_err             : 1;  // For Highspeed: 0 Out, 1 Ping. Full/Slow used as error indicator
+  volatile uint32_t non_hs_split_state   : 1;  // Used by HC to track the state of split transaction
+  volatile uint32_t non_hs_missed_uframe : 1;  // HC misses a complete split transaction
+  volatile uint32_t xact_err             : 1;  // Error (Timeout, CRC, Bad PID ... )
+  volatile uint32_t babble_err           : 1;  // Babble detected, also set Halted bit to 1
+  volatile uint32_t buffer_err           : 1;  // Data overrun/underrun error
+  volatile uint32_t halted               : 1;  // Serious error or STALL received
+  volatile uint32_t active               : 1;  // Start transfer, clear by HC when complete
+
+  uint32_t pid                           : 2;  // 0: OUT, 1: IN, 2 Setup
+  volatile uint32_t err_count            : 2;  // Error Counter of consecutive errors
+  volatile uint32_t current_page         : 3;  // Index into the qTD buffer pointer list
+  uint32_t int_on_complete               : 1;  // Interrupt on complete
+  volatile uint32_t total_bytes          : 15; // Transfer bytes, decreased during transaction
+  volatile uint32_t data_toggle          : 1;  // Data Toggle bit
+
+  // Buffer Page Pointer List, Each element in the list is a 4K page aligned, physical memory address.
+  // The lower 12 bits in each pointer are reserved (except for the first one) as each memory pointer must reference the start of a 4K page
+  uint32_t buffer[5];
+} ehci_qtd_t;
+
+TU_VERIFY_STATIC( sizeof(ehci_qtd_t) == 32, "size is not correct" );
+
+/// Queue Head
+typedef struct TU_ATTR_ALIGNED(32) {
+  // Word 0 Next QHD
+  ehci_link_t next;
+
+  // Word 1 Endpoint Characteristics
+  uint32_t dev_addr              : 7;  // device address
+  uint32_t fl_inactive_next_xact : 1;  // Only valid for Periodic with Full/Slow speed
+  uint32_t ep_number             : 4;  // EP number
+  uint32_t ep_speed              : 2;  // Full (0), Low (1), High (2)
+  uint32_t data_toggle_control   : 1;  // 0 use DT in qHD, 1 use DT in qTD
+  uint32_t head_list_flag        : 1;  // Head of the queue
+  uint32_t max_packet_size       : 11; // Max packet size
+  uint32_t fl_ctrl_ep_flag       : 1;  // 1 if is Full/Low speed control endpoint
+  uint32_t nak_reload            : 4;  // Used by HC
+
+  // Word 2 Endpoint Capabilities
+  uint32_t int_smask             : 8;  // Interrupt Schedule Mask
+  uint32_t fl_int_cmask          : 8;  // Split Completion Mask for Full/Slow speed
+  uint32_t fl_hub_addr           : 7;  // Hub Address for Full/Slow speed
+  uint32_t fl_hub_port           : 7;  // Hub Port for Full/Slow speed
+  uint32_t mult                  : 2;  // Transaction per micro frame
+
+  // Word 3 Current qTD Pointer
+  volatile uint32_t qtd_addr;
+
+  // Word 4-11 Transfer Overlay
+  volatile ehci_qtd_t qtd_overlay;
+
+  //--------------------------------------------------------------------+
+  /// Due to the fact QHD is 32 bytes aligned but occupies only 48 bytes
+  /// thus there are 16 bytes padding free that we can make use of.
+  //--------------------------------------------------------------------+
+  uint8_t used;
+  uint8_t removing;// removed from asyn list, waiting for async advance
+  uint8_t pid;
+  uint8_t interval_ms;// polling interval in frames (or millisecond)
+
+  uint8_t TU_RESERVED[4];
+
+  // Attached TD management, note usbh will only queue 1 TD per QHD.
+  // buffer for dcache invalidate since td's buffer is modified by HC and finding initial buffer address is not trivial
+  uint32_t attached_buffer;
+  ehci_qtd_t *volatile attached_qtd;
+} ehci_qhd_t;
+TU_VERIFY_STATIC( sizeof(ehci_qhd_t) == 64, "size is not correct" );
+
+/// Highspeed Isochronous Transfer Descriptor (section 3.3)
+typedef struct TU_ATTR_ALIGNED(32) {
+  // Word 0: Next Link Pointer
+  ehci_link_t next;
+
+  // Word 1-8: iTD Transaction Status and Control List
+  struct {
+    // iTD Control
+    volatile uint32_t offset      : 12; // offset in bytes, from the beginning of a buffer.
+    volatile uint32_t page_select : 3;  // buffer page pointers the offset field in this slot should be concatenated to produce the starting memory address for this transaction. The valid range of values for this field is 0 to 6
+    uint32_t int_on_complete      : 1;  // If this bit is set to a one, it specifies that when this transaction completes, the Host Controller should issue an interrupt at the next interrupt threshold
+    volatile uint32_t length      : 12; // For an OUT, this field is the number of data bytes the host controller will send during the transaction. The host controller is not required to update this field to reflect the actual number of bytes transferred during the transfer
+                                        // For an IN, the initial value of the field is the number of bytes the host expects the endpoint to deliver. During the status update, the host controller writes back the number of bytes successfully received. The value in this register is the actual byte count
+    // iTD Status
+    volatile uint32_t error       : 1;  // Set to a one by the Host Controller during status update in the case where the host did not receive a valid response from the device (Timeout, CRC, Bad PID, etc.). This bit may only be set for isochronous IN transactions.
+    volatile uint32_t babble_err  : 1;  // Set to a 1 by the Host Controller during status update when a babble is detected during the transaction
+    volatile uint32_t buffer_err  : 1;  // Set to a 1 by the Host Controller during status update to indicate that the Host Controller is unable to keep up with the reception of incoming data (overrun) or is unable to supply data fast enough during transmission (underrun).
+    volatile uint32_t active      : 1;  // Set to 1 by software to enable the execution of an isochronous transaction by the Host Controller
+  } xact[8];
+
+  // Word 9-15  Buffer Page Pointer List (Plus)
+  uint32_t BufferPointer[7];
+
+  // FIXME: Store meta data into buffer pointer reserved for saving memory
+  //---------- HCD Area ----------
+  // uint32_t used;
+  // uint32_t IhdIdx;
+  // uint32_t reserved[6];
+} ehci_itd_t;
+TU_VERIFY_STATIC( sizeof(ehci_itd_t) == 64, "size is not correct" );
+
+/// Split (Full-Speed) Isochronous Transfer Descriptor
+typedef struct TU_ATTR_ALIGNED(32) {
+  // Word 0: Next Link Pointer
+  ehci_link_t next;
+
+  // Word 1: siTD Endpoint Characteristics
+  uint32_t dev_addr    : 7; ///< This field selects the specific device serving as the data source or sink.
+  uint32_t             : 1; ///< reserved
+  uint32_t ep_number   : 4; ///< This 4-bit field selects the particular endpoint number on the device serving as the data source or sink.
+  uint32_t             : 4; ///< This field is reserved and should be set to zero.
+  uint32_t hub_addr    : 7; ///< This field holds the device address of the transaction translators’ hub.
+  uint32_t             : 1; ///< reserved
+  uint32_t port_number : 7; ///< This field is the port number of the recipient transaction translator.
+  uint32_t direction   : 1; ///<  0 = OUT; 1 = IN. This field encodes whether the full-speed transaction should be an IN or OUT.
+
+  // Word 2: Micro-frame Schedule Control
+  uint8_t int_smask   ; ///< This field (along with the Activeand SplitX-statefields in the Statusbyte) are used to determine during which micro-frames the host controller should execute complete-split transactions
+  uint8_t fl_int_cmask; ///< This field (along with the Activeand SplitX-statefields in the Statusbyte) are used to determine during which micro-frames the host controller should execute start-split transactions.
+  uint16_t reserved ; ///< reserved
+
+  // Word 3: siTD Transfer Status and Control
+  // Status [7:0] TODO identical to qTD Token'status --> refactor later
+  volatile uint32_t                 : 1  ; // reserved
+  volatile uint32_t split_state     : 1  ;
+  volatile uint32_t missed_uframe   : 1  ;
+  volatile uint32_t xact_err        : 1  ;
+  volatile uint32_t babble_err      : 1  ;
+  volatile uint32_t buffer_err      : 1  ;
+  volatile uint32_t error           : 1  ;
+  volatile uint32_t active          : 1  ;
+  // Micro-frame Schedule Control
+  volatile uint32_t cmask_progress  : 8  ; ///< This field is used by the host controller to record which split-completes have been executed. See Section 4.12.3.3.2 for behavioral requirements.
+  volatile uint32_t total_bytes     : 10 ; ///< This field is initialized by software to the total number of bytes expected in this transfer. Maximum value is 1023
+  volatile uint32_t                 : 4  ; ///< reserved
+  volatile uint32_t page_select     : 1  ; ///< Used to indicate which data page pointer should be concatenated with the CurrentOffsetfield to construct a data buffer pointer
+           uint32_t int_on_complete : 1  ; ///< Do not interrupt when transaction is complete. 1 = Do interrupt when transaction is complete
+           uint32_t                 : 0  ; // padding to the end of current storage unit
+
+  /// Word 4-5: Buffer Pointer List
+  uint32_t buffer[2];    // buffer[1] TP: Transaction Position - T-Count: Transaction Count
+
+  /*---------- Word 6 ----------*/
+  ehci_link_t back;
+
+  /// SITD is 32-byte aligned but occupies only 28 --> 4 bytes for storing extra data
+  uint8_t used;
+  uint8_t ihd_idx;
+  uint8_t reserved2[2];
+} ehci_sitd_t;
+
+TU_VERIFY_STATIC( sizeof(ehci_sitd_t) == 32, "size is not correct" );
+
+//--------------------------------------------------------------------+
+// EHCI Operational Register
+//--------------------------------------------------------------------+
+enum {
+  // Bit 0-5 has maskable in interrupt enabled register
+  EHCI_INT_MASK_USB                   = TU_BIT(0),
+  EHCI_INT_MASK_ERROR                 = TU_BIT(1),
+  EHCI_INT_MASK_PORT_CHANGE           = TU_BIT(2),
+  EHCI_INT_MASK_FRAMELIST_ROLLOVER    = TU_BIT(3),
+  EHCI_INT_MASK_PCI_HOST_SYSTEM_ERROR = TU_BIT(4),
+  EHCI_INT_MASK_ASYNC_ADVANCE         = TU_BIT(5),
+
+  EHCI_INT_MASK_NXP_SOF               = TU_BIT(7),
+
+  EHCI_INT_MASK_HC_HALTED             = TU_BIT(12),
+  EHCI_INT_MASK_RECLAIMATION          = TU_BIT(13),
+  EHCI_INT_MASK_PERIODIC_SCHED_STATUS = TU_BIT(14),
+  EHCI_INT_MASK_ASYNC_SCHED_STATUS    = TU_BIT(15),
+
+  EHCI_INT_MASK_ALL                   =
+      EHCI_INT_MASK_USB | EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE |
+      EHCI_INT_MASK_FRAMELIST_ROLLOVER | EHCI_INT_MASK_PCI_HOST_SYSTEM_ERROR |
+      EHCI_INT_MASK_ASYNC_ADVANCE | EHCI_INT_MASK_NXP_SOF
+};
+
+enum {
+  EHCI_USBCMD_FRAMELIST_SIZE_SHIFT              = 2, // [2..3]
+  EHCI_USBCMD_CHIPIDEA_FRAMELIST_SIZE_MSB_SHIFT = 15,
+  EHCI_USBCMD_INTERRUPT_THRESHOLD_SHIFT         = 16
+};
+
+enum {
+  EHCI_USBCMD_RUN_STOP                       = TU_BIT(0), // [0..0] 1 = Run, 0 = Stop
+  EHCI_USBCMD_HCRESET                        = TU_BIT(1), // [1..1] SW write 1 to reset HC, clear by HC when complete
+  EHCI_USBCMD_PERIOD_SCHEDULE_ENABLE         = TU_BIT(4), // [4..4] Enable periodic schedule
+  EHCI_USBCMD_ASYNC_SCHEDULE_ENABLE          = TU_BIT(5), // [5..5] Enable async schedule
+  EHCI_USBCMD_INTR_ON_ASYNC_ADVANCE_DOORBELL = TU_BIT(6), // [6..6] Tell HC to interrupt next time it advances async list. Clear by HC
+};
+
+enum {
+  EHCI_PORTSC_MASK_CURRENT_CONNECT_STATUS = TU_BIT(0),
+  EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE  = TU_BIT(1),
+  EHCI_PORTSC_MASK_PORT_EANBLED           = TU_BIT(2),
+  EHCI_PORTSC_MASK_PORT_ENABLE_CHANGE     = TU_BIT(3),
+  EHCI_PORTSC_MASK_OVER_CURRENT_CHANGE    = TU_BIT(5),
+  EHCI_PORTSC_MASK_FORCE_RESUME           = TU_BIT(6),
+  EHCI_PORTSC_MASK_PORT_SUSPEND           = TU_BIT(7),
+  EHCI_PORTSC_MASK_PORT_RESET             = TU_BIT(8),
+  EHCI_PORTSC_MASK_PORT_POWER             = TU_BIT(12),
+
+  EHCI_PORTSC_MASK_W1C =
+    EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE |
+    EHCI_PORTSC_MASK_PORT_ENABLE_CHANGE |
+    EHCI_PORTSC_MASK_OVER_CURRENT_CHANGE
+};
+
+typedef volatile struct {
+  union {
+    uint32_t command; // 0x00
+
+    struct {
+      uint32_t run_stop               : 1 ; ///< 1=Run. 0=Stop
+      uint32_t reset                  : 1 ; ///< SW write 1 to reset HC, clear by HC when complete
+      uint32_t framelist_size         : 2 ; ///< Frame List size 0: 1024, 1: 512, 2: 256
+      uint32_t periodic_enable        : 1 ; ///< This bit controls whether the host controller skips processing the Periodic Schedule. Values mean: 0b Do not process the Periodic Schedule 1b Use the PERIODICLISTBASE register to access the Periodic Schedule.
+      uint32_t async_enable           : 1 ; ///< This bit controls whether the host controller skips processing the Asynchronous Schedule. Values mean: 0b Do not process the Asynchronous Schedule 1b Use the ASYNCLISTADDR register to access the Asynchronous Schedule.
+      uint32_t async_adv_doorbell     : 1 ; ///< Tell HC to interrupt next time it advances async list. Clear by HC
+      uint32_t light_reset            : 1 ; ///< Reset HC without affecting ports state
+      uint32_t async_park_count       : 2 ; ///< not used by tinyusb
+      uint32_t                        : 1 ;
+      uint32_t async_park_enable      : 1 ; ///< Enable park mode, not used by tinyusb
+      uint32_t                        : 3 ;
+      uint32_t nxp_framelist_size_msb : 1 ; ///< NXP customized : Bit 2 of the Frame List Size bits \n 011b: 128 elements \n 100b: 64 elements \n 101b: 32 elements \n 110b: 16 elements \n 111b: 8 elements
+      uint32_t int_threshold          : 8 ; ///< Default 08h. Interrupt rate in unit of micro frame
+    }command_bm;
+  };
+
+  union {
+    uint32_t status; // 0x04
+
+    struct {
+      uint32_t usb                   : 1  ; ///< qTD with IOC is retired
+      uint32_t usb_error             : 1  ; ///< qTD retired due to error
+      uint32_t port_change_detect    : 1  ; ///< Set when PortOwner or ForcePortResume change from 0 -> 1
+      uint32_t framelist_rollover    : 1  ; ///< R/WC The Host Controller sets this bit to a one when the Frame List Index(see Section 2.3.4) rolls over from its maximum value to zero. The exact value at which the rollover occurs depends on the frame list size. For example, if the frame list size (as programmed in the Frame List Sizefield of the USBCMD register) is 1024, the Frame Index Registerrolls over every time FRINDEX[13] toggles. Similarly, if the size is 512, the Host Controller sets this bit to a one every time FRINDEX[12] toggles.
+      uint32_t pci_host_system_error : 1  ; ///< R/WC (not used by NXP) The Host Controller sets this bit to 1 when a serious error occurs during a host system access involving the Host Controller module. In a PCI system, conditions that set this bit to 1 include PCI Parity error, PCI Master Abort, and PCI Target Abort. When this error occurs, the Host Controller clears the Run/Stop bit in the Command register to prevent further execution of the scheduled TDs.
+      uint32_t async_adv             : 1  ; ///< Async Advance interrupt
+      uint32_t                       : 1  ;
+      uint32_t nxp_int_sof           : 1  ; ///< NXP customized:  this bit will be set every 125us and can be used by host controller driver as a time base.
+      uint32_t                       : 4  ;
+      uint32_t hc_halted             : 1  ; ///< Opposite value to run_stop bit.
+      uint32_t reclamation           : 1  ; ///< Used to detect empty async shecudle
+      uint32_t periodic_status       : 1  ; ///< Periodic schedule status
+      uint32_t async_status          : 1  ; ///< Async schedule status
+      uint32_t                       : 2  ;
+      uint32_t nxp_int_async         : 1  ; ///< NXP customized: This bit is set by the Host Controller when the cause of an interrupt is a completion of a USB transaction where the Transfer Descriptor (TD) has an interrupt on complete (IOC) bit set and the TD was from the asynchronous schedule. This bit is also set by the Host when a short packet is detected and the packet is on the asynchronous schedule.
+      uint32_t nxp_int_period        : 1  ; ///< NXP customized: This bit is set by the Host Controller when the cause of an interrupt is a completion of a USB transaction where the Transfer Descriptor (TD) has an interrupt on complete (IOC) bit set and the TD was from the periodic schedule.
+      uint32_t                       : 12 ;
+    }status_bm;
+  };
+
+  union{
+    uint32_t inten; // 0x08
+
+    struct {
+      uint32_t usb                   : 1  ;
+      uint32_t usb_error             : 1  ;
+      uint32_t port_change_detect    : 1  ;
+      uint32_t framelist_rollover    : 1  ;
+      uint32_t pci_host_system_error : 1  ;
+      uint32_t async_adv             : 1  ;
+      uint32_t                       : 1  ;
+      uint32_t nxp_int_sof           : 1  ;
+      uint32_t                       : 10 ;
+      uint32_t nxp_int_async         : 1  ;
+      uint32_t nxp_int_period        : 1  ;
+      uint32_t                       : 12 ;
+    }inten_bm;
+  };
+
+  uint32_t frame_index        ; ///< 0x0C Micro frame counter
+  uint32_t ctrl_ds_seg        ; ///< 0x10 Control Data Structure Segment
+  uint32_t periodic_list_base ; ///< 0x14 Beginning address of perodic frame list
+  uint32_t async_list_addr    ; ///< 0x18 Address of next async QHD to be executed
+  uint32_t nxp_tt_control     ; ///< nxp embedded transaction translator (reserved by EHCI specs)
+  uint32_t reserved[8]        ;
+  uint32_t config_flag        ; ///< 0x40 not used by NXP
+
+  union {
+    // mixed with RW and R/WC bits, care should be taken when writing to this register
+    uint32_t portsc           ; ///< 0x44 port status and control
+    const struct {
+      uint32_t current_connect_status      : 1; ///< 00: 0: No device, 1: Device is present on port
+      uint32_t connect_status_change       : 1; ///< 01: [R/WC] Change in Current Connect Status
+      uint32_t port_enabled                : 1; ///< 02: Ports can only be enabled by HC as a part of the reset and enable. SW can write 0 to disable
+      uint32_t port_enable_change          : 1; ///< 03: [R/WC] Port Enabled has changed
+      uint32_t over_current_active         : 1; ///< 04: Port has an over-current condition
+      uint32_t over_current_change         : 1; ///< 05: [R/WC] Change to Over-current Active
+      uint32_t force_port_resume           : 1; ///< 06: Resume detected/driven on port. This functionality defined for manipulating this bit depends on the value of the Suspend bit.
+      uint32_t suspend                     : 1; ///< 07: Port in suspend state
+      uint32_t port_reset                  : 1; ///< 08: 1=Port is in Reset. 0=Port is not in Reset
+      uint32_t nxp_highspeed_status        : 1; ///< 09: NXP customized: 0=connected to the port is not in High-speed mode, 1=connected to the port is in High-speed mode
+      uint32_t line_status                 : 2; ///< 10-11: D+/D- state: 00: SE0, 10: J-state, 01: K-state
+      uint32_t port_power                  : 1; ///< 12: 0= power off, 1= power on
+      uint32_t port_owner                  : 1; ///< 13: not used by NXP
+      uint32_t port_indicator_control      : 2; ///< 14-15: 00b: off, 01b: Amber, 10b: green, 11b: undefined
+      uint32_t port_test_control           : 4; ///< 16-19: Port test mode, not used by tinyusb
+      uint32_t wake_on_connect_enable      : 1; ///< 20: Enables device connects as wake-up events
+      uint32_t wake_on_disconnect_enable   : 1; ///< 21: Enables device disconnects as wake-up events
+      uint32_t wake_on_over_current_enable : 1; ///< 22: Enables over-current conditions as wake-up events
+      uint32_t nxp_phy_clock_disable       : 1; ///< 23: NXP customized: the PHY can be put into Low Power Suspend – Clock Disable when the downstream device has been put into suspend mode or when no downstream device is connected. Low power suspend is completely under the control of software. 0: enable PHY clock, 1: disable PHY clock
+      uint32_t nxp_port_force_fullspeed    : 1; ///< 24: NXP customized: Writing this bit to a 1 will force the port to only connect at Full Speed. It disables the chirp sequence that allowsthe port to identify itself as High Speed. This is useful for testing FS configurations with a HS host, hub or device.
+      uint32_t TU_RESERVED                 : 1; ///< 25
+      uint32_t nxp_port_speed              : 2; ///< 26-27: NXP customized: This register field indicates the speed atwhich the port is operating. For HS mode operation in the host controllerand HS/FS operation in the device controller the port routing steers data to the Protocol engine. For FS and LS mode operation in the host controller, the port routing steers data to the Protocol Engine w/ Embedded Transaction Translator. 0x0: Fullspeed, 0x1: Lowspeed, 0x2: Highspeed
+      uint32_t TU_RESERVED                 : 4;
+    }portsc_bm;
+  };
+} ehci_registers_t;
+
+//--------------------------------------------------------------------+
+// Capability Registers
+//--------------------------------------------------------------------+
+typedef volatile struct {
+  uint8_t caplength;   // 0x00
+  uint8_t TU_RESERVED; // 0x01
+  uint16_t hciversion; // 0x02
+
+  union {
+    uint32_t hcsparams; // 0x04
+    struct {
+      uint32_t num_ports          : 4; // [00:03]
+      uint32_t port_power_control : 1; // [04]
+      uint32_t TU_RESERVED        : 2; // [05:06]
+      uint32_t port_route_rule    : 1; // [07]
+      uint32_t n_pcc              : 4; // [08:11] Number of Ports per Companion Controller
+      uint32_t n_cc               : 4; // [12:15] Number of Companion Controllers
+      uint32_t port_ind           : 1; // [16] Port Indicators
+      uint32_t TU_RESERVED        : 3; // [17:19]
+      uint32_t n_ptt              : 4; // [20:23] ChipIdea: Number of Ports per Transaction Translator
+      uint32_t n_tt               : 4; // [24:27] ChipIdea: Number of Transaction Translators
+      uint32_t TU_RESERVED        : 4; // [28:31]
+    } hcsparams_bm;
+  };
+
+  union {
+    uint32_t hccparams; // 0x08
+    struct {
+      uint32_t addr_64bit                   : 1; // [00] 64-bit Addressing Capability
+      uint32_t programmable_frame_list_flag : 1; // [01] Programmable Frame List Flag
+      uint32_t async_park_cap               : 1; // [02] Asynchronous Schedule Park Capability
+      uint32_t TU_RESERVED                  : 1; // [03]
+      uint32_t iso_schedule_threshold       : 4; // [4:7] Isochronous Scheduling Threshold
+      uint32_t eecp                         : 8; // [8:15] EHCI Extended Capabilities Pointer
+      uint32_t TU_RESERVED                  : 16;// [16:31]
+    } hccparams_bm;
+  };
+
+  uint32_t hcsp_portroute; // 0x0C HCSP Port Route Register
+} ehci_cap_registers_t;
+
+TU_VERIFY_STATIC(sizeof(ehci_cap_registers_t) == 16, "size is not correct");
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* TUSB_EHCI_H_ */
@@ -0,0 +1,45 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_EHCI_API_H_
+#define TUSB_EHCI_API_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// API Implemented by EHCI
+//--------------------------------------------------------------------+
+
+// Initialize EHCI driver
+bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
@@ -0,0 +1,160 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024, Brent Kowal (Analog Devices, Inc)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_MUSB_MAX32_H_
+#define TUSB_MUSB_MAX32_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wredundant-decls"
+#endif
+
+#include "mxc_device.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
+#include "usbhs_regs.h"
+
+#define MUSB_CFG_SHARED_FIFO   1 // shared FIFO for TX and RX endpoints
+#define MUSB_CFG_DYNAMIC_FIFO  0 // dynamic EP FIFO sizing
+
+const uintptr_t MUSB_BASES[] = { MXC_BASE_USBHS };
+
+#if CFG_TUD_ENABLED
+#define USBHS_M31_CLOCK_RECOVERY
+
+// Mapping of IRQ numbers to port. Currently just 1.
+static const IRQn_Type musb_irqs[] = {
+    USB_IRQn
+};
+
+TU_ATTR_ALWAYS_INLINE static inline void musb_dcd_int_enable(uint8_t rhport) {
+  NVIC_EnableIRQ(musb_irqs[rhport]);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void musb_dcd_int_disable(uint8_t rhport) {
+  NVIC_DisableIRQ(musb_irqs[rhport]);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline unsigned musb_dcd_get_int_enable(uint8_t rhport) {
+  #ifdef NVIC_GetEnableIRQ // only defined in CMSIS 5
+  return NVIC_GetEnableIRQ(musb_irqs[rhport]);
+  #else
+  uint32_t IRQn = (uint32_t) musb_irqs[rhport];
+  return ((NVIC->ISER[IRQn >> 5UL] & (1UL << (IRQn & 0x1FUL))) != 0UL) ? 1UL : 0UL;
+  #endif
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void musb_dcd_int_clear(uint8_t rhport) {
+  NVIC_ClearPendingIRQ(musb_irqs[rhport]);
+}
+
+static inline void musb_dcd_int_handler_enter(uint8_t rhport) {
+  mxc_usbhs_regs_t* hs_phy = MXC_USBHS;
+  uint32_t mxm_int, mxm_int_en, mxm_is;
+
+  //Handle PHY specific events
+  mxm_int = hs_phy->mxm_int;
+  mxm_int_en = hs_phy->mxm_int_en;
+  mxm_is = mxm_int & mxm_int_en;
+  hs_phy->mxm_int = mxm_is;
+
+  if (mxm_is & MXC_F_USBHS_MXM_INT_NOVBUS) {
+    dcd_event_bus_signal(rhport, DCD_EVENT_UNPLUGGED, true);
+  }
+}
+
+static inline void musb_dcd_phy_init(uint8_t rhport) {
+  (void) rhport;
+  mxc_usbhs_regs_t* hs_phy = MXC_USBHS;
+
+  // Interrupt for VBUS disconnect
+  hs_phy->mxm_int_en |= MXC_F_USBHS_MXM_INT_EN_NOVBUS;
+
+  musb_dcd_int_clear(rhport);
+
+  // Unsuspend the MAC
+  hs_phy->mxm_suspend = 0;
+
+  // Configure PHY
+  hs_phy->m31_phy_xcfgi_31_0 = (0x1 << 3) | (0x1 << 11);
+  hs_phy->m31_phy_xcfgi_63_32 = 0;
+  hs_phy->m31_phy_xcfgi_95_64 = 0x1 << (72 - 64);
+  hs_phy->m31_phy_xcfgi_127_96 = 0;
+
+  #ifdef USBHS_M31_CLOCK_RECOVERY
+  hs_phy->m31_phy_noncry_rstb = 1;
+  hs_phy->m31_phy_noncry_en = 1;
+  hs_phy->m31_phy_outclksel = 0;
+  hs_phy->m31_phy_coreclkin = 0;
+  hs_phy->m31_phy_xtlsel = 2; /* Select 25 MHz clock */
+  #else
+  hs_phy->m31_phy_noncry_rstb = 0;
+  hs_phy->m31_phy_noncry_en = 0;
+  hs_phy->m31_phy_outclksel = 1;
+  hs_phy->m31_phy_coreclkin = 1;
+  hs_phy->m31_phy_xtlsel = 3; /* Select 30 MHz clock */
+  #endif
+  hs_phy->m31_phy_pll_en = 1;
+  hs_phy->m31_phy_oscouten = 1;
+
+  /* Reset PHY */
+  hs_phy->m31_phy_ponrst = 0;
+  hs_phy->m31_phy_ponrst = 1;
+}
+
+// static inline void musb_dcd_setup_fifo(uint8_t rhport, unsigned epnum, unsigned dir_in, unsigned mps) {
+//   (void) mps;
+//
+//   //Most likely the caller has already grabbed the right register block. But
+//   //as a precaution save and restore the register bank anyways
+//   unsigned saved_index = musb_periph_inst[rhport]->index;
+//
+//   musb_periph_inst[rhport]->index = epnum;
+//
+//   //Disable double buffering
+//   if (dir_in) {
+//     musb_periph_inst[rhport]->incsru |= (MXC_F_USBHS_INCSRU_DPKTBUFDIS | MXC_F_USBHS_INCSRU_MODE);
+//   } else {
+//     musb_periph_inst[rhport]->outcsru |= (MXC_F_USBHS_OUTCSRU_DPKTBUFDIS);
+//   }
+//
+//   musb_periph_inst[rhport]->index = saved_index;
+// }
+
+#endif // CFG_TUD_ENABLED
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // TUSB_MUSB_MAX32_H_
@@ -0,0 +1,94 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024, Brent Kowal (Analog Devices, Inc)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_MUSB_TI_H_
+#define TUSB_MUSB_TI_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#if CFG_TUSB_MCU == OPT_MCU_TM4C123
+  #include "TM4C123.h"
+  #define FIFO0_WORD FIFO0
+  #define FIFO1_WORD FIFO1
+#elif CFG_TUSB_MCU == OPT_MCU_TM4C129
+  #include "TM4C129.h"
+  #define FIFO0_WORD FIFOA
+  #define FIFO1_WORD FIFOB
+#elif CFG_TUSB_MCU == OPT_MCU_MSP432E4
+  #include "msp.h"
+#else
+  #error "Unsupported MCUs"
+#endif
+
+#define MUSB_CFG_SHARED_FIFO       0
+#define MUSB_CFG_DYNAMIC_FIFO      1
+#define MUSB_CFG_DYNAMIC_FIFO_SIZE 4096
+
+const uintptr_t MUSB_BASES[] = { USB0_BASE };
+
+// Header supports both device and host modes. Only include what's necessary
+#if CFG_TUD_ENABLED
+
+// Mapping of IRQ numbers to port. Currently just 1.
+static const IRQn_Type  musb_irqs[] = {
+    USB0_IRQn
+};
+
+static inline void musb_dcd_phy_init(uint8_t rhport){
+  (void)rhport;
+  //Nothing to do for this part
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void musb_dcd_int_enable(uint8_t rhport) {
+  NVIC_EnableIRQ(musb_irqs[rhport]);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void musb_dcd_int_disable(uint8_t rhport) {
+  NVIC_DisableIRQ(musb_irqs[rhport]);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline unsigned musb_dcd_get_int_enable(uint8_t rhport) {
+  return NVIC_GetEnableIRQ(musb_irqs[rhport]);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void musb_dcd_int_clear(uint8_t rhport) {
+  NVIC_ClearPendingIRQ(musb_irqs[rhport]);
+}
+
+static inline void musb_dcd_int_handler_enter(uint8_t rhport) {
+  (void)rhport;
+  //Nothing to do for this part
+}
+
+#endif // CFG_TUD_ENABLED
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif // TUSB_MUSB_TI_H_
@@ -0,0 +1,756 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/******************************************************************************
+*
+* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+*  Redistributions of source code must retain the above copyright
+*  notice, this list of conditions and the following disclaimer.
+*
+*  Redistributions in binary form must reproduce the above copyright
+*  notice, this list of conditions and the following disclaimer in the
+*  documentation and/or other materials provided with the
+*  distribution.
+*
+*  Neither the name of Texas Instruments Incorporated nor the names of
+*  its contributors may be used to endorse or promote products derived
+*  from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+*******************************************************************************/
+
+#ifndef TUSB_MUSB_TYPE_H_
+#define TUSB_MUSB_TYPE_H_
+
+#include "stdint.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#ifndef __IO
+  #define __IO volatile
+#endif
+
+#ifndef __I
+  #define __I  volatile const
+#endif
+
+#ifndef __O
+  #define __O  volatile
+#endif
+
+#ifndef __R
+  #define __R  volatile const
+#endif
+
+typedef struct TU_ATTR_PACKED {
+  __IO uint16_t maxp;          // 0x00, 0x04: MAXP
+  __IO uint8_t  csrl;          // 0x02, 0x06: CSRL
+  __IO uint8_t  csrh;          // 0x03, 0x07: CSRH
+}musb_ep_maxp_csr_t;
+
+// 0: TX (device IN, host OUT)
+// 1: RX (device OUT, host IN)
+typedef struct TU_ATTR_PACKED {
+  union {
+    struct {
+      __IO uint16_t tx_maxp;       // 0x00: TXMAXP
+      union {
+        __IO uint8_t csr0l;        // 0x02: CSR0
+        __IO uint8_t tx_csrl;      // 0x02: TX CSRL
+      };
+      union {
+        __IO uint8_t csr0h;        // 0x03: CSR0H
+        __IO uint8_t tx_csrh;      // 0x03: TX CSRH
+      };
+
+      __IO uint16_t rx_maxp;       // 0x04: RX MAXP
+      __IO uint8_t  rx_csrl;       // 0x06: RX CSRL
+      __IO uint8_t  rx_csrh;       // 0x07: RX CSRH
+    };
+
+    musb_ep_maxp_csr_t maxp_csr[2];
+  };
+
+  union {
+    __IO uint16_t count0;      // 0x08: COUNT0
+    __IO uint16_t rx_count;    // 0x08: RX COUNT
+  };
+  union {
+    __IO uint8_t type0;        // 0x0A: TYPE0 (host only)
+    __IO uint8_t tx_type;      // 0x0A: TX TYPE
+  };
+  __IO uint8_t tx_interval;    // 0x0B: TX INTERVAL
+  __IO uint8_t rx_type;        // 0x0C: RX TYPE
+  __IO uint8_t rx_interval;    // 0x0D: RX INTERVAL
+  __IO uint8_t reserved_0x0e;  // 0x0E: Reserved
+  union {
+    __IO uint8_t config_data0; // 0x0F: CONFIG DATA
+    struct {
+      __IO uint8_t utmi_data_width : 1; // [0] UTMI Data Width
+      __IO uint8_t softconn_en     : 1; // [1] Soft Connect Enable
+      __IO uint8_t dynamic_fifo    : 1; // [2] Dynamic FIFO Sizing
+      __IO uint8_t hb_tx_en        : 1; // [3] High Bandwidth TX ISO Enable
+      __IO uint8_t hb_rx_en        : 1; // [4] High Bandwidth RX ISO Enable
+      __IO uint8_t big_endian      : 1; // [5] Big Endian
+      __IO uint8_t mp_tx_en        : 1; // [6] Auto splitting BULK TX Enable
+      __IO uint8_t mp_rx_en        : 1; // [7] Auto amalgamation BULK RX Enable
+    } config_data0_bit;
+
+    __IO uint8_t fifo_size;    // 0x0F: FIFO_SIZE
+    struct {
+      __IO uint8_t tx : 4;  // [3:0] TX FIFO Size
+      __IO uint8_t rx : 4;  // [7:4] RX FIFO Size
+    }fifo_size_bit;
+  };
+} musb_ep_csr_t;
+
+TU_VERIFY_STATIC(sizeof(musb_ep_csr_t) == 16, "size is not correct");
+
+typedef struct {
+  //------------- Common -------------//
+  __IO uint8_t  faddr;             // 0x00: FADDR
+  union {
+    __IO uint8_t  power;             // 0x01: POWER
+    struct {
+      __IO uint8_t suspend_mode_en : 1; // [0] SUSPEND Mode Enable
+      __IO uint8_t suspend_mode    : 1; // [1] SUSPEND Mode
+      __IO uint8_t resume_mode     : 1; // [2] RESUME
+      __IO uint8_t reset           : 1; // [3] RESET
+      __IO uint8_t highspeed_mode  : 1; // [4] High Speed Mode
+      __IO uint8_t highspeed_en    : 1; // [5] High Speed Enable
+      __IO uint8_t soft_conn       : 1; // [6] Soft Connect/Disconnect
+      __IO uint8_t iso_update      : 1; // [7] Isochronous Update
+    } power_bit;
+  };
+
+  union {
+    struct {
+      __IO uint16_t intr_tx;           // 0x02: INTR_TX
+      __IO uint16_t intr_rx;           // 0x04: INTR_RX
+    };
+
+    __IO uint16_t intr_ep[2];         // 0x02-0x05: INTR_EP0-1
+  };
+
+  union {
+    struct {
+      __IO uint16_t intr_txen;         // 0x06: INTR_TXEN
+      __IO uint16_t intr_rxen;         // 0x08: INTR_RXEN
+    };
+
+    __IO uint16_t intren_ep[2];       // 0x06-0x09: INTREN_EP0-1
+  };
+
+  __IO uint8_t  intr_usb;          // 0x0A: INTRUSB
+  __IO uint8_t  intr_usben;        // 0x0B: INTRUSBEN
+
+  __IO uint16_t frame;             // 0x0C: FRAME
+  __IO uint8_t  index;             // 0x0E: INDEX
+  __IO uint8_t  testmode;          // 0x0F: TESTMODE
+
+  //------------- Endpoint CSR (indexed) -------------//
+  musb_ep_csr_t indexed_csr;       // 0x10-0x1F: Indexed CSR 0-15
+
+  //------------- FIFOs -------------//
+  __IO uint32_t fifo[16];          // 0x20-0x5C: FIFO 0-15
+
+  // Common (2)
+  __IO uint8_t  devctl;            // 0x60: DEVCTL
+  __IO uint8_t  misc;              // 0x61: MISC
+
+  //------------- Dynammic FIFO (indexed) -------------//
+  union {
+    struct {
+      __IO uint8_t  txfifo_sz;         // 0x62: TXFIFO_SZ
+      __IO uint8_t  rxfifo_sz;         // 0x63: RXFIFO_SZ
+    };
+    __IO uint8_t fifo_size[2];
+  };
+
+  union {
+    struct {
+      __IO uint16_t txfifo_addr;       // 0x64: TXFIFO_ADDR
+      __IO uint16_t rxfifo_addr;       // 0x66: RXFIFO_ADDR
+    };
+    __IO uint16_t fifo_addr[2];
+  };
+
+  //------------- Additional Control and Configuration -------------//
+  union {
+    __O  uint32_t vcontrol;        // 0x68: PHY VCONTROL
+    __IO uint32_t vstatus;         // 0x68: PHY VSTATUS
+  };
+  union {
+    __IO uint16_t hwvers;            // 0x6C: HWVERS
+    struct {
+      __IO uint16_t minor : 10;     // [9:0] Minor
+      __IO uint16_t major : 5;      // [14:10] Major
+      __IO uint16_t rc    : 1;      // [15] Release Candidate
+    } hwvers_bit;
+  };
+  __R  uint16_t rsv_0x6e_0x77[5];  // 0x6E-0x77: Reserved
+
+   //------------- Additional Configuration -------------//
+  union {
+    __IO uint8_t  epinfo;            // 0x78: EPINFO
+    struct {
+      __IO uint8_t tx_ep_num : 4;    // [3:0] TX Endpoints
+      __IO uint8_t rx_ep_num : 4;    // [7:4] RX Endpoints
+    } epinfo_bit;
+  };
+  union {
+    __IO uint8_t  raminfo;           // 0x79: RAMINFO
+    struct {
+      __IO uint8_t ram_bits    : 4;  // [3:0] RAM Address Bus Width
+      __IO uint8_t dma_channel : 4;  // [7:4] DMA Channels
+    }raminfo_bit;
+  };
+  union {
+    __IO uint8_t  link_info;       // 0x7A: LINK_INFO
+    __IO uint8_t  adi_softreset;   // 0x7A: AnalogDevice SOFTRESET
+  };
+  __IO uint8_t  vplen;             // 0x7B: VPLEN
+  __IO uint8_t  hs_eof1;           // 0x7C: HS_EOF1
+  __IO uint8_t  fs_eof1;           // 0x7D: FS_EOF1
+  __IO uint8_t  ls_eof1;           // 0x7E: LS_EOF1
+  __IO uint8_t  soft_rst;          // 0x7F: SOFT_RST
+
+  //------------- Target Endpoints (multipoint option) -------------//
+  __IO uint16_t ctuch;             // 0x80: CTUCH
+  __IO uint16_t cthsrtn;           // 0x82: CTHSRTN
+  __R  uint32_t rsv_0x84_0xff[31]; // 0x84-0xFF: Reserved
+
+  //------------- Non-Indexed Endpoint CSRs -------------//
+  // TI tm4c can access this directly, but should use indexed_csr for portability
+  musb_ep_csr_t abs_csr[16];        // 0x100-0x1FF: EP0-15 CSR
+
+  //------------- DMA -------------//
+  __IO uint8_t dma_intr;             // 0x200: DMA_INTR
+  __R  uint8_t rsv_0x201_0x203[3];   // 0x201-0x203: Reserved
+  struct {
+    __IO uint16_t cntl;             // 0x204: DMA_CNTL
+    __IO uint16_t rsv_0x206;        // 0x206: Reserved
+    __IO uint32_t addr;             // 0x208: DMA_ADDR
+    __IO uint32_t count;            // 0x20C: DMA_COUNT
+    __IO uint32_t rsv_0x210;        // 0x210: Reserved
+  }dma[8];
+  __R  uint32_t rsv_0x284_0x2FF[31]; // 0x284-0x2FF: Reserved
+
+  //------------- Extended -------------//
+  __R uint32_t rsv_0x300;           // 0x300: Reserved
+  struct {
+    __IO uint16_t count;            // 0x304: REQ_PACKET_COUNT
+    __R  uint16_t rsv_0x306;        // 0x306: Reserved
+  }req_packet[15];
+
+  __IO uint16_t rx_doulbe_packet_disable; // 0x340: RX_DOUBLE_PACKET_DISABLE
+  __IO uint16_t tx_double_packet_disable; // 0x342: TX_DOUBLE_PACKET_DISABLE
+
+  __IO uint16_t chirp_timeout;            // 0x344: CHIRP_TIMEOUT
+  __IO uint16_t hs_to_utm;                // 0x346: HS_TO_UTM delay
+  __IO uint16_t hs_timeout_adder;         // 0x348: HS_TIMEOUT_ADDER
+
+  __R uint8_t rsv_34A_34f[6];             // 0x34A-0x34F: Reserved
+} musb_regs_t;
+
+TU_VERIFY_STATIC(sizeof(musb_regs_t) == 0x350, "size is not correct");
+
+//--------------------------------------------------------------------+
+// Helper
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_regs, unsigned epnum) {
+  musb_regs->index = epnum;
+  return &musb_regs->indexed_csr;
+}
+
+//--------------------------------------------------------------------+
+// Register Bit Field
+//--------------------------------------------------------------------+
+
+// 0x01: Power
+#define MUSB_POWER_ISOUP         0x0080  // Isochronous Update
+#define MUSB_POWER_SOFTCONN      0x0040  // Soft Connect/Disconnect
+#define MUSB_POWER_HSENAB        0x0020  // High Speed Enable
+#define MUSB_POWER_HSMODE        0x0010  // High Speed Enable
+#define MUSB_POWER_RESET         0x0008  // RESET Signaling
+#define MUSB_POWER_RESUME        0x0004  // RESUME Signaling
+#define MUSB_POWER_SUSPEND       0x0002  // SUSPEND Mode
+#define MUSB_POWER_PWRDNPHY      0x0001  // Power Down PHY
+
+// Interrupt TX/RX Status and Enable: each bit is for an endpoint
+
+// 0x6c: HWVERS
+#define MUSB_HWVERS_RC_SHIFT    15
+#define MUSB_HWVERS_RC_MASK     0x8000
+#define MUSB_HWVERS_MAJOR_SHIFT 10
+#define MUSB_HWVERS_MAJOR_MASK  0x7C00
+#define MUSB_HWVERS_MINOR_SHIFT 0
+#define MUSB_HWVERS_MINOR_MASK  0x03FF
+
+// 0x12, 0x16: TX/RX CSRL
+#define MUSB_CSRL_PACKET_READY(_rx)      (1u << 0)
+#define MUSB_CSRL_FLUSH_FIFO(_rx)        (1u << ((_rx) ? 4 : 3))
+#define MUSB_CSRL_SEND_STALL(_rx)        (1u << ((_rx) ? 5 : 4))
+#define MUSB_CSRL_STALLED(_rx)           (1u << ((_rx) ? 6 : 5))
+#define MUSB_CSRL_CLEAR_DATA_TOGGLE(_rx) (1u << ((_rx) ? 7 : 6))
+
+// 0x13, 0x17: TX/RX CSRH
+#define MUSB_CSRH_DISABLE_DOUBLE_PACKET(_rx) (1u << 1)
+#define MUSB_CSRH_TX_MODE                    (1u << 5) // 1 = TX, 0 = RX. only relevant for SHARED FIFO
+#define MUSB_CSRH_ISO                        (1u << 6)
+
+// 0x62, 0x63: TXFIFO_SZ, RXFIFO_SZ
+#define MUSB_FIFOSZ_DOUBLE_PACKET            (1u << 4)
+
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_IS register.
+//
+//*****************************************************************************
+#define MUSB_IS_VBUSERR          0x0080  // VBUS Error (OTG only)
+#define MUSB_IS_SESREQ           0x0040  // SESSION REQUEST (OTG only)
+#define MUSB_IS_DISCON           0x0020  // Session Disconnect (OTG only)
+#define MUSB_IS_CONN             0x0010  // Session Connect
+#define MUSB_IS_SOF              0x0008  // Start of Frame
+#define MUSB_IS_BABBLE           0x0004  // Babble Detected
+#define MUSB_IS_RESET            0x0004  // RESET Signaling Detected
+#define MUSB_IS_RESUME           0x0002  // RESUME Signaling Detected
+#define MUSB_IS_SUSPEND          0x0001  // SUSPEND Signaling Detected
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_IE register.
+//
+//*****************************************************************************
+#define MUSB_IE_VBUSERR          0x0080  // Enable VBUS Error Interrupt (OTG only)
+#define MUSB_IE_SESREQ           0x0040  // Enable Session Request (OTG only)
+#define MUSB_IE_DISCON           0x0020  // Enable Disconnect Interrupt
+#define MUSB_IE_CONN             0x0010  // Enable Connect Interrupt
+#define MUSB_IE_SOF              0x0008  // Enable Start-of-Frame Interrupt
+#define MUSB_IE_BABBLE           0x0004  // Enable Babble Interrupt
+#define MUSB_IE_RESET            0x0004  // Enable RESET Interrupt
+#define MUSB_IE_RESUME           0x0002  // Enable RESUME Interrupt
+#define MUSB_IE_SUSPND           0x0001  // Enable SUSPEND Interrupt
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_FRAME register.
+//
+//*****************************************************************************
+#define MUSB_FRAME_M             0x07FF  // Frame Number
+#define MUSB_FRAME_S             0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_TEST register.
+//
+//*****************************************************************************
+#define MUSB_TEST_FORCEH         0x0080  // Force Host Mode
+#define MUSB_TEST_FIFOACC        0x0040  // FIFO Access
+#define MUSB_TEST_FORCEFS        0x0020  // Force Full-Speed Mode
+#define MUSB_TEST_FORCEHS        0x0010  // Force High-Speed Mode
+#define MUSB_TEST_TESTPKT        0x0008  // Test Packet Mode Enable
+#define MUSB_TEST_TESTK          0x0004  // Test_K Mode Enable
+#define MUSB_TEST_TESTJ          0x0002  // Test_J Mode Enable
+#define MUSB_TEST_TESTSE0NAK     0x0001  // Test_SE0_NAK Test Mode Enable
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_DEVCTL register.
+//
+//*****************************************************************************
+#define MUSB_DEVCTL_DEV          0x0080  // Device Mode (OTG only)
+#define MUSB_DEVCTL_FSDEV        0x0040  // Full-Speed Device Detected
+#define MUSB_DEVCTL_LSDEV        0x0020  // Low-Speed Device Detected
+#define MUSB_DEVCTL_VBUS_M       0x0018  // VBUS Level (OTG only)
+#define MUSB_DEVCTL_VBUS_NONE    0x0000  // Below SessionEnd
+#define MUSB_DEVCTL_VBUS_SEND    0x0008  // Above SessionEnd, below AValid
+#define MUSB_DEVCTL_VBUS_AVALID  0x0010  // Above AValid, below VBUSValid
+#define MUSB_DEVCTL_VBUS_VALID   0x0018  // Above VBUSValid
+#define MUSB_DEVCTL_HOST         0x0004  // Host Mode
+#define MUSB_DEVCTL_HOSTREQ      0x0002  // Host Request (OTG only)
+#define MUSB_DEVCTL_SESSION      0x0001  // Session Start/End (OTG only)
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_CCONF register.
+//
+//*****************************************************************************
+#define MUSB_CCONF_TXEDMA        0x0002  // TX Early DMA Enable
+#define MUSB_CCONF_RXEDMA        0x0001  // TX Early DMA Enable
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_ULPIVBUSCTL
+// register.
+//
+//*****************************************************************************
+#define MUSB_ULPIVBUSCTL_USEEXTVBUSIND  0x0002  // Use External VBUS Indicator
+#define MUSB_ULPIVBUSCTL_USEEXTVBUS     0x0001  // Use External VBUS
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_ULPIREGDATA
+// register.
+//
+//*****************************************************************************
+#define MUSB_ULPIREGDATA_REGDATA_M      0x00FF  // Register Data
+#define MUSB_ULPIREGDATA_REGDATA_S      0
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_ULPIREGADDR
+// register.
+//
+//*****************************************************************************
+#define MUSB_ULPIREGADDR_ADDR_M  0x00FF  // Register Address
+#define MUSB_ULPIREGADDR_ADDR_S  0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_ULPIREGCTL
+// register.
+//
+//*****************************************************************************
+#define MUSB_ULPIREGCTL_RDWR     0x0004  // Read/Write Control
+#define MUSB_ULPIREGCTL_REGCMPLT 0x0002  // Register Access Complete
+#define MUSB_ULPIREGCTL_REGACC   0x0001  // Initiate Register Access
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_EPINFO register.
+//
+//*****************************************************************************
+#define MUSB_EPINFO_RXEP_M       0x00F0  // RX Endpoints
+#define MUSB_EPINFO_TXEP_M       0x000F  // TX Endpoints
+#define MUSB_EPINFO_RXEP_S       4
+#define MUSB_EPINFO_TXEP_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_RAMINFO register.
+//
+//*****************************************************************************
+#define MUSB_RAMINFO_DMACHAN_M   0x00F0  // DMA Channels
+#define MUSB_RAMINFO_RAMBITS_M   0x000F  // RAM Address Bus Width
+#define MUSB_RAMINFO_DMACHAN_S   4
+#define MUSB_RAMINFO_RAMBITS_S   0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_CONTIM register.
+//
+//*****************************************************************************
+#define MUSB_CONTIM_WTCON_M      0x00F0  // Connect Wait
+#define MUSB_CONTIM_WTID_M       0x000F  // Wait ID
+#define MUSB_CONTIM_WTCON_S      4
+#define MUSB_CONTIM_WTID_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_VPLEN register.
+//
+//*****************************************************************************
+#define MUSB_VPLEN_VPLEN_M       0x00FF  // VBUS Pulse Length
+#define MUSB_VPLEN_VPLEN_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_HSEOF register.
+//
+//*****************************************************************************
+#define MUSB_HSEOF_HSEOFG_M      0x00FF  // HIgh-Speed End-of-Frame Gap
+#define MUSB_HSEOF_HSEOFG_S      0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_FSEOF register.
+//
+//*****************************************************************************
+#define MUSB_FSEOF_FSEOFG_M      0x00FF  // Full-Speed End-of-Frame Gap
+#define MUSB_FSEOF_FSEOFG_S      0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_LSEOF register.
+//
+//*****************************************************************************
+#define MUSB_LSEOF_LSEOFG_M      0x00FF  // Low-Speed End-of-Frame Gap
+#define MUSB_LSEOF_LSEOFG_S      0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_CSRL0 register.
+//
+//*****************************************************************************
+#define MUSB_CSRL0_NAKTO         0x0080  // NAK Timeout
+#define MUSB_CSRL0_SETENDC       0x0080  // Setup End Clear
+#define MUSB_CSRL0_STATUS        0x0040  // STATUS Packet
+#define MUSB_CSRL0_RXRDYC        0x0040  // RXRDY Clear
+#define MUSB_CSRL0_REQPKT        0x0020  // Request Packet
+#define MUSB_CSRL0_STALL         0x0020  // Send Stall
+#define MUSB_CSRL0_SETEND        0x0010  // Setup End
+#define MUSB_CSRL0_ERROR         0x0010  // Error
+#define MUSB_CSRL0_DATAEND       0x0008  // Data End
+#define MUSB_CSRL0_SETUP         0x0008  // Setup Packet
+#define MUSB_CSRL0_STALLED       0x0004  // Endpoint Stalled
+#define MUSB_CSRL0_TXRDY         0x0002  // Transmit Packet Ready
+#define MUSB_CSRL0_RXRDY         0x0001  // Receive Packet Ready
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_CSRH0 register.
+//
+//*****************************************************************************
+#define MUSB_CSRH0_DISPING       0x0008  // PING Disable
+#define MUSB_CSRH0_DTWE          0x0004  // Data Toggle Write Enable
+#define MUSB_CSRH0_DT            0x0002  // Data Toggle
+#define MUSB_CSRH0_FLUSH         0x0001  // Flush FIFO
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_TYPE0 register.
+//
+//*****************************************************************************
+#define MUSB_TYPE0_SPEED_M       0x00C0  // Operating Speed
+#define MUSB_TYPE0_SPEED_HIGH    0x0040  // High
+#define MUSB_TYPE0_SPEED_FULL    0x0080  // Full
+#define MUSB_TYPE0_SPEED_LOW     0x00C0  // Low
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_NAKLMT register.
+//
+//*****************************************************************************
+#define MUSB_NAKLMT_NAKLMT_M     0x001F  // EP0 NAK Limit
+#define MUSB_NAKLMT_NAKLMT_S     0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_TXCSRL1 register.
+//
+//*****************************************************************************
+#define MUSB_TXCSRL1_NAKTO       0x0080  // NAK Timeout
+#define MUSB_TXCSRL1_CLRDT       0x0040  // Clear Data Toggle
+#define MUSB_TXCSRL1_STALLED     0x0020  // Endpoint Stalled
+#define MUSB_TXCSRL1_STALL       0x0010  // Send STALL
+#define MUSB_TXCSRL1_SETUP       0x0010  // Setup Packet
+#define MUSB_TXCSRL1_FLUSH       0x0008  // Flush FIFO
+#define MUSB_TXCSRL1_ERROR       0x0004  // Error
+#define MUSB_TXCSRL1_UNDRN       0x0004  // Underrun
+#define MUSB_TXCSRL1_FIFONE      0x0002  // FIFO Not Empty
+#define MUSB_TXCSRL1_TXRDY       0x0001  // Transmit Packet Ready
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_TXCSRH1 register.
+//
+//*****************************************************************************
+#define MUSB_TXCSRH1_AUTOSET     0x0080  // Auto Set
+#define MUSB_TXCSRH1_ISO         0x0040  // Isochronous Transfers
+#define MUSB_TXCSRH1_MODE        0x0020  // Mode
+#define MUSB_TXCSRH1_DMAEN       0x0010  // DMA Request Enable
+#define MUSB_TXCSRH1_FDT         0x0008  // Force Data Toggle
+#define MUSB_TXCSRH1_DMAMOD      0x0004  // DMA Request Mode
+#define MUSB_TXCSRH1_DTWE        0x0002  // Data Toggle Write Enable
+#define MUSB_TXCSRH1_DT          0x0001  // Data Toggle
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_RXCSRL1 register.
+//
+//*****************************************************************************
+#define MUSB_RXCSRL1_CLRDT       0x0080  // Clear Data Toggle
+#define MUSB_RXCSRL1_STALLED     0x0040  // Endpoint Stalled
+#define MUSB_RXCSRL1_STALL       0x0020  // Send STALL
+#define MUSB_RXCSRL1_REQPKT      0x0020  // Request Packet
+#define MUSB_RXCSRL1_FLUSH       0x0010  // Flush FIFO
+#define MUSB_RXCSRL1_DATAERR     0x0008  // Data Error
+#define MUSB_RXCSRL1_NAKTO       0x0008  // NAK Timeout
+#define MUSB_RXCSRL1_OVER        0x0004  // Overrun
+#define MUSB_RXCSRL1_ERROR       0x0004  // Error
+#define MUSB_RXCSRL1_FULL        0x0002  // FIFO Full
+#define MUSB_RXCSRL1_RXRDY       0x0001  // Receive Packet Ready
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_RXCSRH1 register.
+//
+//*****************************************************************************
+#define MUSB_RXCSRH1_AUTOCL      0x0080  // Auto Clear
+#define MUSB_RXCSRH1_AUTORQ      0x0040  // Auto Request
+#define MUSB_RXCSRH1_ISO         0x0040  // Isochronous Transfers
+#define MUSB_RXCSRH1_DMAEN       0x0020  // DMA Request Enable
+#define MUSB_RXCSRH1_DISNYET     0x0010  // Disable NYET
+#define MUSB_RXCSRH1_PIDERR      0x0010  // PID Error
+#define MUSB_RXCSRH1_DMAMOD      0x0008  // DMA Request Mode
+#define MUSB_RXCSRH1_DTWE        0x0004  // Data Toggle Write Enable
+#define MUSB_RXCSRH1_DT          0x0002  // Data Toggle
+#define MUSB_RXCSRH1_INCOMPRX    0x0001  // Incomplete RX Transmission Status
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_TXTYPE1 register.
+//
+//*****************************************************************************
+#define MUSB_TXTYPE1_SPEED_M     0x00C0  // Operating Speed
+#define MUSB_TXTYPE1_SPEED_DFLT  0x0000  // Default
+#define MUSB_TXTYPE1_SPEED_HIGH  0x0040  // High
+#define MUSB_TXTYPE1_SPEED_FULL  0x0080  // Full
+#define MUSB_TXTYPE1_SPEED_LOW   0x00C0  // Low
+#define MUSB_TXTYPE1_PROTO_M     0x0030  // Protocol
+#define MUSB_TXTYPE1_PROTO_CTRL  0x0000  // Control
+#define MUSB_TXTYPE1_PROTO_ISOC  0x0010  // Isochronous
+#define MUSB_TXTYPE1_PROTO_BULK  0x0020  // Bulk
+#define MUSB_TXTYPE1_PROTO_INT   0x0030  // Interrupt
+#define MUSB_TXTYPE1_TEP_M       0x000F  // Target Endpoint Number
+#define MUSB_TXTYPE1_TEP_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_TXINTERVAL1
+// register.
+//
+//*****************************************************************************
+#define MUSB_TXINTERVAL1_NAKLMT_M 0x00FF  // NAK Limit
+#define MUSB_TXINTERVAL1_TXPOLL_M 0x00FF  // TX Polling
+#define MUSB_TXINTERVAL1_TXPOLL_S 0
+#define MUSB_TXINTERVAL1_NAKLMT_S 0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_RXTYPE1 register.
+//
+//*****************************************************************************
+#define MUSB_RXTYPE1_SPEED_M     0x00C0  // Operating Speed
+#define MUSB_RXTYPE1_SPEED_DFLT  0x0000  // Default
+#define MUSB_RXTYPE1_SPEED_HIGH  0x0040  // High
+#define MUSB_RXTYPE1_SPEED_FULL  0x0080  // Full
+#define MUSB_RXTYPE1_SPEED_LOW   0x00C0  // Low
+#define MUSB_RXTYPE1_PROTO_M     0x0030  // Protocol
+#define MUSB_RXTYPE1_PROTO_CTRL  0x0000  // Control
+#define MUSB_RXTYPE1_PROTO_ISOC  0x0010  // Isochronous
+#define MUSB_RXTYPE1_PROTO_BULK  0x0020  // Bulk
+#define MUSB_RXTYPE1_PROTO_INT   0x0030  // Interrupt
+#define MUSB_RXTYPE1_TEP_M       0x000F  // Target Endpoint Number
+#define MUSB_RXTYPE1_TEP_S       0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_RXINTERVAL1
+// register.
+//
+//*****************************************************************************
+#define MUSB_RXINTERVAL1_TXPOLL_M 0x00FF  // RX Polling
+#define MUSB_RXINTERVAL1_NAKLMT_M 0x00FF  // NAK Limit
+#define MUSB_RXINTERVAL1_TXPOLL_S 0
+#define MUSB_RXINTERVAL1_NAKLMT_S 0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_DMACTL0 register.
+//
+//*****************************************************************************
+#define MUSB_DMACTL0_BRSTM_M     0x0600  // Burst Mode
+#define MUSB_DMACTL0_BRSTM_ANY   0x0000  // Bursts of unspecified length
+#define MUSB_DMACTL0_BRSTM_INC4  0x0200  // INCR4 or unspecified length
+#define MUSB_DMACTL0_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
+                                            // length
+#define MUSB_DMACTL0_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
+                                            // unspecified length
+#define MUSB_DMACTL0_ERR         0x0100  // Bus Error Bit
+#define MUSB_DMACTL0_EP_M        0x00F0  // Endpoint number
+#define MUSB_DMACTL0_IE          0x0008  // DMA Interrupt Enable
+#define MUSB_DMACTL0_MODE        0x0004  // DMA Transfer Mode
+#define MUSB_DMACTL0_DIR         0x0002  // DMA Direction
+#define MUSB_DMACTL0_ENABLE      0x0001  // DMA Transfer Enable
+#define MUSB_DMACTL0_EP_S        4
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_DMAADDR0 register.
+//
+//*****************************************************************************
+#define MUSB_DMAADDR0_ADDR_M     0xFFFFFFFC  // DMA Address
+#define MUSB_DMAADDR0_ADDR_S     2
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_DMACOUNT0
+// register.
+//
+//*****************************************************************************
+#define MUSB_DMACOUNT0_COUNT_M   0xFFFFFFFC  // DMA Count
+#define MUSB_DMACOUNT0_COUNT_S   2
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_CTO register.
+//
+//*****************************************************************************
+#define MUSB_CTO_CCTV_M          0xFFFF  // Configurable Chirp Timeout Value
+#define MUSB_CTO_CCTV_S          0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_HHSRTN register.
+//
+//*****************************************************************************
+#define MUSB_HHSRTN_HHSRTN_M     0xFFFF  // HIgh Speed to UTM Operating
+                                            // Delay
+#define MUSB_HHSRTN_HHSRTN_S     0
+
+//*****************************************************************************
+//
+// The following are defines for the bit fields in the MUSB_O_HSBT register.
+//
+//*****************************************************************************
+#define MUSB_HSBT_HSBT_M         0x000F  // High Speed Timeout Adder
+#define MUSB_HSBT_HSBT_S         0
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
@@ -0,0 +1,931 @@
+/*******************************************************************************
+* Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries.
+*
+* Subject to your compliance with these terms, you may use Microchip software
+* and any derivatives exclusively with Microchip products. It is your
+* responsibility to comply with third party license terms applicable to your
+* use of third party software (including open source software) that may
+* accompany Microchip software.
+*
+* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER
+* EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED
+* WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A
+* PARTICULAR PURPOSE.
+*
+* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
+* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
+* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE
+* FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN
+* ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+*******************************************************************************/
+/*******************************************************************************
+  USBHS Peripheral Library Register Definitions
+
+  File Name:
+    usbhs_registers.h
+
+  Summary:
+    USBHS PLIB Register Definitions
+
+  Description:
+    This file contains the constants and definitions which are required by the
+    the USBHS library.
+*******************************************************************************/
+
+#ifndef __USBHS_REGISTERS_H__
+#define __USBHS_REGISTERS_H__
+
+#include <p32xxxx.h>
+#include <stdint.h>
+
+/*****************************************
+ * Module Register Offsets.
+ *****************************************/
+
+#define USBHS_REG_FADDR         0x000
+#define USBHS_REG_POWER         0x001
+#define USBHS_REG_INTRTX        0x002
+#define USBHS_REG_INTRRX        0x004
+#define USBHS_REG_INTRTXE       0x006
+#define USBHS_REG_INTRRXE       0x008
+#define USBHS_REG_INTRUSB       0x00A
+#define USBHS_REG_INTRUSBE      0x00B
+#define USBHS_REG_FRAME         0x00C
+#define USBHS_REG_INDEX         0x00E
+#define USBHS_REG_TESTMODE      0x00F
+
+/*******************************************************
+ * Endpoint Control Status Registers (CSR). These values
+ * should be added to either the 0x10 to access the
+ * register through Indexed CSR. To access the actual
+ * CSR, see ahead in this header file.
+ ******************************************************/
+
+#define USBHS_REG_EP_TXMAXP     0x000
+#define USBHS_REG_EP_CSR0L      0x002
+#define USBHS_REG_EP_CSR0H      0x003
+#define USBHS_REG_EP_TXCSRL     0x002
+#define USBHS_REG_EP_TXCSRH     0x003
+#define USBHS_REG_EP_RXMAXP     0x004
+#define USBHS_REG_EP_RXCSRL     0x006
+#define USBHS_REG_EP_RXCSRH     0x007
+#define USBHS_REG_EP_COUNT0     0x008
+#define USBHS_REG_EP_RXCOUNT    0x008
+#define USBHS_REG_EP_TYPE0      0x01A
+#define USBHS_REG_EP_TXTYPE     0x01A
+#define USBHS_REG_EP_NAKLIMIT0  0x01B
+#define USBHS_REG_EP_TXINTERVAL 0x01B
+#define USBHS_REG_EP_RXTYPE     0x01C
+#define USBHS_REG_EP_RXINTERVAL 0x01D
+#define USBHS_REG_EP_CONFIGDATA 0x01F
+#define USBHS_REG_EP_FIFOSIZE   0x01F
+
+#define USBHS_HOST_EP0_SETUPKT_SET 0x8
+#define USBHS_HOST_EP0_TXPKTRDY_SET 0x2
+#define USBHS_SOFT_RST_NRST_SET 0x1
+#define USBHS_SOFT_RST_NRSTX_SET 0x2
+#define USBHS_EP0_DEVICE_SERVICED_RXPKTRDY 0x40
+#define USBHS_EP0_DEVICE_DATAEND 0x08
+#define USBHS_EP0_DEVICE_TXPKTRDY 0x02
+#define USBHS_EP0_HOST_STATUS_STAGE_START 0x40
+#define USBHS_EP0_HOST_REQPKT 0x20
+#define USBHS_EP0_HOST_TXPKTRDY 0x02
+#define USBHS_EP0_HOST_RXPKTRDY 0x01
+#define USBHS_EP_DEVICE_TX_SENT_STALL 0x20
+#define USBHS_EP_DEVICE_TX_SEND_STALL 0x10
+#define USBHS_EP_DEVICE_RX_SENT_STALL 0x40
+#define USBHS_EP_DEVICE_RX_SEND_STALL 0x20
+
+/* FADDR - Device Function Address */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned FUNC:7;
+        unsigned :1;
+    };
+
+    uint8_t w;
+
+} __USBHS_FADDR_t;
+
+/* POWER - Control Resume and Suspend signalling */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned SUSPEN:1;
+        unsigned SUSPMODE:1;
+        unsigned RESUME:1;
+        unsigned RESET:1;
+        unsigned HSMODE:1;
+        unsigned HSEN:1;
+        unsigned SOFTCONN:1;
+        unsigned ISOUPD:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_POWER_t;
+
+/* INTRTXE - Transmit endpoint interrupt enable */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned EP0IE:1;
+        unsigned EP1TXIE:1;
+        unsigned EP2TXIE:1;
+        unsigned EP3TXIE:1;
+        unsigned EP4TXIE:1;
+        unsigned EP5TXIE:1;
+        unsigned EP6TXIE:1;
+        unsigned EP7TXIE:1;
+        unsigned :8;
+    };
+    struct
+    {
+        uint16_t    w;
+    };
+
+} __USBHS_INTRTXE_t;
+
+/* INTRRXE - Receive endpoint interrupt enable */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned :1;
+        unsigned EP1RXIE:1;
+        unsigned EP2RXIE:1;
+        unsigned EP3RXIE:1;
+        unsigned EP4RXIE:1;
+        unsigned EP5RXIE:1;
+        unsigned EP6RXIE:1;
+        unsigned EP7RXIE:1;
+        unsigned :8;
+    };
+    struct
+    {
+        uint16_t    w;
+    };
+
+} __USBHS_INTRRXE_t;
+
+/* INTRUSBE - General USB Interrupt enable */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned SUSPIE:1;
+        unsigned RESUMEIE:1;
+        unsigned RESETIE:1;
+        unsigned SOFIE:1;
+        unsigned CONNIE:1;
+        unsigned DISCONIE:1;
+        unsigned SESSRQIE:1;
+        unsigned VBUSERRIE:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_INTRUSBE_t;
+
+/* FRAME - Frame number */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RFRMNUM:11;
+        unsigned :5;
+    };
+    struct
+    {
+        uint16_t w;
+    };
+
+} __USBHS_FRAME_t;
+
+/* INDEX - Endpoint index */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned ENDPOINT:4;
+        unsigned :4;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_INDEX_t;
+
+/* TESTMODE - Test mode register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned NAK:1;
+        unsigned TESTJ:1;
+        unsigned TESTK:1;
+        unsigned PACKET:1;
+        unsigned FORCEHS:1;
+        unsigned FORCEFS:1;
+        unsigned FIFOACC:1;
+        unsigned FORCEHST:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TESTMODE_t;
+
+/* COUNT0 - Indicates the amount of data received in endpoint 0 */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXCNT:7;
+        unsigned :1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_COUNT0_t;
+
+/* TYPE0 - Operating speed of target device */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned :6;
+        unsigned SPEED:2;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TYPE0_t;
+
+/* DEVCTL - Module control register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned SESSION:1;
+        unsigned HOSTREQ:1;
+        unsigned HOSTMODE:1;
+        unsigned VBUS:2;
+        unsigned LSDEV:1;
+        unsigned FSDEV:1;
+        unsigned BDEV:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_DEVCTL_t;
+
+/* CSR0L Device - Endpoint Device Mode Control Status Register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXPKTRDY:1;
+        unsigned TXPKTRDY:1;
+        unsigned SENTSTALL:1;
+        unsigned DATAEND:1;
+        unsigned SETUPEND:1;
+        unsigned SENDSTALL:1;
+        unsigned SVCRPR:1;
+        unsigned SVSSETEND:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_CSR0L_DEVICE_t;
+
+/* CSR0L Host - Endpoint Host Mode Control Status Register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXPKTRDY:1;
+        unsigned TXPKTRDY:1;
+        unsigned RXSTALL:1;
+        unsigned SETUPPKT:1;
+        unsigned ERROR:1;
+        unsigned REQPKT:1;
+        unsigned STATPKT:1;
+        unsigned NAKTMOUT:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_CSR0L_HOST_t;
+
+/* TXCSRL Device - Endpoint Transmit Control Status Register Low */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXPKTRDY:1;
+        unsigned FIFOONE:1;
+        unsigned UNDERRUN:1;
+        unsigned FLUSH:1;
+        unsigned SENDSTALL:1;
+        unsigned SENTSTALL:1;
+        unsigned CLRDT:1;
+        unsigned INCOMPTX:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TXCSRL_DEVICE_t;
+
+/* TXCSRL Host - Endpoint Transmit Control Status Register Low */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXPKTRDY:1;
+        unsigned FIFONE:1;
+        unsigned ERROR:1;
+        unsigned FLUSH:1;
+        unsigned SETUPPKT:1;
+        unsigned RXSTALL:1;
+        unsigned CLRDT:1;
+        unsigned INCOMPTX:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TXCSRL_HOST_t;
+
+/* TXCSRH Device - Endpoint Transmit Control Status Register High */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned :2;
+        unsigned DMAREQMD:1;
+        unsigned FRCDATTG:1;
+        unsigned DMAREQENL:1;
+        unsigned MODE:1;
+        unsigned ISO:1;
+        unsigned AUTOSET:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TXCSRH_DEVICE_t;
+
+/* TXCSRH Host - Endpoint Transmit Control Status Register High */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned DATATGGL:1;
+        unsigned DTWREN:1;
+        unsigned DMAREQMD:1;
+        unsigned FRCDATTG:1;
+        unsigned DMAREQEN:1;
+        unsigned MODE:1;
+        unsigned :1;
+        unsigned AUOTSET:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TXCSRH_HOST_t;
+
+/* CSR0H Device - Endpoint 0 Control Status Register High */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned FLSHFIFO:1;
+        unsigned :7;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_CSR0H_DEVICE_t;
+
+/* CSR0H Host - Endpoint 0 Control Status Register High */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned FLSHFIFO:1;
+        unsigned DATATGGL:1;
+        unsigned DTWREN:1;
+        unsigned DISPING:1;
+        unsigned :4;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_CSR0H_HOST_t;
+
+/* RXMAXP - Receive Endpoint Max packet size. */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXMAXP:11;
+        unsigned MULT:5;
+    };
+    struct
+    {
+        uint16_t w;
+    };
+
+} __USBHS_RXMAXP_t;
+
+/* RXCSRL Device - Receive endpoint Control Status Register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXPKTRDY:1;
+        unsigned FIFOFULL:1;
+        unsigned OVERRUN:1;
+        unsigned DATAERR:1;
+        unsigned FLUSH:1;
+        unsigned SENDSTALL:1;
+        unsigned SENTSTALL:1;
+        unsigned CLRDT:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_RXCSRL_DEVICE_t;
+
+/* RXCSRL Host - Receive endpoint Control Status Register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXPKTRDY:1;
+        unsigned FIFOFULL:1;
+        unsigned ERROR:1;
+        unsigned DERRNAKT:1;
+        unsigned FLUSH:1;
+        unsigned REQPKT:1;
+        unsigned RXSTALL:1;
+        unsigned CLRDT:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_RXCSRL_HOST_t;
+
+/* RXCSRH Device - Receive endpoint Control Status Register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned INCOMPRX:1;
+        unsigned :2;
+        unsigned DMAREQMODE:1;
+        unsigned DISNYET:1;
+        unsigned DMAREQEN:1;
+        unsigned ISO:1;
+        unsigned AUTOCLR:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_RXCSRH_DEVICE_t;
+
+/* RXCSRH Host - Receive endpoint Control Status Register */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned INCOMPRX:1;
+        unsigned DATATGGL:1;
+        unsigned DATATWEN:1;
+        unsigned DMAREQMD:1;
+        unsigned PIDERR:1;
+        unsigned DMAREQEN:1;
+        unsigned AUTORQ:1;
+        unsigned AUOTCLR:1;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_RXCSRH_HOST_t;
+
+/* RXCOUNT - Amount of data pending in RX FIFO */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXCNT:14;
+        unsigned :2;
+    };
+    struct
+    {
+        uint16_t w;
+    };
+
+} __USBHS_RXCOUNT_t;
+
+/* TXTYPE - Specifies the target transmit endpoint */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TEP:4;
+        unsigned PROTOCOL:2;
+        unsigned SPEED:2;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_TXTYPE_t;
+
+/* RXTYPE - Specifies the target receive endpoint */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TEP:4;
+        unsigned PROTOCOL:2;
+        unsigned SPEED:2;
+    };
+    struct
+    {
+        uint8_t w;
+    };
+
+} __USBHS_RXTYPE_t;
+
+/* TXINTERVAL - Defines the polling interval */
+typedef struct
+{
+    uint8_t TXINTERV;
+
+} __USBHS_TXINTERVAL_t;
+
+/* RXINTERVAL - Defines the polling interval */
+typedef struct
+{
+    uint8_t RXINTERV;
+
+} __USBHS_RXINTERVAL_t;
+
+/* TXMAXP - Maximum amount of data that can be transferred through a TX endpoint
+ * */
+
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXMAXP:11;
+        unsigned MULT:5;
+    };
+    uint16_t w;
+
+} __USBHS_TXMAXP_t;
+
+/* TXFIFOSZ - Size of the transmit endpoint FIFO */
+typedef struct __attribute__((packed))
+{
+    unsigned TXFIFOSZ:4;
+    unsigned TXDPB:1;
+    unsigned :3;
+
+} __USBHS_TXFIFOSZ_t;
+
+/* RXFIFOSZ - Size of the receive endpoint FIFO */
+typedef struct __attribute__((packed))
+{
+    unsigned RXFIFOSZ:4;
+    unsigned RXDPB:1;
+    unsigned :3;
+
+} __USBHS_RXFIFOSZ_t;
+
+/* TXFIFOADD - Start address of the transmit endpoint FIFO */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXFIFOAD:13;
+        unsigned :3;
+    };
+    uint16_t w;
+
+} __USBHS_TXFIFOADD_t;
+
+/* RXFIFOADD - Start address of the receive endpoint FIFO */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXFIFOAD:13;
+        unsigned :3;
+    };
+    uint16_t w;
+
+} __USBHS_RXFIFOADD_t;
+
+/* SOFTRST - Asserts NRSTO and NRSTOX */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned NRST:1;
+        unsigned NRSTX:1;
+        unsigned :6;
+    };
+    uint8_t w;
+
+} __USBHS_SOFTRST_t;
+
+/* TXFUNCADDR - Target address of transmit endpoint */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXFADDR:7;
+        unsigned :1;
+    };
+    uint8_t w;
+
+} __USBHS_TXFUNCADDR_t;
+
+/* RXFUNCADDR - Target address of receive endpoint */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXFADDR:7;
+        unsigned :1;
+    };
+    uint8_t w;
+
+} __USBHS_RXFUNCADDR_t;
+
+/* TXHUBADDR - Address of the hub to which the target transmit device endpoint
+ * is connected */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXHUBADDR:7;
+        unsigned MULTTRAN:1;
+    };
+    uint8_t w;
+
+} __USBHS_TXHUBADDR_t;
+
+/* RXHUBADDR - Address of the hub to which the target receive device endpoint is
+ * connected */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXHUBADDR:7;
+        unsigned MULTTRAN:1;
+    };
+    uint8_t w;
+
+} __USBHS_RXHUBADDR_t;
+
+/* TXHUBPORT - Address of the hub to which the target transmit device endpoint
+ * is connected. */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned TXHUBPRT:7;
+        unsigned :1;
+    };
+
+    uint8_t w;
+
+} __USBHS_TXHUBPORT_t;
+
+/* RXHUBPORT - Address of the hub to which the target receive device endpoint
+ * is connected. */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned RXHUBPRT:7;
+        unsigned :1;
+    };
+
+    uint8_t w;
+
+} __USBHS_RXHUBPORT_t;
+
+/* DMACONTROL - Configures a DMA channel */
+typedef union
+{
+    struct __attribute__((packed))
+    {
+        unsigned DMAEN:1;
+        unsigned DMADIR:1;
+        unsigned DMAMODE:1;
+        unsigned DMAIE:1;
+        unsigned DMAEP:4;
+        unsigned DMAERR:1;
+        unsigned DMABRSTM:2;
+        unsigned:21;
+    };
+
+    uint32_t w;
+
+} __USBHS_DMACNTL_t;
+
+/* Endpoint Control and Status Register Set */
+typedef struct __attribute__((packed))
+{
+    volatile __USBHS_TXMAXP_t TXMAXPbits;
+    union
+    {
+        struct
+        {
+            union
+            {
+                volatile __USBHS_CSR0L_DEVICE_t CSR0L_DEVICEbits;
+                volatile __USBHS_CSR0L_HOST_t CSR0L_HOSTbits;
+            };
+            union
+            {
+                volatile __USBHS_CSR0H_DEVICE_t CSR0H_DEVICEbits;
+                volatile __USBHS_CSR0H_HOST_t CSR0H_HOSTbits;
+            };
+        };
+
+        struct
+        {
+            union
+            {
+                volatile __USBHS_TXCSRL_DEVICE_t TXCSRL_DEVICEbits;
+                volatile __USBHS_TXCSRL_HOST_t TXCSRL_HOSTbits;
+            };
+
+            union
+            {
+                volatile __USBHS_TXCSRH_DEVICE_t TXCSRH_DEVICEbits;
+                volatile __USBHS_TXCSRH_HOST_t TXCSRH_HOSTbits;
+            };
+        };
+    };
+
+    volatile __USBHS_RXMAXP_t RXMAXPbits;
+
+    union
+    {
+        volatile __USBHS_RXCSRL_DEVICE_t RXCSRL_DEVICEbits;
+        volatile __USBHS_RXCSRL_HOST_t RXCSRL_HOSTbits;
+    };
+
+    union
+    {
+        volatile __USBHS_RXCSRH_DEVICE_t RXCSRH_DEVICEbits;
+        volatile __USBHS_RXCSRH_HOST_t RXCSRH_HOSTbits;
+    };
+
+    union
+    {
+        volatile __USBHS_COUNT0_t COUNT0bits;
+        volatile __USBHS_RXCOUNT_t RXCOUNTbits;
+    };
+
+    union
+    {
+        volatile __USBHS_TYPE0_t TYPE0bits;
+        volatile __USBHS_TXTYPE_t TXTYPEbits;
+    };
+
+    union
+    {
+        volatile uint8_t NAKLIMIT0;
+        volatile __USBHS_TXINTERVAL_t TXINTERVALbits;
+    };
+
+    volatile __USBHS_RXTYPE_t RXTYPEbits;
+    volatile __USBHS_RXINTERVAL_t RXINTERVALbits;
+    unsigned :8;
+    union
+    {
+        volatile uint8_t CONFIGDATA;
+        volatile uint8_t FIFOSIZE;
+    };
+
+} __USBHS_EPCSR_t;
+
+/* Set of registers that configure the multi-point option */
+typedef struct __attribute__((packed))
+{
+    volatile __USBHS_TXFUNCADDR_t TXFUNCADDRbits;
+    unsigned :8;
+    volatile __USBHS_TXHUBADDR_t TXHUBADDRbits;
+    volatile __USBHS_TXHUBPORT_t TXHUBPORTbits;
+    volatile __USBHS_RXFUNCADDR_t RXFUNCADDRbits;
+    unsigned :8;
+    volatile __USBHS_RXHUBADDR_t RXHUBADDRbits;
+    volatile __USBHS_RXHUBPORT_t RXHUBPORTbits;
+
+} __USBHS_TARGET_ADDR_t;
+
+/* Set of registers that configure the DMA channel */
+typedef struct __attribute__((packed))
+{
+    volatile __USBHS_DMACNTL_t DMACNTLbits;
+    volatile uint32_t DMAADDR;
+    volatile uint32_t DMACOUNT;
+    volatile uint32_t pad;
+} __USBHS_DMA_CHANNEL_t;
+
+/* USBHS module register set */
+typedef struct __attribute__((aligned(4),packed))
+{
+    volatile __USBHS_FADDR_t    FADDRbits;
+    volatile __USBHS_POWER_t    POWERbits;
+    volatile uint16_t           INTRTX;
+    volatile uint16_t           INTRRX;
+    volatile __USBHS_INTRTXE_t  INTRTXEbits;
+    volatile __USBHS_INTRRXE_t  INTRRXEbits;
+    volatile uint8_t            INTRUSB;
+    volatile __USBHS_INTRUSBE_t INTRUSBEbits;
+    volatile __USBHS_FRAME_t    FRAMEbits;
+    volatile __USBHS_INDEX_t    INDEXbits;
+    volatile __USBHS_TESTMODE_t TESTMODEbits;
+    volatile __USBHS_EPCSR_t    INDEXED_EPCSR;
+    volatile uint32_t           FIFO[16];
+    volatile __USBHS_DEVCTL_t   DEVCTLbits;
+    volatile uint8_t            MISC;
+    volatile __USBHS_TXFIFOSZ_t TXFIFOSZbits;
+    volatile __USBHS_RXFIFOSZ_t RXFIFOSZbits;
+
+    volatile __USBHS_TXFIFOADD_t   TXFIFOADDbits;
+    volatile __USBHS_RXFIFOADD_t   RXFIFOADDbits;
+
+    volatile uint32_t   VCONTROL;
+    volatile uint16_t   HWVERS;
+    volatile uint8_t    padding1[10];
+    volatile uint8_t    EPINFO;
+    volatile uint8_t    RAMINFO;
+    volatile uint8_t    LINKINFO;
+    volatile uint8_t    VPLEN;
+    volatile uint8_t    HS_EOF1;
+    volatile uint8_t    FS_EOF1;
+    volatile uint8_t    LS_EOF1;
+
+    volatile __USBHS_SOFTRST_t    SOFTRSTbits;
+
+    volatile __USBHS_TARGET_ADDR_t  TADDR[16];
+    volatile __USBHS_EPCSR_t        EPCSR[16];
+    volatile uint32_t               DMA_INTR;
+    volatile __USBHS_DMA_CHANNEL_t  DMA_CHANNEL[8];
+    volatile uint32_t               RQPKTXOUNT[16];
+
+} usbhs_registers_t;
+
+#endif
@@ -0,0 +1,152 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_DCD_LPC17_40_H_
+#define TUSB_DCD_LPC17_40_H_
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Register Interface
+//--------------------------------------------------------------------+
+
+//------------- USB Interrupt USBIntSt -------------//
+//enum {
+//  DCD_USB_REQ_LOW_PRIO_MASK   = TU_BIT(0),
+//  DCD_USB_REQ_HIGH_PRIO_MASK  = TU_BIT(1),
+//  DCD_USB_REQ_DMA_MASK        = TU_BIT(2),
+//  DCD_USB_REQ_NEED_CLOCK_MASK = TU_BIT(8),
+//  DCD_USB_REQ_ENABLE_MASK     = TU_BIT(31)
+//};
+
+//------------- Device Interrupt USBDevInt -------------//
+enum {
+  DEV_INT_FRAME_MASK              = TU_BIT(0),
+  DEV_INT_ENDPOINT_FAST_MASK      = TU_BIT(1),
+  DEV_INT_ENDPOINT_SLOW_MASK      = TU_BIT(2),
+  DEV_INT_DEVICE_STATUS_MASK      = TU_BIT(3),
+  DEV_INT_COMMAND_CODE_EMPTY_MASK = TU_BIT(4),
+  DEV_INT_COMMAND_DATA_FULL_MASK  = TU_BIT(5),
+  DEV_INT_RX_ENDPOINT_PACKET_MASK = TU_BIT(6),
+  DEV_INT_TX_ENDPOINT_PACKET_MASK = TU_BIT(7),
+  DEV_INT_ENDPOINT_REALIZED_MASK  = TU_BIT(8),
+  DEV_INT_ERROR_MASK              = TU_BIT(9)
+};
+
+//------------- DMA Interrupt USBDMAInt-------------//
+enum {
+  DMA_INT_END_OF_XFER_MASK    = TU_BIT(0),
+  DMA_INT_NEW_DD_REQUEST_MASK = TU_BIT(1),
+  DMA_INT_ERROR_MASK          = TU_BIT(2)
+};
+
+//------------- USBCtrl -------------//
+enum {
+  USBCTRL_READ_ENABLE_MASK  = TU_BIT(0),
+  USBCTRL_WRITE_ENABLE_MASK = TU_BIT(1),
+};
+
+//------------- USBRxPLen -------------//
+enum {
+  USBRXPLEN_PACKET_LENGTH_MASK = (TU_BIT(10)-1),
+  USBRXPLEN_DATA_VALID_MASK    = TU_BIT(10),
+  USBRXPLEN_PACKET_READY_MASK  = TU_BIT(11),
+};
+
+//------------- SIE Command Code -------------//
+typedef enum
+{
+  SIE_CMDPHASE_WRITE   = 1,
+  SIE_CMDPHASE_READ    = 2,
+  SIE_CMDPHASE_COMMAND = 5
+} sie_cmdphase_t;
+
+enum {
+  // device commands
+  SIE_CMDCODE_SET_ADDRESS                     = 0xd0,
+  SIE_CMDCODE_CONFIGURE_DEVICE                = 0xd8,
+  SIE_CMDCODE_SET_MODE                        = 0xf3,
+  SIE_CMDCODE_READ_FRAME_NUMBER               = 0xf5,
+  SIE_CMDCODE_READ_TEST_REGISTER              = 0xfd,
+  SIE_CMDCODE_DEVICE_STATUS                   = 0xfe,
+  SIE_CMDCODE_GET_ERROR                       = 0xff,
+  SIE_CMDCODE_READ_ERROR_STATUS               = 0xfb,
+
+  // endpoint commands
+  SIE_CMDCODE_ENDPOINT_SELECT                 = 0x00, // + endpoint index
+  SIE_CMDCODE_ENDPOINT_SELECT_CLEAR_INTERRUPT = 0x40, // + endpoint index, should use USBEpIntClr instead
+  SIE_CMDCODE_ENDPOINT_SET_STATUS             = 0x40, // + endpoint index
+  SIE_CMDCODE_BUFFER_CLEAR                    = 0xf2,
+  SIE_CMDCODE_BUFFER_VALIDATE                 = 0xfa
+};
+
+//------------- SIE Device Status (get/set from SIE_CMDCODE_DEVICE_STATUS) -------------//
+enum {
+  SIE_DEV_STATUS_CONNECT_STATUS_MASK = TU_BIT(0),
+  SIE_DEV_STATUS_CONNECT_CHANGE_MASK = TU_BIT(1),
+  SIE_DEV_STATUS_SUSPEND_MASK        = TU_BIT(2),
+  SIE_DEV_STATUS_SUSPEND_CHANGE_MASK = TU_BIT(3),
+  SIE_DEV_STATUS_RESET_MASK          = TU_BIT(4)
+};
+
+//------------- SIE Select Endpoint Command -------------//
+enum {
+  SIE_SELECT_ENDPOINT_FULL_EMPTY_MASK         = TU_BIT(0), // 0: empty, 1 full. IN endpoint checks empty, OUT endpoint check full
+  SIE_SELECT_ENDPOINT_STALL_MASK              = TU_BIT(1),
+  SIE_SELECT_ENDPOINT_SETUP_RECEIVED_MASK     = TU_BIT(2), // clear by SIE_CMDCODE_ENDPOINT_SELECT_CLEAR_INTERRUPT
+  SIE_SELECT_ENDPOINT_PACKET_OVERWRITTEN_MASK = TU_BIT(3), // previous packet is overwritten by a SETUP packet
+  SIE_SELECT_ENDPOINT_NAK_MASK                = TU_BIT(4), // last packet response is NAK (auto clear by an ACK)
+  SIE_SELECT_ENDPOINT_BUFFER1_FULL_MASK       = TU_BIT(5),
+  SIE_SELECT_ENDPOINT_BUFFER2_FULL_MASK       = TU_BIT(6)
+};
+
+typedef enum
+{
+  SIE_SET_ENDPOINT_STALLED_MASK           = TU_BIT(0),
+  SIE_SET_ENDPOINT_DISABLED_MASK          = TU_BIT(5),
+  SIE_SET_ENDPOINT_RATE_FEEDBACK_MASK     = TU_BIT(6),
+  SIE_SET_ENDPOINT_CONDITION_STALLED_MASK = TU_BIT(7),
+}sie_endpoint_set_status_mask_t;
+
+//------------- DMA Descriptor Status -------------//
+enum {
+  DD_STATUS_NOT_SERVICED = 0,
+  DD_STATUS_BEING_SERVICED,
+  DD_STATUS_NORMAL,
+  DD_STATUS_DATA_UNDERUN, // short packet
+  DD_STATUS_DATA_OVERRUN,
+  DD_STATUS_SYSTEM_ERROR
+};
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
@@ -0,0 +1,327 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_OHCI_H_
+#define TUSB_OHCI_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// OHCI CONFIGURATION & CONSTANTS
+//--------------------------------------------------------------------+
+#define HOST_HCD_XFER_INTERRUPT // TODO interrupt is used widely, should always be enabled
+#define OHCI_PERIODIC_LIST (defined HOST_HCD_XFER_INTERRUPT || defined HOST_HCD_XFER_ISOCHRONOUS)
+
+// TODO merge OHCI with EHCI
+enum {
+  OHCI_MAX_ITD = 4
+};
+
+#define ED_MAX       (CFG_TUH_DEVICE_MAX*CFG_TUH_ENDPOINT_MAX)
+#define GTD_MAX      ED_MAX
+
+// tinyUSB's OHCI implementation caps number of EDs to 8 bits
+TU_VERIFY_STATIC (ED_MAX <= 256, "Reduce CFG_TUH_DEVICE_MAX or CFG_TUH_ENDPOINT_MAX");
+
+#define GTD_ALIGN_SIZE TU_MAX(CFG_TUH_MEM_DCACHE_LINE_SIZE, 16)
+#define ED_ALIGN_SIZE  TU_MAX(CFG_TUH_MEM_DCACHE_LINE_SIZE, 16)
+#define ITD_ALIGN_SIZE TU_MAX(CFG_TUH_MEM_DCACHE_LINE_SIZE, 32)
+
+//--------------------------------------------------------------------+
+// OHCI Data Structure
+//--------------------------------------------------------------------+
+typedef struct {
+  uint32_t interrupt_table[32];
+  volatile uint16_t frame_number;
+  volatile uint16_t frame_pad;
+  volatile uint32_t done_head;
+  uint8_t reserved[116+4];  // TODO try to make use of this area if possible, extra 4 byte to make the whole struct size = 256
+}ohci_hcca_t; // TU_ATTR_ALIGNED(256)
+
+TU_VERIFY_STATIC( sizeof(ohci_hcca_t) == 256, "size is not correct" );
+
+// An OHCI host controller is controlled using data structures placed in memory (RAM).
+// It needs to both read and write these data structures (as defined by the OHCI specification),
+// and this can be mentally conceptualized similar to two software threads running on
+// two different CPUs. In order to prevent a _data race_ where data gets corrupted,
+// the CPU and the OHCI host controller need to agree on how the memory should be accessed.
+// In this driver, we do this by transferring logical ownership of transfer descriptors (TDs)
+// between the CPU and the OHCI host controller. Only the device which holds the logical ownership
+// is allowed to read or write the TD. This ownership is not visible anywhere in the code,
+// but it instead must be inferred based on the logical state of the transfer.
+//
+// If dcache-supporting mode is enabled, we need to do additional manual cache operations
+// in order to correctly transfer this logical ownership and prevent data corruption.
+// In order to do this, we also choose to align each OHCI TD so that it doesn't
+// share CPU cache lines with other TDs. This is because manual cache operations
+// can only be performed on cache line granularity. In other words, one cache line is
+// the _smallest_ amount that can be read/written at a time. If there were to be multiple TDs
+// in the same cache line, they would be required to always have the same logical ownership.
+// This ends up being impossible to guarantee, so we choose a design which avoids the situation entirely.
+
+// common link item for gtd and itd for list travel
+typedef struct TU_ATTR_ALIGNED(16) {
+  uint32_t reserved[2];
+  volatile uint32_t next;
+  uint32_t reserved2;
+}ohci_td_item_t;
+
+typedef struct TU_ATTR_ALIGNED(GTD_ALIGN_SIZE) {
+  // Word 0
+  uint32_t used                    : 1;
+  uint32_t index                   : 8; // endpoint index the gtd belongs to, or device address in case of control xfer
+  uint32_t                         : 9; // can be used
+  uint32_t buffer_rounding         : 1;
+  uint32_t pid                     : 2;
+  uint32_t delay_interrupt         : 3;
+  volatile uint32_t data_toggle    : 2;
+  volatile uint32_t error_count    : 2;
+  volatile uint32_t condition_code : 4;
+
+  // Word 1
+  uint8_t* volatile current_buffer_pointer;
+
+  // Word 2 : next TD
+  volatile uint32_t next;
+
+  // Word 3
+  uint8_t* buffer_end;
+} ohci_gtd_t;
+TU_VERIFY_STATIC(sizeof(ohci_gtd_t) == GTD_ALIGN_SIZE, "size is not correct" );
+
+typedef union {
+  struct {
+    uint32_t dev_addr          : 7;
+    uint32_t ep_number         : 4;
+    uint32_t pid               : 2;
+    uint32_t speed             : 1;
+    uint32_t skip              : 1;
+    uint32_t is_iso            : 1;
+    uint32_t max_packet_size   : 11;
+    // HCD: make use of 5 reserved bits
+    uint32_t used              : 1;
+    uint32_t is_interrupt_xfer : 1;
+    uint32_t                   : 3;
+  };
+  uint32_t value;
+} ohci_ed_word0_t;
+TU_VERIFY_STATIC(sizeof(ohci_ed_word0_t) == 4, "size is not correct" );
+
+typedef union {
+  uint32_t address;
+  struct {
+    uint32_t halted : 1;
+    uint32_t toggle : 1;
+    uint32_t : 30;
+  };
+} ohci_ed_word2_t;
+TU_VERIFY_STATIC(sizeof(ohci_ed_word2_t) == 4, "size is not correct" );
+
+typedef struct TU_ATTR_ALIGNED(ED_ALIGN_SIZE) {
+  ohci_ed_word0_t w0; // Word 0
+  uint32_t td_tail; // Word 1
+  volatile ohci_ed_word2_t td_head; // Word 2
+  uint32_t next; // Word 3
+} ohci_ed_t;
+TU_VERIFY_STATIC(sizeof(ohci_ed_t) == ED_ALIGN_SIZE, "size is not correct" );
+
+typedef struct TU_ATTR_ALIGNED(ITD_ALIGN_SIZE) {
+  /*---------- Word 1 ----------*/
+  uint32_t starting_frame          : 16;
+  uint32_t                         : 5; // can be used
+  uint32_t delay_interrupt         : 3;
+  uint32_t frame_count             : 3;
+  uint32_t                         : 1; // can be used
+  volatile uint32_t condition_code : 4;
+
+
+  /*---------- Word 2 ----------*/
+  uint32_t buffer_page0; // 12 lsb bits can be used
+
+  /*---------- Word 3 ----------*/
+  volatile uint32_t next;
+
+  /*---------- Word 4 ----------*/
+  uint32_t buffer_end;
+
+  /*---------- Word 5-8 ----------*/
+  volatile uint16_t offset_packetstatus[8];
+} ohci_itd_t;
+TU_VERIFY_STATIC(sizeof(ohci_itd_t) == ITD_ALIGN_SIZE, "size is not correct" );
+
+typedef struct {
+  uint16_t expected_bytes; // up to 8192 bytes so max is 13 bits
+} gtd_extra_data_t;
+TU_VERIFY_STATIC(sizeof(gtd_extra_data_t) == 2, "size is not correct" );
+
+// structure with member alignment required from large to small
+typedef struct TU_ATTR_ALIGNED(256) {
+  ohci_hcca_t hcca;
+
+  ohci_ed_t bulk_head_ed; // static bulk head (dummy)
+  ohci_ed_t period_head_ed; // static periodic list head (dummy)
+
+  // control endpoints has reserved resources
+  struct {
+    ohci_ed_t ed;
+    ohci_gtd_t gtd;
+  } control[CFG_TUH_DEVICE_MAX + CFG_TUH_HUB + 1];
+
+  //  ochi_itd_t itd[OHCI_MAX_ITD]; // itd requires alignment of 32
+  ohci_ed_t ed_pool[ED_MAX];
+  ohci_gtd_t gtd_pool[GTD_MAX];
+
+  // extra data needed by TDs that can't fit in the TD struct
+  gtd_extra_data_t gtd_extra_control[CFG_TUH_DEVICE_MAX + CFG_TUH_HUB + 1];
+  gtd_extra_data_t gtd_extra[GTD_MAX];
+
+  volatile uint16_t frame_number_hi;
+} ohci_data_t;
+
+//--------------------------------------------------------------------+
+// OHCI Operational Register
+//--------------------------------------------------------------------+
+
+
+//--------------------------------------------------------------------+
+// OHCI Data Organization
+//--------------------------------------------------------------------+
+typedef volatile struct
+{
+  uint32_t revision;                               // 0x00
+
+  union {
+    uint32_t control;                              // 0x04
+    struct {
+      uint32_t control_bulk_service_ratio : 2;
+      uint32_t periodic_list_enable       : 1;
+      uint32_t isochronous_enable         : 1;
+      uint32_t control_list_enable        : 1;
+      uint32_t bulk_list_enable           : 1;
+      uint32_t hc_functional_state        : 2;
+      uint32_t interrupt_routing          : 1;
+      uint32_t remote_wakeup_connected    : 1;
+      uint32_t remote_wakeup_enale        : 1;
+      uint32_t TU_RESERVED                : 21;
+    }control_bit;
+  };
+
+  union {
+    uint32_t command_status;                       // 0x08
+    struct {
+      uint32_t controller_reset         : 1;
+      uint32_t control_list_filled      : 1;
+      uint32_t bulk_list_filled         : 1;
+      uint32_t ownership_change_request : 1;
+      uint32_t                          : 12;
+      uint32_t scheduling_overrun_count : 2;
+    }command_status_bit;
+  };
+
+  uint32_t interrupt_status;                       // 0x0C
+  uint32_t interrupt_enable;                       // 0x10
+  uint32_t interrupt_disable;                      // 0x14
+  uint32_t hcca;                                   // 0x18
+  uint32_t period_current_ed;                      // 0x1C
+  uint32_t control_head_ed;                        // 0x20
+  uint32_t control_current_ed;                     // 0x24
+  uint32_t bulk_head_ed;                           // 0x28
+  uint32_t bulk_current_ed;                        // 0x2C
+  uint32_t done_head;                              // 0x30
+  uint32_t frame_interval;                         // 0x34
+  uint32_t frame_remaining;                        // 0x38
+  uint32_t frame_number;                           // 0x3C
+  uint32_t periodic_start;                         // 0x40
+  uint32_t lowspeed_threshold;                     // 0x44
+
+  union {
+    uint32_t rh_descriptorA;                       // 0x48
+    struct {
+      uint32_t number_downstream_ports     : 8;
+      uint32_t power_switching_mode        : 1;
+      uint32_t no_power_switching          : 1;
+      uint32_t device_type                 : 1;
+      uint32_t overcurrent_protection_mode : 1;
+      uint32_t no_over_current_protection  : 1;
+      uint32_t reserved                    : 11;
+      uint32_t power_on_to_good_time       : 8;
+    } rh_descriptorA_bit;
+  };
+
+  union {
+    uint32_t rh_descriptorB;                       // 0x4C
+    struct {
+      uint32_t device_removable        : 16;
+      uint32_t port_power_control_mask : 16;
+    } rh_descriptorB_bit;
+  };
+
+  union {
+    uint32_t rh_status;                            // 0x50
+    struct {
+      uint32_t local_power_status            : 1;  // read Local Power Status; write: Clear Global Power
+      uint32_t over_current_indicator        : 1;
+      uint32_t                               : 13;
+      uint32_t device_remote_wakeup_enable   : 1;
+      uint32_t local_power_status_change     : 1;
+      uint32_t over_current_indicator_change : 1;
+      uint32_t                               : 13;
+      uint32_t clear_remote_wakeup_enable    : 1;
+    }rh_status_bit;
+  };
+
+  union {
+    uint32_t rhport_status[TUP_OHCI_RHPORTS];      // 0x54
+
+    struct {
+      uint32_t current_connect_status             : 1;
+      uint32_t port_enable_status                 : 1;
+      uint32_t port_suspend_status                : 1;
+      uint32_t port_over_current_indicator        : 1;
+      uint32_t port_reset_status                  : 1;
+      uint32_t                                    : 3;
+      uint32_t port_power_status                  : 1;
+      uint32_t low_speed_device_attached          : 1;
+      uint32_t                                    : 6;
+      uint32_t connect_status_change              : 1;
+      uint32_t port_enable_status_change          : 1;
+      uint32_t port_suspend_status_change         : 1;
+      uint32_t port_over_current_indicator_change : 1;
+      uint32_t port_reset_status_change           : 1;
+      uint32_t TU_RESERVED                        : 11;
+    }rhport_status_bit[TUP_OHCI_RHPORTS];
+  };
+}ohci_registers_t;
+
+TU_VERIFY_STATIC( sizeof(ohci_registers_t) == (0x54 + (4 * TUP_OHCI_RHPORTS)), "size is not correct");
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* TUSB_OHCI_H_ */
@@ -0,0 +1,70 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+#ifndef TUSB_OHCI_NXP_H
+#define TUSB_OHCI_NXP_H
+
+#if TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
+
+#include "chip.h"
+#define OHCI_REG   ((ohci_registers_t *) LPC_USB_BASE)
+
+void hcd_int_enable(uint8_t rhport) {
+  (void)rhport;
+  NVIC_EnableIRQ(USB_IRQn);
+}
+
+void hcd_int_disable(uint8_t rhport) {
+  (void)rhport;
+  NVIC_DisableIRQ(USB_IRQn);
+}
+
+static void ohci_phy_init(uint8_t rhport) {
+  (void) rhport;
+}
+
+#else
+
+#include "fsl_device_registers.h"
+
+// for LPC55 USB0 controller
+#define OHCI_REG  ((ohci_registers_t *) USBFSH_BASE)
+
+static void ohci_phy_init(uint8_t rhport) {
+  (void) rhport;
+}
+
+void hcd_int_enable(uint8_t rhport) {
+  (void)rhport;
+  NVIC_EnableIRQ(USB0_IRQn);
+}
+
+void hcd_int_disable(uint8_t rhport) {
+  (void)rhport;
+  NVIC_DisableIRQ(USB0_IRQn);
+}
+#endif
+
+#endif
@@ -0,0 +1,172 @@
+#ifndef RP2040_COMMON_H_
+#define RP2040_COMMON_H_
+
+#include "pico.h"
+#include "hardware/structs/usb.h"
+#include "hardware/irq.h"
+#include "hardware/resets.h"
+#include "hardware/timer.h"
+
+#include "common/tusb_common.h"
+#include "osal/osal.h"
+#include "common/tusb_fifo.h"
+
+#if defined(RP2040_USB_HOST_MODE) && defined(RP2040_USB_DEVICE_MODE)
+  #error TinyUSB device and host mode not supported at the same time
+#endif
+
+// E5 and E15 only apply to RP2040
+#if defined(PICO_RP2040) && PICO_RP2040 == 1
+  // RP2040 E5: USB device fails to exit RESET state on busy USB bus.
+  #if defined(PICO_RP2040_USB_DEVICE_ENUMERATION_FIX) && !defined(TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX)
+    #define TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX PICO_RP2040_USB_DEVICE_ENUMERATION_FIX
+  #endif
+
+  // RP2040 E15: USB Device controller will hang if certain bus errors occur during an IN transfer.
+  #if defined(PICO_RP2040_USB_DEVICE_UFRAME_FIX) && !defined(TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX)
+    #define TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX PICO_RP2040_USB_DEVICE_UFRAME_FIX
+  #endif
+#endif
+
+#ifndef TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX
+  #define TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX 0
+#endif
+
+#ifndef TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX
+  #define TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX 0
+#endif
+
+#if TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX
+  #undef PICO_RP2040_USB_FAST_IRQ
+  #define PICO_RP2040_USB_FAST_IRQ 1
+#endif
+
+#ifndef PICO_RP2040_USB_FAST_IRQ
+#define PICO_RP2040_USB_FAST_IRQ 0
+#endif
+
+#if PICO_RP2040_USB_FAST_IRQ
+#define __tusb_irq_path_func(x) __no_inline_not_in_flash_func(x)
+#else
+#define __tusb_irq_path_func(x) x
+#endif
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+#define usb_hw_set    ((usb_hw_t *) hw_set_alias_untyped(usb_hw))
+#define usb_hw_clear  ((usb_hw_t *) hw_clear_alias_untyped(usb_hw))
+
+#define pico_info(...)  TU_LOG(2, __VA_ARGS__)
+#define pico_trace(...) TU_LOG(3, __VA_ARGS__)
+
+// Hardware information per endpoint
+typedef struct hw_endpoint {
+  uint8_t ep_addr;
+  uint8_t next_pid;
+  bool    active;       // transferring data
+  bool    is_xfer_fifo; // transfer using fifo
+
+#if TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX
+  bool    e15_bulk_in; // Errata15 device bulk in
+  uint8_t pending;     // Transfer scheduled but not active
+#endif
+
+#if CFG_TUH_ENABLED
+  bool    configured;    // Is this a valid struct
+  uint8_t dev_addr;
+  uint8_t interrupt_num; // for host interrupt endpoints
+#endif
+
+  uint16_t wMaxPacketSize;
+  uint8_t *hw_data_buf; // Buffer pointer in usb dpram
+
+  // transfer info
+  union {
+    uint8_t   *user_buf; // User buffer in main memory
+    tu_fifo_t *user_fifo;
+  };
+  uint16_t remaining_len;
+  uint16_t xferred_len;
+
+} hw_endpoint_t;
+
+#if TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX
+extern volatile uint32_t e15_last_sof;
+#endif
+
+void rp2usb_init(void);
+
+// if usb hardware is in host mode
+TU_ATTR_ALWAYS_INLINE static inline bool rp2usb_is_host_mode(void) {
+  return (usb_hw->main_ctrl & USB_MAIN_CTRL_HOST_NDEVICE_BITS) ? true : false;
+}
+
+void hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, tu_fifo_t *ff, uint16_t total_len);
+bool hw_endpoint_xfer_continue(struct hw_endpoint *ep);
+void hw_endpoint_reset_transfer(struct hw_endpoint *ep);
+void hw_endpoint_start_next_buffer(struct hw_endpoint *ep);
+
+TU_ATTR_ALWAYS_INLINE static inline void hw_endpoint_lock_update(__unused struct hw_endpoint * ep, __unused int delta) {
+  // todo add critsec as necessary to prevent issues between worker and IRQ...
+  //  note that this is perhaps as simple as disabling IRQs because it would make
+  //  sense to have worker and IRQ on same core, however I think using critsec is about equivalent.
+}
+
+// #if CFG_TUD_ENABLED
+TU_ATTR_ALWAYS_INLINE static inline io_rw_32 *hwep_ctrl_reg_device(struct hw_endpoint *ep) {
+  uint8_t const epnum = tu_edpt_number(ep->ep_addr);
+  const uint8_t dir   = (uint8_t)tu_edpt_dir(ep->ep_addr);
+  if (epnum == 0) {
+    // EP0 has no endpoint control register because the buffer offsets are fixed and always enabled
+    return NULL;
+  }
+  return (dir == TUSB_DIR_IN) ? &usb_dpram->ep_ctrl[epnum - 1].in : &usb_dpram->ep_ctrl[epnum - 1].out;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline io_rw_32 *hwbuf_ctrl_reg_device(struct hw_endpoint *ep) {
+  const uint8_t epnum = tu_edpt_number(ep->ep_addr);
+  const uint8_t dir   = (uint8_t)tu_edpt_dir(ep->ep_addr);
+  return (dir == TUSB_DIR_IN) ? &usb_dpram->ep_buf_ctrl[epnum].in : &usb_dpram->ep_buf_ctrl[epnum].out;
+}
+// #endif
+
+#if CFG_TUH_ENABLED
+TU_ATTR_ALWAYS_INLINE static inline io_rw_32 *hwep_ctrl_reg_host(struct hw_endpoint *ep) {
+  if (tu_edpt_number(ep->ep_addr) == 0) {
+    return &usbh_dpram->epx_ctrl;
+  }
+  return &usbh_dpram->int_ep_ctrl[ep->interrupt_num].ctrl;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline io_rw_32 *hwbuf_ctrl_reg_host(struct hw_endpoint *ep) {
+  if (tu_edpt_number(ep->ep_addr) == 0) {
+    return &usbh_dpram->epx_buf_ctrl;
+  }
+  return &usbh_dpram->int_ep_buffer_ctrl[ep->interrupt_num].ctrl;
+}
+#endif
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+void hwbuf_ctrl_update(io_rw_32 *buf_ctrl_reg, uint32_t and_mask, uint32_t or_mask);
+
+TU_ATTR_ALWAYS_INLINE static inline void hwbuf_ctrl_set(io_rw_32 *buf_ctrl_reg, uint32_t value) {
+  hwbuf_ctrl_update(buf_ctrl_reg, 0, value);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void hwbuf_ctrl_set_mask(io_rw_32 *buf_ctrl_reg, uint32_t value) {
+  hwbuf_ctrl_update(buf_ctrl_reg, ~value, value);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void hwbuf_ctrl_clear_mask(io_rw_32 *buf_ctrl_reg, uint32_t value) {
+  hwbuf_ctrl_update(buf_ctrl_reg, ~value, 0);
+}
+
+static inline uintptr_t hw_data_offset(uint8_t *buf) {
+  // Remove usb base from buffer pointer
+  return (uintptr_t)buf ^ (uintptr_t)usb_dpram;
+}
+
+#endif
@@ -0,0 +1,58 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+#pragma once
+
+#include "common/tusb_common.h"
+#include "rusb2_type.h"
+
+#if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
+  #include "rusb2_rx.h"
+#elif TU_CHECK_MCU(OPT_MCU_RAXXX)
+  #include "rusb2_ra.h"
+
+  // Hack for D0FIFO definitions on RA Cortex-M23
+  #if defined(RENESAS_CORTEX_M23)
+    #define D0FIFO      CFIFO
+    #define D0FIFOSEL   CFIFOSEL
+    #define D0FIFOSEL_b CFIFOSEL_b
+    #define D1FIFOSEL   CFIFOSEL
+    #define D1FIFOSEL_b CFIFOSEL_b
+    #define D0FIFOCTR   CFIFOCTR
+    #define D0FIFOCTR_b CFIFOCTR_b
+  #endif
+
+#else
+  #error "Unsupported MCU"
+#endif
+
+
+//--------------------------------------------------------------------+
+// Common
+//--------------------------------------------------------------------+
+
+enum {
+  FIFOSEL_BIGEND = (TU_BYTE_ORDER == TU_BIG_ENDIAN ? RUSB2_FIFOSEL_BIGEND : 0)
+};
--- a/Show More
+++ b/Show More
				`@@ -0,0 +1 @@`
				`-march=rv32imafc_zicsr_zifencei_xesploop_xespv -mabi=ilp32f -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=unused-but-set-variable -Wno-error=deprecated-declarations -Wno-error=extra -Wno-unused-parameter -Wno-sign-compare -Wno-enum-conversion -gdwarf-4 -ggdb -nostartfiles -freorder-blocks -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -fno-jump-tables -fno-tree-switch-conversion -march=rv32imafc_zicsr_zifencei_xesppie`
				`@@ -0,0 +1 @@`
				-march=rv32imafc_zicsr_zifencei_xesploop_xespv -mabi=ilp32f -ffunction-sections -fdata-sections -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=unused-but-set-variable -Wno-error=deprecated-declarations -Wno-error=extra -Wno-unused-parameter -Wno-sign-compare -Wno-enum-conversion -gdwarf-4 -ggdb -nostartfiles -freorder-blocks -Wwrite-strings -fstack-protector -fstrict-volatile-bitfields -fno-jump-tables -fno-tree-switch-conversion -march=rv32imafc_zicsr_zifencei_xesppie -std=gnu17 -Wno-old-style-declaration
				`@@ -0,0 +1 @@`
				`-DESP32_ARDUINO_LIB_BUILDER -DESP_MDNS_VERSION_NUMBER=\"1.9.1\" -DESP_PLATFORM -DIDF_VER=\"v5.5.2-729-g87912cd291\" -DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" -DSOC_MMU_PAGE_SIZE=CONFIG_MMU_PAGE_SIZE -DSOC_XTAL_FREQ_MHZ=CONFIG_XTAL_FREQ -DUNITY_INCLUDE_CONFIG_H -D_GLIBCXX_HAVE_POSIX_SEMAPHORE -D_GLIBCXX_USE_POSIX_SEMAPHORE -D_GNU_SOURCE -D_POSIX_READER_WRITER_LOCKS -DTF_LITE_STATIC_MEMORY`
				`@@ -0,0 +1 @@`
				-nostartfiles -march=rv32imafc_zicsr_zifencei_xesploop_xespv -mabi=ilp32f -Wl,--cref -Wl,--defsym=IDF_TARGET_ESP32P4=0 -Wl,--no-warn-rwx-segments -Wl,--orphan-handling=warn -fno-rtti -fno-lto -Wl,--gc-sections -Wl,--warn-common -Wl,--wrap=esp_log_write -Wl,--wrap=esp_log_writev -Wl,--enable-non-contiguous-regions -Wl,--whole-archive -Wl,--no-whole-archive -u nvs_sec_provider_include_impl -u _Z5setupv -u _Z4loopv -u __wrap_esp_log_write -u __wrap_esp_log_writev -u esp_app_desc -u esp_efuse_startup_include_func -u start_app -u start_app_other_cores -u __ubsan_include -u esp_system_include_startup_funcs -u __assert_func -u esp_security_init_include_impl -u esp_sleep_gpio_include -Wl,--undefined=FreeRTOS_openocd_params -u app_main -u esp_libc_include_heap_impl -u esp_libc_include_reent_syscalls_impl -u esp_libc_include_syscalls_impl -u esp_libc_include_pthread_impl -u esp_libc_include_assert_impl -u esp_libc_include_getentropy_impl -u esp_libc_include_init_funcs -u esp_libc_init_funcs -u pthread_include_pthread_impl -u pthread_include_pthread_cond_var_impl -u pthread_include_pthread_local_storage_impl -u pthread_include_pthread_rwlock_impl -u pthread_include_pthread_semaphore_impl -u __cxa_guard_dummy -u __cxx_init_dummy -u esp_timer_init_include_func -u uart_vfs_include_dev_init -u usb_serial_jtag_vfs_include_dev_init -u usb_serial_jtag_connection_monitor_include -u esp_vfs_include_console_register -u vfs_include_syscalls_impl -u esp_vfs_include_nullfs_register -u esp_system_include_coredump_init
				`@@ -0,0 +1 @@`
				`-T rom.api.ld -T esp32p4.peripherals.ld -T esp32p4.rom.ld -T esp32p4.rom.api.ld -T esp32p4.rom.rvfp.ld -T esp32p4.rom.wdt.ld -T esp32p4.rom.systimer.ld -T esp32p4.rom.version.ld -T esp32p4.rom.libc.ld -T esp32p4.rom.libc-suboptimal_for_misaligned_mem.ld -T esp32p4.rom.newlib.ld -T memory.ld -T sections.ld`