Fix ULP RISCV toolchain file selection (#993)
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@@ -77,7 +77,7 @@ def get_component_includes(target_config):
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def generate_ulp_config(target_config):
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riscv_ulp_enabled = sdk_config.get("ESP32S2_ULP_COPROC_RISCV", False)
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riscv_ulp_enabled = sdk_config.get("ULP_COPROC_TYPE_RISCV", False)
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ulp_sources = collect_ulp_sources()
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ulp_sources.sort()
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@@ -90,8 +90,8 @@ def generate_ulp_config(target_config):
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"components",
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"ulp",
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"cmake",
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"toolchain-%s-ulp%s.cmake"
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% (idf_variant, "-riscv" if riscv_ulp_enabled else ""),
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"toolchain-%sulp%s.cmake"
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% ("" if riscv_ulp_enabled else idf_variant + "-", "-riscv" if riscv_ulp_enabled else ""),
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),
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'-DULP_S_SOURCES="%s"' % ";".join(ulp_sources),
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"-DULP_APP_NAME=ulp_main",
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