Add initial support for ULP programming // Issue #95

This commit is contained in:
valeros
2019-06-20 13:42:21 +03:00
parent 0dbb36de4d
commit 8d08246acd
24 changed files with 1823 additions and 0 deletions
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.pioenvs
.piolibdeps
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# Continuous Integration (CI) is the practice, in software
# engineering, of merging all developer working copies with a shared mainline
# several times a day < https://docs.platformio.org/page/ci/index.html >
#
# Documentation:
#
# * Travis CI Embedded Builds with PlatformIO
# < https://docs.travis-ci.com/user/integration/platformio/ >
#
# * PlatformIO integration with Travis CI
# < https://docs.platformio.org/page/ci/travis.html >
#
# * User Guide for `platformio ci` command
# < https://docs.platformio.org/page/userguide/cmd_ci.html >
#
#
# Please choose one of the following templates (proposed below) and uncomment
# it (remove "# " before each line) or use own configuration according to the
# Travis CI documentation (see above).
#
#
# Template #1: General project. Test it using existing `platformio.ini`.
#
# language: python
# python:
# - "2.7"
#
# sudo: false
# cache:
# directories:
# - "~/.platformio"
#
# install:
# - pip install -U platformio
# - platformio update
#
# script:
# - platformio run
#
# Template #2: The project is intended to be used as a library with examples.
#
# language: python
# python:
# - "2.7"
#
# sudo: false
# cache:
# directories:
# - "~/.platformio"
#
# env:
# - PLATFORMIO_CI_SRC=path/to/test/file.c
# - PLATFORMIO_CI_SRC=examples/file.ino
# - PLATFORMIO_CI_SRC=path/to/test/directory
#
# install:
# - pip install -U platformio
# - platformio update
#
# script:
# - platformio ci --lib="." --board=ID_1 --board=ID_2 --board=ID_N
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.. Copyright 2014-present PlatformIO <contact@platformio.org>
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
How to build PlatformIO based project
=====================================
1. `Install PlatformIO Core <http://docs.platformio.org/page/core.html>`_
2. Download `development platform with examples <https://github.com/platformio/platform-espressif32/archive/develop.zip>`_
3. Extract ZIP archive
4. Run these commands:
.. code-block:: bash
# Change directory to example
> cd platform-espressif32/examples/espidf-ulp-adc
# Build project
> platformio run
# Upload firmware
> platformio run --target upload
# Build specific environment
> platformio run -e esp32dev
# Upload firmware for the specific environment
> platformio run -e esp32dev --target upload
# Clean build files
> platformio run --target clean
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This directory is intended for project header files.
A header file is a file containing C declarations and macro definitions
to be shared between several project source files. You request the use of a
header file in your project source file (C, C++, etc) located in `src` folder
by including it, with the C preprocessing directive `#include'.
```src/main.c
#include "header.h"
int main (void)
{
...
}
```
Including a header file produces the same results as copying the header file
into each source file that needs it. Such copying would be time-consuming
and error-prone. With a header file, the related declarations appear
in only one place. If they need to be changed, they can be changed in one
place, and programs that include the header file will automatically use the
new version when next recompiled. The header file eliminates the labor of
finding and changing all the copies as well as the risk that a failure to
find one copy will result in inconsistencies within a program.
In C, the usual convention is to give header files names that end with `.h'.
It is most portable to use only letters, digits, dashes, and underscores in
header file names, and at most one dot.
Read more about using header files in official GCC documentation:
* Include Syntax
* Include Operation
* Once-Only Headers
* Computed Includes
https://gcc.gnu.org/onlinedocs/cpp/Header-Files.html
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This directory is intended for project specific (private) libraries.
PlatformIO will compile them to static libraries and link into executable file.
The source code of each library should be placed in a an own separate directory
("lib/your_library_name/[here are source files]").
For example, see a structure of the following two libraries `Foo` and `Bar`:
|--lib
| |
| |--Bar
| | |--docs
| | |--examples
| | |--src
| | |- Bar.c
| | |- Bar.h
| | |- library.json (optional, custom build options, etc) https://docs.platformio.org/page/librarymanager/config.html
| |
| |--Foo
| | |- Foo.c
| | |- Foo.h
| |
| |- README --> THIS FILE
|
|- platformio.ini
|--src
|- main.c
and a contents of `src/main.c`:
```
#include <Foo.h>
#include <Bar.h>
int main (void)
{
...
}
```
PlatformIO Library Dependency Finder will find automatically dependent
libraries scanning project source files.
More information about PlatformIO Library Dependency Finder
- https://docs.platformio.org/page/librarymanager/ldf.html
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; PlatformIO Project Configuration File
;
; Build options: build flags, source filter, extra scripting
; Upload options: custom port, speed and extra flags
; Library options: dependencies, extra library storages
;
; Please visit documentation for the other options and examples
; http://docs.platformio.org/page/projectconf.html
[env:esp32dev]
platform = espressif32
framework = espidf
board = esp32dev
build_flags = -DCONFIG_WIFI_SSID=\"ESP_AP\" -DCONFIG_WIFI_PASSWORD=\"MYPASS\"
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/*
*
* Automatically generated file; DO NOT EDIT.
* Espressif IoT Development Framework Configuration
*
*/
#define CONFIG_ULP_COPROC_ENABLED 1
#define CONFIG_ULP_COPROC_RESERVE_MEM 1024
#define CONFIG_GATTC_ENABLE 1
#define CONFIG_ESP32_PHY_MAX_TX_POWER 20
#define CONFIG_TRACEMEM_RESERVE_DRAM 0x0
#define CONFIG_FREERTOS_MAX_TASK_NAME_LEN 16
#define CONFIG_MQTT_TRANSPORT_SSL 1
#define CONFIG_BLE_SMP_ENABLE 1
#define CONFIG_SDP_INITIAL_TRACE_LEVEL 2
#define CONFIG_MB_SERIAL_TASK_PRIO 10
#define CONFIG_MQTT_PROTOCOL_311 1
#define CONFIG_TCP_RECVMBOX_SIZE 6
#define CONFIG_FATFS_CODEPAGE_437 1
#define CONFIG_BLE_SCAN_DUPLICATE 1
#define CONFIG_AVDT_TRACE_LEVEL_WARNING 1
#define CONFIG_AWS_IOT_SHADOW_MAX_SIMULTANEOUS_ACKS 10
#define CONFIG_TCP_WND_DEFAULT 5744
#define CONFIG_PARTITION_TABLE_OFFSET 0x8000
#define CONFIG_SW_COEXIST_ENABLE 1
#define CONFIG_SPIFFS_USE_MAGIC_LENGTH 1
#define CONFIG_AVCT_INITIAL_TRACE_LEVEL 2
#define CONFIG_IPC_TASK_STACK_SIZE 1024
#define CONFIG_FATFS_PER_FILE_CACHE 1
#define CONFIG_ESPTOOLPY_FLASHFREQ "40m"
#define CONFIG_AWS_IOT_SHADOW_MAX_SIZE_OF_THING_NAME 20
#define CONFIG_MBEDTLS_KEY_EXCHANGE_RSA 1
#define CONFIG_UDP_RECVMBOX_SIZE 6
#define CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE 0
#define CONFIG_MBEDTLS_AES_C 1
#define CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED 1
#define CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN 752
#define CONFIG_MBEDTLS_GCM_C 1
#define CONFIG_ESPTOOLPY_FLASHSIZE "2MB"
#define CONFIG_HEAP_POISONING_DISABLED 1
#define CONFIG_SPIFFS_CACHE_WR 1
#define CONFIG_BROWNOUT_DET_LVL_SEL_0 1
#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER 1
#define CONFIG_EMAC_L2_TO_L3_RX_BUF_MODE 1
#define CONFIG_BTDM_CONTROLLER_MODEM_SLEEP 1
#define CONFIG_SPIFFS_CACHE 1
#define CONFIG_INT_WDT 1
#define CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN 3
#define CONFIG_MBEDTLS_SSL_PROTO_TLS1 1
#define CONFIG_ESP_GRATUITOUS_ARP 1
#define CONFIG_AWS_IOT_SHADOW_MAX_SIZE_OF_UNIQUE_CLIENT_ID_BYTES 80
#define CONFIG_MBEDTLS_ECDSA_C 1
#define CONFIG_ESPTOOLPY_FLASHFREQ_40M 1
#define CONFIG_LOG_BOOTLOADER_LEVEL_INFO 1
#define CONFIG_ESPTOOLPY_FLASHSIZE_2MB 1
#define CONFIG_HTTPD_MAX_REQ_HDR_LEN 512
#define CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE 0
#define CONFIG_AWS_IOT_MQTT_PORT 8883
#define CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS 1
#define CONFIG_MBEDTLS_ECDH_C 1
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE 1
#define CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM 10
#define CONFIG_AWS_IOT_MQTT_MAX_RECONNECT_WAIT_INTERVAL 128000
#define CONFIG_MBEDTLS_SSL_ALPN 1
#define CONFIG_BTM_TRACE_LEVEL_WARNING 1
#define CONFIG_MBEDTLS_PEM_WRITE_C 1
#define CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN 4096
#define CONFIG_RFCOMM_TRACE_LEVEL_WARNING 1
#define CONFIG_LOG_DEFAULT_LEVEL_INFO 1
#define CONFIG_BT_RESERVE_DRAM 0xdb5c
#define CONFIG_FATFS_FS_LOCK 0
#define CONFIG_IP_LOST_TIMER_INTERVAL 120
#define CONFIG_SPIFFS_META_LENGTH 4
#define CONFIG_ESP32_PANIC_PRINT_REBOOT 1
#define CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE 20
#define CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED 1
#define CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED 1
#define CONFIG_AWS_IOT_MQTT_RX_BUF_LEN 512
#define CONFIG_MB_SERIAL_BUF_SIZE 256
#define CONFIG_CONSOLE_UART_BAUDRATE 115200
#define CONFIG_LWIP_MAX_SOCKETS 10
#define CONFIG_LWIP_NETIF_LOOPBACK 1
#define CONFIG_MCA_TRACE_LEVEL_WARNING 1
#define CONFIG_EMAC_TASK_PRIORITY 20
#define CONFIG_TIMER_TASK_STACK_DEPTH 2048
#define CONFIG_TCP_MSS 1436
#define CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED 1
#define CONFIG_BTIF_INITIAL_TRACE_LEVEL 2
#define CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN_EFF 3
#define CONFIG_FATFS_CODEPAGE 437
#define CONFIG_APPL_TRACE_LEVEL_WARNING 1
#define CONFIG_BTC_INITIAL_TRACE_LEVEL 2
#define CONFIG_ESP32_DEFAULT_CPU_FREQ_160 1
#define CONFIG_LWIP_MAX_UDP_PCBS 16
#define CONFIG_ESPTOOLPY_BAUD 115200
#define CONFIG_INT_WDT_CHECK_CPU1 1
#define CONFIG_AVRC_INITIAL_TRACE_LEVEL 2
#define CONFIG_ADC_CAL_LUT_ENABLE 1
#define CONFIG_AWS_IOT_MQTT_TX_BUF_LEN 512
#define CONFIG_FLASHMODE_DIO 1
#define CONFIG_ESPTOOLPY_AFTER_RESET 1
#define CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED 1
#define CONFIG_LWIP_DHCPS_MAX_STATION_NUM 8
#define CONFIG_TOOLPREFIX "xtensa-esp32-elf-"
#define CONFIG_MBEDTLS_ECP_C 1
#define CONFIG_FREERTOS_IDLE_TASK_STACKSIZE 1536
#define CONFIG_MBEDTLS_RC4_DISABLED 1
#define CONFIG_GAP_TRACE_LEVEL_WARNING 1
#define CONFIG_CONSOLE_UART_NUM 0
#define CONFIG_AWS_IOT_SHADOW_MAX_JSON_TOKEN_EXPECTED 120
#define CONFIG_ESP32_APPTRACE_LOCK_ENABLE 1
#define CONFIG_PTHREAD_STACK_MIN 768
#define CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC 1
#define CONFIG_ESPTOOLPY_BAUD_115200B 1
#define CONFIG_TCP_OVERSIZE_MSS 1
#define CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS 1
#define CONFIG_CONSOLE_UART_DEFAULT 1
#define CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS 4
#define CONFIG_GATT_TRACE_LEVEL_WARNING 1
#define CONFIG_ESPTOOLPY_FLASHSIZE_DETECT 1
#define CONFIG_EXAMPLE_EMBEDDED_CERTS 1
#define CONFIG_TIMER_TASK_STACK_SIZE 3584
#define CONFIG_BTIF_TRACE_LEVEL_WARNING 1
#define CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE 1
#define CONFIG_HCI_INITIAL_TRACE_LEVEL 2
#define CONFIG_AVDT_INITIAL_TRACE_LEVEL 2
#define CONFIG_MBEDTLS_X509_CRL_PARSE_C 1
#define CONFIG_SCAN_DUPLICATE_BY_DEVICE_ADDR 1
#define CONFIG_AWS_IOT_SHADOW_MAX_SHADOW_TOPIC_LENGTH_WITHOUT_THINGNAME 60
#define CONFIG_MB_SERIAL_TASK_STACK_SIZE 2048
#define CONFIG_GATTS_SEND_SERVICE_CHANGE_AUTO 1
#define CONFIG_LWIP_DHCPS_LEASE_UNIT 60
#define CONFIG_SPIFFS_USE_MAGIC 1
#define CONFIG_TCPIP_TASK_STACK_SIZE 3072
#define CONFIG_BLUFI_TRACE_LEVEL_WARNING 1
#define CONFIG_BLUEDROID_PINNED_TO_CORE_0 1
#define CONFIG_TASK_WDT 1
#define CONFIG_RFCOMM_INITIAL_TRACE_LEVEL 2
#define CONFIG_MAIN_TASK_STACK_SIZE 3584
#define CONFIG_SPIFFS_PAGE_CHECK 1
#define CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0 1
#define CONFIG_LWIP_MAX_ACTIVE_TCP 16
#define CONFIG_TASK_WDT_TIMEOUT_S 5
#define CONFIG_INT_WDT_TIMEOUT_MS 300
#define CONFIG_ESPTOOLPY_FLASHMODE "dio"
#define CONFIG_BTC_TASK_STACK_SIZE 3072
#define CONFIG_BLUEDROID_ENABLED 1
#define CONFIG_NEWLIB_STDIN_LINE_ENDING_CR 1
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA 1
#define CONFIG_ESPTOOLPY_BEFORE "default_reset"
#define CONFIG_ADC2_DISABLE_DAC 1
#define CONFIG_FATFS_LFN_HEAP 1
#define CONFIG_BLE_ADV_REPORT_FLOW_CONTROL_NUM 100
#define CONFIG_LOG_DEFAULT_LEVEL 3
#define CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION 1
#define CONFIG_TIMER_QUEUE_LENGTH 10
#define CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT 1
#define CONFIG_GATTS_SEND_SERVICE_CHANGE_MODE 0
#define CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY 1
#define CONFIG_MAKE_WARN_UNDEFINED_VARIABLES 1
#define CONFIG_FATFS_TIMEOUT_MS 10000
#define CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM 32
#define CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS 1
#define CONFIG_PAN_INITIAL_TRACE_LEVEL 2
#define CONFIG_MBEDTLS_CCM_C 1
#define CONFIG_SPI_MASTER_ISR_IN_IRAM 1
#define CONFIG_MCA_INITIAL_TRACE_LEVEL 2
#define CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER 20
#define CONFIG_A2D_INITIAL_TRACE_LEVEL 2
#define CONFIG_ESP32_RTC_CLK_CAL_CYCLES 1024
#define CONFIG_ESP32_WIFI_TX_BA_WIN 6
#define CONFIG_ESP32_WIFI_NVS_ENABLED 1
#define CONFIG_MDNS_MAX_SERVICES 10
#define CONFIG_EMAC_CHECK_LINK_PERIOD_MS 2000
#define CONFIG_BTDM_LPCLK_SEL_MAIN_XTAL 1
#define CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED 1
#define CONFIG_LIBSODIUM_USE_MBEDTLS_SHA 1
#define CONFIG_AWS_IOT_SDK 1
#define CONFIG_DMA_RX_BUF_NUM 10
#define CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED 1
#define CONFIG_TCP_SYNMAXRTX 6
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA 1
#define CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_EFF 0
#define CONFIG_PYTHON "python"
#define CONFIG_MBEDTLS_ECP_NIST_OPTIM 1
#define CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1 1
#define CONFIG_ESPTOOLPY_COMPRESSED 1
#define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv"
#define CONFIG_MB_CONTROLLER_STACK_SIZE 4096
#define CONFIG_TCP_SND_BUF_DEFAULT 5744
#define CONFIG_GARP_TMR_INTERVAL 60
#define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
#define CONFIG_BNEP_INITIAL_TRACE_LEVEL 2
#define CONFIG_HCI_TRACE_LEVEL_WARNING 1
#define CONFIG_TCP_MSL 60000
#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_1 1
#define CONFIG_LWIP_SO_REUSE_RXTOALL 1
#define CONFIG_MB_CONTROLLER_NOTIFY_TIMEOUT 20
#define CONFIG_PARTITION_TABLE_SINGLE_APP 1
#define CONFIG_ESP32_WIFI_RX_BA_WIN 6
#define CONFIG_MBEDTLS_X509_CSR_PARSE_C 1
#define CONFIG_SPIFFS_USE_MTIME 1
#define CONFIG_BTC_TRACE_LEVEL_WARNING 1
#define CONFIG_EMAC_TASK_STACK_SIZE 3072
#define CONFIG_SMP_TRACE_LEVEL_WARNING 1
#define CONFIG_MB_QUEUE_LENGTH 20
#define CONFIG_SW_COEXIST_PREFERENCE_VALUE 2
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA 1
#define CONFIG_LWIP_DHCP_DOES_ARP_CHECK 1
#define CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER 1
#define CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE 2304
#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
#define CONFIG_A2D_TRACE_LEVEL_WARNING 1
#define CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY 2000
#define CONFIG_AWS_IOT_MQTT_NUM_SUBSCRIBE_HANDLERS 5
#define CONFIG_BROWNOUT_DET_LVL 0
#define CONFIG_MBEDTLS_PEM_PARSE_C 1
#define CONFIG_SPIFFS_GC_MAX_RUNS 10
#define CONFIG_ESP32_APPTRACE_DEST_NONE 1
#define CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC 1
#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_2 1
#define CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA 1
#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM 32
#define CONFIG_HTTPD_MAX_URI_LEN 512
#define CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED 1
#define CONFIG_AVCT_TRACE_LEVEL_WARNING 1
#define CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED 1
#define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1 1
#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 160
#define CONFIG_MBEDTLS_HARDWARE_AES 1
#define CONFIG_FREERTOS_HZ 100
#define CONFIG_LOG_COLORS 1
#define CONFIG_OSI_TRACE_LEVEL_WARNING 1
#define CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE 1
#define CONFIG_STACK_CHECK_NONE 1
#define CONFIG_ADC_CAL_EFUSE_TP_ENABLE 1
#define CONFIG_BNEP_TRACE_LEVEL_WARNING 1
#define CONFIG_FREERTOS_ASSERT_FAIL_ABORT 1
#define CONFIG_BROWNOUT_DET 1
#define CONFIG_AWS_IOT_SHADOW_MAX_SIMULTANEOUS_THINGNAMES 10
#define CONFIG_ESP32_XTAL_FREQ 40
#define CONFIG_OSI_INITIAL_TRACE_LEVEL 2
#define CONFIG_MONITOR_BAUD_115200B 1
#define CONFIG_LOG_BOOTLOADER_LEVEL 3
#define CONFIG_MBEDTLS_TLS_ENABLED 1
#define CONFIG_LWIP_MAX_RAW_PCBS 16
#define CONFIG_SMP_ENABLE 1
#define CONFIG_HID_TRACE_LEVEL_WARNING 1
#define CONFIG_AVRC_TRACE_LEVEL_WARNING 1
#define CONFIG_MBEDTLS_SSL_SESSION_TICKETS 1
#define CONFIG_SPIFFS_MAX_PARTITIONS 3
#define CONFIG_ESP_ERR_TO_NAME_LOOKUP 1
#define CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE_0 1
#define CONFIG_MBEDTLS_SSL_RENEGOTIATION 1
#define CONFIG_HID_INITIAL_TRACE_LEVEL 2
#define CONFIG_ESPTOOLPY_BEFORE_RESET 1
#define CONFIG_MB_EVENT_QUEUE_TIMEOUT 20
#define CONFIG_ESPTOOLPY_BAUD_OTHER_VAL 115200
#define CONFIG_AWS_EXAMPLE_CLIENT_ID "myesp32"
#define CONFIG_SPIFFS_OBJ_NAME_LEN 32
#define CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT 5
#define CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_EFF 0
#define CONFIG_PARTITION_TABLE_MD5 1
#define CONFIG_TCPIP_RECVMBOX_SIZE 32
#define CONFIG_TCP_MAXRTX 12
#define CONFIG_BTM_INITIAL_TRACE_LEVEL 2
#define CONFIG_ESPTOOLPY_AFTER "hard_reset"
#define CONFIG_TCPIP_TASK_AFFINITY 0x7FFFFFFF
#define CONFIG_LWIP_SO_REUSE 1
#define CONFIG_ESP32_XTAL_FREQ_40 1
#define CONFIG_BTDM_CONTROLLER_MODE_BLE_ONLY 1
#define CONFIG_DMA_TX_BUF_NUM 10
#define CONFIG_LWIP_MAX_LISTENING_TCP 16
#define CONFIG_FREERTOS_INTERRUPT_BACKTRACE 1
#define CONFIG_WL_SECTOR_SIZE 4096
#define CONFIG_ESP32_DEBUG_OCDAWARE 1
#define CONFIG_MQTT_TRANSPORT_WEBSOCKET 1
#define CONFIG_TIMER_TASK_PRIORITY 1
#define CONFIG_MBEDTLS_TLS_CLIENT 1
#define CONFIG_AWS_IOT_MQTT_MIN_RECONNECT_WAIT_INTERVAL 1000
#define CONFIG_BTDM_CONTROLLER_HCI_MODE_VHCI 1
#define CONFIG_BT_ENABLED 1
#define CONFIG_SDP_TRACE_LEVEL_WARNING 1
#define CONFIG_SW_COEXIST_PREFERENCE_BALANCE 1
#define CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED 1
#define CONFIG_MONITOR_BAUD 115200
#define CONFIG_ESP32_DEBUG_STUBS_ENABLE 1
#define CONFIG_TCPIP_LWIP 1
#define CONFIG_REDUCE_PHY_TX_POWER 1
#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
#define CONFIG_PAN_TRACE_LEVEL_WARNING 1
#define CONFIG_FREERTOS_CORETIMER_0 1
#define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv"
#define CONFIG_MBEDTLS_HAVE_TIME 1
#define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY 1
#define CONFIG_TCP_QUEUE_OOSEQ 1
#define CONFIG_GATTS_ENABLE 1
#define CONFIG_ADC_CAL_EFUSE_VREF_ENABLE 1
#define CONFIG_MBEDTLS_TLS_SERVER 1
#define CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT 1
#define CONFIG_BLE_ADV_REPORT_FLOW_CONTROL_SUPPORTED 1
#define CONFIG_FREERTOS_ISR_STACKSIZE 1536
#define CONFIG_SUPPORT_TERMIOS 1
#define CONFIG_OPENSSL_ASSERT_DO_NOTHING 1
#define CONFIG_WL_SECTOR_SIZE_4096 1
#define CONFIG_OPTIMIZATION_LEVEL_DEBUG 1
#define CONFIG_GATT_INITIAL_TRACE_LEVEL 2
#define CONFIG_FREERTOS_NO_AFFINITY 0x7FFFFFFF
#define CONFIG_AWS_IOT_MQTT_HOST ""
#define CONFIG_L2CAP_TRACE_LEVEL_WARNING 1
#define CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED 1
#define CONFIG_MB_TIMER_INDEX 0
#define CONFIG_SCAN_DUPLICATE_TYPE 0
#define CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED 1
#define CONFIG_APPL_INITIAL_TRACE_LEVEL 2
#define CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED 1
#define CONFIG_SMP_INITIAL_TRACE_LEVEL 2
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA 1
#define CONFIG_SPI_SLAVE_ISR_IN_IRAM 1
#define CONFIG_L2CAP_INITIAL_TRACE_LEVEL 2
#define CONFIG_SYSTEM_EVENT_QUEUE_SIZE 32
#define CONFIG_BT_ACL_CONNECTIONS 4
#define CONFIG_FATFS_MAX_LFN 255
#define CONFIG_ESP32_WIFI_TX_BUFFER_TYPE 1
#define CONFIG_BOOTLOADER_WDT_ENABLE 1
#define CONFIG_GAP_INITIAL_TRACE_LEVEL 2
#define CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED 1
#define CONFIG_LWIP_LOOPBACK_MAX_PBUFS 8
#define CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN 16384
#define CONFIG_MB_TIMER_GROUP 0
#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
#define CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE 1
#define CONFIG_SPIFFS_PAGE_SIZE 256
#define CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED 1
#define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0 1
#define CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT 3072
#define CONFIG_MB_TIMER_PORT_ENABLED 1
#define CONFIG_DUPLICATE_SCAN_CACHE_SIZE 200
#define CONFIG_MONITOR_BAUD_OTHER_VAL 115200
#define CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF 1
#define CONFIG_ESPTOOLPY_PORT "/dev/ttyUSB0"
#define CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS 1
#define CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN 1
#define CONFIG_BLE_ADV_REPORT_DISCARD_THRSHOLD 20
#define CONFIG_BLUEDROID_PINNED_TO_CORE 0
#define CONFIG_BTDM_MODEM_SLEEP_MODE_ORIG 1
#define CONFIG_ESP32_WIFI_IRAM_OPT 1
#define CONFIG_BLUFI_INITIAL_TRACE_LEVEL 2
#define CONFIG_FATFS_API_ENCODING_ANSI_OEM 1
@@ -0,0 +1,94 @@
/* ULP Example
This example code is in the Public Domain (or CC0 licensed, at your option.)
Unless required by applicable law or agreed to in writing, this
software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
CONDITIONS OF ANY KIND, either express or implied.
*/
#include <stdio.h>
#include <string.h>
#include "esp_sleep.h"
#include "nvs.h"
#include "nvs_flash.h"
#include "soc/rtc_cntl_reg.h"
#include "soc/sens_reg.h"
#include "driver/gpio.h"
#include "driver/rtc_io.h"
#include "driver/adc.h"
#include "driver/dac.h"
#include "esp32/ulp.h"
#include "ulp_main.h"
extern const uint8_t ulp_main_bin_start[] asm("_binary_ulp_main_bin_start");
extern const uint8_t ulp_main_bin_end[] asm("_binary_ulp_main_bin_end");
/* This function is called once after power-on reset, to load ULP program into
* RTC memory and configure the ADC.
*/
static void init_ulp_program();
/* This function is called every time before going into deep sleep.
* It starts the ULP program and resets measurement counter.
*/
static void start_ulp_program();
void app_main()
{
esp_sleep_wakeup_cause_t cause = esp_sleep_get_wakeup_cause();
if (cause != ESP_SLEEP_WAKEUP_ULP) {
printf("Not ULP wakeup\n");
init_ulp_program();
} else {
printf("Deep sleep wakeup\n");
printf("ULP did %d measurements since last reset\n", ulp_sample_counter & UINT16_MAX);
printf("Thresholds: low=%d high=%d\n", ulp_low_thr, ulp_high_thr);
ulp_last_result &= UINT16_MAX;
printf("Value=%d was %s threshold\n", ulp_last_result,
ulp_last_result < ulp_low_thr ? "below" : "above");
}
printf("Entering deep sleep\n\n");
start_ulp_program();
ESP_ERROR_CHECK( esp_sleep_enable_ulp_wakeup() );
esp_deep_sleep_start();
}
static void init_ulp_program()
{
esp_err_t err = ulp_load_binary(0, ulp_main_bin_start,
(ulp_main_bin_end - ulp_main_bin_start) / sizeof(uint32_t));
ESP_ERROR_CHECK(err);
/* Configure ADC channel */
/* Note: when changing channel here, also change 'adc_channel' constant
in adc.S */
adc1_config_channel_atten(ADC1_CHANNEL_6, ADC_ATTEN_DB_11);
adc1_config_width(ADC_WIDTH_BIT_12);
adc1_ulp_enable();
/* Set low and high thresholds, approx. 1.35V - 1.75V*/
ulp_low_thr = 1500;
ulp_high_thr = 2000;
/* Set ULP wake up period to 20ms */
ulp_set_wakeup_period(0, 2000000);
/* Disconnect GPIO12 and GPIO15 to remove current drain through
* pullup/pulldown resistors.
* GPIO12 may be pulled high to select flash voltage.
*/
rtc_gpio_isolate(GPIO_NUM_12);
rtc_gpio_isolate(GPIO_NUM_15);
esp_deep_sleep_disable_rom_logging(); // suppress boot messages
}
static void start_ulp_program()
{
/* Reset sample counter */
ulp_sample_counter = 0;
/* Start the program */
esp_err_t err = ulp_run(&ulp_entry - RTC_SLOW_MEM);
ESP_ERROR_CHECK(err);
}
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This directory is intended for PIO Unit Testing and project tests.
Unit Testing is a software testing method by which individual units of
source code, sets of one or more MCU program modules together with associated
control data, usage procedures, and operating procedures, are tested to
determine whether they are fit for use. Unit testing finds problems early
in the development cycle.
More information about PIO Unit Testing:
- https://docs.platformio.org/page/plus/unit-testing.html
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/* ULP Example: using ADC in deep sleep
This example code is in the Public Domain (or CC0 licensed, at your option.)
Unless required by applicable law or agreed to in writing, this
software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
CONDITIONS OF ANY KIND, either express or implied.
This file contains assembly code which runs on the ULP.
ULP wakes up to run this code at a certain period, determined by the values
in SENS_ULP_CP_SLEEP_CYCx_REG registers. On each wake up, the program
measures input voltage on the given ADC channel 'adc_oversampling_factor'
times. Measurements are accumulated and average value is calculated.
Average value is compared to the two thresholds: 'low_thr' and 'high_thr'.
If the value is less than 'low_thr' or more than 'high_thr', ULP wakes up
the chip from deep sleep.
*/
/* ULP assembly files are passed through C preprocessor first, so include directives
and C macros may be used in these files
*/
#include "soc/rtc_cntl_reg.h"
#include "soc/soc_ulp.h"
/* ADC1 channel 6, GPIO34 */
.set adc_channel, 6
/* Configure the number of ADC samples to average on each measurement.
For convenience, make it a power of 2. */
.set adc_oversampling_factor_log, 2
.set adc_oversampling_factor, (1 << adc_oversampling_factor_log)
/* Define variables, which go into .bss section (zero-initialized data) */
.bss
/* Low threshold of ADC reading.
Set by the main program. */
.global low_thr
low_thr:
.long 0
/* High threshold of ADC reading.
Set by the main program. */
.global high_thr
high_thr:
.long 0
/* Counter of measurements done */
.global sample_counter
sample_counter:
.long 0
.global last_result
last_result:
.long 0
/* Code goes into .text section */
.text
.global entry
entry:
/* increment sample counter */
move r3, sample_counter
ld r2, r3, 0
add r2, r2, 1
st r2, r3, 0
/* do measurements using ADC */
/* r0 will be used as accumulator */
move r0, 0
/* initialize the loop counter */
stage_rst
measure:
/* measure and add value to accumulator */
adc r1, 0, adc_channel + 1
add r0, r0, r1
/* increment loop counter and check exit condition */
stage_inc 1
jumps measure, adc_oversampling_factor, lt
/* divide accumulator by adc_oversampling_factor.
Since it is chosen as a power of two, use right shift */
rsh r0, r0, adc_oversampling_factor_log
/* averaged value is now in r0; store it into last_result */
move r3, last_result
st r0, r3, 0
/* compare with low_thr; wake up if value < low_thr */
move r3, low_thr
ld r3, r3, 0
sub r3, r0, r3
jump wake_up, ov
/* compare with high_thr; wake up if value > high_thr */
move r3, high_thr
ld r3, r3, 0
sub r3, r3, r0
jump wake_up, ov
/* value within range, end the program */
.global exit
exit:
halt
.global wake_up
wake_up:
/* Check if the system can be woken up */
READ_RTC_FIELD(RTC_CNTL_LOW_POWER_ST_REG, RTC_CNTL_RDY_FOR_WAKEUP)
and r0, r0, 1
jump exit, eq
/* Wake up the SoC, end program */
wake
WRITE_RTC_FIELD(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN, 0)
halt
+2
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@@ -0,0 +1,2 @@
.pioenvs
.piolibdeps
+67
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# Continuous Integration (CI) is the practice, in software
# engineering, of merging all developer working copies with a shared mainline
# several times a day < https://docs.platformio.org/page/ci/index.html >
#
# Documentation:
#
# * Travis CI Embedded Builds with PlatformIO
# < https://docs.travis-ci.com/user/integration/platformio/ >
#
# * PlatformIO integration with Travis CI
# < https://docs.platformio.org/page/ci/travis.html >
#
# * User Guide for `platformio ci` command
# < https://docs.platformio.org/page/userguide/cmd_ci.html >
#
#
# Please choose one of the following templates (proposed below) and uncomment
# it (remove "# " before each line) or use own configuration according to the
# Travis CI documentation (see above).
#
#
# Template #1: General project. Test it using existing `platformio.ini`.
#
# language: python
# python:
# - "2.7"
#
# sudo: false
# cache:
# directories:
# - "~/.platformio"
#
# install:
# - pip install -U platformio
# - platformio update
#
# script:
# - platformio run
#
# Template #2: The project is intended to be used as a library with examples.
#
# language: python
# python:
# - "2.7"
#
# sudo: false
# cache:
# directories:
# - "~/.platformio"
#
# env:
# - PLATFORMIO_CI_SRC=path/to/test/file.c
# - PLATFORMIO_CI_SRC=examples/file.ino
# - PLATFORMIO_CI_SRC=path/to/test/directory
#
# install:
# - pip install -U platformio
# - platformio update
#
# script:
# - platformio ci --lib="." --board=ID_1 --board=ID_2 --board=ID_N
+38
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@@ -0,0 +1,38 @@
.. Copyright 2014-present PlatformIO <contact@platformio.org>
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
How to build PlatformIO based project
=====================================
1. `Install PlatformIO Core <http://docs.platformio.org/page/core.html>`_
2. Download `development platform with examples <https://github.com/platformio/platform-espressif32/archive/develop.zip>`_
3. Extract ZIP archive
4. Run these commands:
.. code-block:: bash
# Change directory to example
> cd platform-espressif32/examples/espidf-ulp-pulse
# Build project
> platformio run
# Upload firmware
> platformio run --target upload
# Build specific environment
> platformio run -e esp32dev
# Upload firmware for the specific environment
> platformio run -e esp32dev --target upload
# Clean build files
> platformio run --target clean
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This directory is intended for project header files.
A header file is a file containing C declarations and macro definitions
to be shared between several project source files. You request the use of a
header file in your project source file (C, C++, etc) located in `src` folder
by including it, with the C preprocessing directive `#include'.
```src/main.c
#include "header.h"
int main (void)
{
...
}
```
Including a header file produces the same results as copying the header file
into each source file that needs it. Such copying would be time-consuming
and error-prone. With a header file, the related declarations appear
in only one place. If they need to be changed, they can be changed in one
place, and programs that include the header file will automatically use the
new version when next recompiled. The header file eliminates the labor of
finding and changing all the copies as well as the risk that a failure to
find one copy will result in inconsistencies within a program.
In C, the usual convention is to give header files names that end with `.h'.
It is most portable to use only letters, digits, dashes, and underscores in
header file names, and at most one dot.
Read more about using header files in official GCC documentation:
* Include Syntax
* Include Operation
* Once-Only Headers
* Computed Includes
https://gcc.gnu.org/onlinedocs/cpp/Header-Files.html
+46
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This directory is intended for project specific (private) libraries.
PlatformIO will compile them to static libraries and link into executable file.
The source code of each library should be placed in a an own separate directory
("lib/your_library_name/[here are source files]").
For example, see a structure of the following two libraries `Foo` and `Bar`:
|--lib
| |
| |--Bar
| | |--docs
| | |--examples
| | |--src
| | |- Bar.c
| | |- Bar.h
| | |- library.json (optional, custom build options, etc) https://docs.platformio.org/page/librarymanager/config.html
| |
| |--Foo
| | |- Foo.c
| | |- Foo.h
| |
| |- README --> THIS FILE
|
|- platformio.ini
|--src
|- main.c
and a contents of `src/main.c`:
```
#include <Foo.h>
#include <Bar.h>
int main (void)
{
...
}
```
PlatformIO Library Dependency Finder will find automatically dependent
libraries scanning project source files.
More information about PlatformIO Library Dependency Finder
- https://docs.platformio.org/page/librarymanager/ldf.html
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@@ -0,0 +1,14 @@
; PlatformIO Project Configuration File
;
; Build options: build flags, source filter, extra scripting
; Upload options: custom port, speed and extra flags
; Library options: dependencies, extra library storages
;
; Please visit documentation for the other options and examples
; http://docs.platformio.org/page/projectconf.html
[env:esp32dev]
platform = espressif32
framework = espidf
board = esp32dev
build_flags = -DCONFIG_WIFI_SSID=\"ESP_AP\" -DCONFIG_WIFI_PASSWORD=\"MYPASS\"
+349
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/*
*
* Automatically generated file; DO NOT EDIT.
* Espressif IoT Development Framework Configuration
*
*/
#define CONFIG_ULP_COPROC_ENABLED 1
#define CONFIG_ULP_COPROC_RESERVE_MEM 1024
#define CONFIG_GATTC_ENABLE 1
#define CONFIG_ESP32_PHY_MAX_TX_POWER 20
#define CONFIG_TRACEMEM_RESERVE_DRAM 0x0
#define CONFIG_FREERTOS_MAX_TASK_NAME_LEN 16
#define CONFIG_MQTT_TRANSPORT_SSL 1
#define CONFIG_BLE_SMP_ENABLE 1
#define CONFIG_SDP_INITIAL_TRACE_LEVEL 2
#define CONFIG_MB_SERIAL_TASK_PRIO 10
#define CONFIG_MQTT_PROTOCOL_311 1
#define CONFIG_TCP_RECVMBOX_SIZE 6
#define CONFIG_FATFS_CODEPAGE_437 1
#define CONFIG_BLE_SCAN_DUPLICATE 1
#define CONFIG_AVDT_TRACE_LEVEL_WARNING 1
#define CONFIG_AWS_IOT_SHADOW_MAX_SIMULTANEOUS_ACKS 10
#define CONFIG_TCP_WND_DEFAULT 5744
#define CONFIG_PARTITION_TABLE_OFFSET 0x8000
#define CONFIG_SW_COEXIST_ENABLE 1
#define CONFIG_SPIFFS_USE_MAGIC_LENGTH 1
#define CONFIG_AVCT_INITIAL_TRACE_LEVEL 2
#define CONFIG_IPC_TASK_STACK_SIZE 1024
#define CONFIG_FATFS_PER_FILE_CACHE 1
#define CONFIG_ESPTOOLPY_FLASHFREQ "40m"
#define CONFIG_AWS_IOT_SHADOW_MAX_SIZE_OF_THING_NAME 20
#define CONFIG_MBEDTLS_KEY_EXCHANGE_RSA 1
#define CONFIG_UDP_RECVMBOX_SIZE 6
#define CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE 0
#define CONFIG_MBEDTLS_AES_C 1
#define CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED 1
#define CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN 752
#define CONFIG_MBEDTLS_GCM_C 1
#define CONFIG_ESPTOOLPY_FLASHSIZE "2MB"
#define CONFIG_HEAP_POISONING_DISABLED 1
#define CONFIG_SPIFFS_CACHE_WR 1
#define CONFIG_BROWNOUT_DET_LVL_SEL_0 1
#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER 1
#define CONFIG_EMAC_L2_TO_L3_RX_BUF_MODE 1
#define CONFIG_BTDM_CONTROLLER_MODEM_SLEEP 1
#define CONFIG_SPIFFS_CACHE 1
#define CONFIG_INT_WDT 1
#define CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN 3
#define CONFIG_MBEDTLS_SSL_PROTO_TLS1 1
#define CONFIG_ESP_GRATUITOUS_ARP 1
#define CONFIG_AWS_IOT_SHADOW_MAX_SIZE_OF_UNIQUE_CLIENT_ID_BYTES 80
#define CONFIG_MBEDTLS_ECDSA_C 1
#define CONFIG_ESPTOOLPY_FLASHFREQ_40M 1
#define CONFIG_LOG_BOOTLOADER_LEVEL_INFO 1
#define CONFIG_ESPTOOLPY_FLASHSIZE_2MB 1
#define CONFIG_HTTPD_MAX_REQ_HDR_LEN 512
#define CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE 0
#define CONFIG_AWS_IOT_MQTT_PORT 8883
#define CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS 1
#define CONFIG_MBEDTLS_ECDH_C 1
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE 1
#define CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM 10
#define CONFIG_AWS_IOT_MQTT_MAX_RECONNECT_WAIT_INTERVAL 128000
#define CONFIG_MBEDTLS_SSL_ALPN 1
#define CONFIG_BTM_TRACE_LEVEL_WARNING 1
#define CONFIG_MBEDTLS_PEM_WRITE_C 1
#define CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN 4096
#define CONFIG_RFCOMM_TRACE_LEVEL_WARNING 1
#define CONFIG_LOG_DEFAULT_LEVEL_INFO 1
#define CONFIG_BT_RESERVE_DRAM 0xdb5c
#define CONFIG_FATFS_FS_LOCK 0
#define CONFIG_IP_LOST_TIMER_INTERVAL 120
#define CONFIG_SPIFFS_META_LENGTH 4
#define CONFIG_ESP32_PANIC_PRINT_REBOOT 1
#define CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE 20
#define CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED 1
#define CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED 1
#define CONFIG_AWS_IOT_MQTT_RX_BUF_LEN 512
#define CONFIG_MB_SERIAL_BUF_SIZE 256
#define CONFIG_CONSOLE_UART_BAUDRATE 115200
#define CONFIG_LWIP_MAX_SOCKETS 10
#define CONFIG_LWIP_NETIF_LOOPBACK 1
#define CONFIG_MCA_TRACE_LEVEL_WARNING 1
#define CONFIG_EMAC_TASK_PRIORITY 20
#define CONFIG_TIMER_TASK_STACK_DEPTH 2048
#define CONFIG_TCP_MSS 1436
#define CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED 1
#define CONFIG_BTIF_INITIAL_TRACE_LEVEL 2
#define CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN_EFF 3
#define CONFIG_FATFS_CODEPAGE 437
#define CONFIG_APPL_TRACE_LEVEL_WARNING 1
#define CONFIG_BTC_INITIAL_TRACE_LEVEL 2
#define CONFIG_ESP32_DEFAULT_CPU_FREQ_160 1
#define CONFIG_LWIP_MAX_UDP_PCBS 16
#define CONFIG_ESPTOOLPY_BAUD 115200
#define CONFIG_INT_WDT_CHECK_CPU1 1
#define CONFIG_AVRC_INITIAL_TRACE_LEVEL 2
#define CONFIG_ADC_CAL_LUT_ENABLE 1
#define CONFIG_AWS_IOT_MQTT_TX_BUF_LEN 512
#define CONFIG_FLASHMODE_DIO 1
#define CONFIG_ESPTOOLPY_AFTER_RESET 1
#define CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED 1
#define CONFIG_LWIP_DHCPS_MAX_STATION_NUM 8
#define CONFIG_TOOLPREFIX "xtensa-esp32-elf-"
#define CONFIG_MBEDTLS_ECP_C 1
#define CONFIG_FREERTOS_IDLE_TASK_STACKSIZE 1536
#define CONFIG_MBEDTLS_RC4_DISABLED 1
#define CONFIG_GAP_TRACE_LEVEL_WARNING 1
#define CONFIG_CONSOLE_UART_NUM 0
#define CONFIG_AWS_IOT_SHADOW_MAX_JSON_TOKEN_EXPECTED 120
#define CONFIG_ESP32_APPTRACE_LOCK_ENABLE 1
#define CONFIG_PTHREAD_STACK_MIN 768
#define CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC 1
#define CONFIG_ESPTOOLPY_BAUD_115200B 1
#define CONFIG_TCP_OVERSIZE_MSS 1
#define CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS 1
#define CONFIG_CONSOLE_UART_DEFAULT 1
#define CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS 4
#define CONFIG_GATT_TRACE_LEVEL_WARNING 1
#define CONFIG_ESPTOOLPY_FLASHSIZE_DETECT 1
#define CONFIG_EXAMPLE_EMBEDDED_CERTS 1
#define CONFIG_TIMER_TASK_STACK_SIZE 3584
#define CONFIG_BTIF_TRACE_LEVEL_WARNING 1
#define CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE 1
#define CONFIG_HCI_INITIAL_TRACE_LEVEL 2
#define CONFIG_AVDT_INITIAL_TRACE_LEVEL 2
#define CONFIG_MBEDTLS_X509_CRL_PARSE_C 1
#define CONFIG_SCAN_DUPLICATE_BY_DEVICE_ADDR 1
#define CONFIG_AWS_IOT_SHADOW_MAX_SHADOW_TOPIC_LENGTH_WITHOUT_THINGNAME 60
#define CONFIG_MB_SERIAL_TASK_STACK_SIZE 2048
#define CONFIG_GATTS_SEND_SERVICE_CHANGE_AUTO 1
#define CONFIG_LWIP_DHCPS_LEASE_UNIT 60
#define CONFIG_SPIFFS_USE_MAGIC 1
#define CONFIG_TCPIP_TASK_STACK_SIZE 3072
#define CONFIG_BLUFI_TRACE_LEVEL_WARNING 1
#define CONFIG_BLUEDROID_PINNED_TO_CORE_0 1
#define CONFIG_TASK_WDT 1
#define CONFIG_RFCOMM_INITIAL_TRACE_LEVEL 2
#define CONFIG_MAIN_TASK_STACK_SIZE 3584
#define CONFIG_SPIFFS_PAGE_CHECK 1
#define CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0 1
#define CONFIG_LWIP_MAX_ACTIVE_TCP 16
#define CONFIG_TASK_WDT_TIMEOUT_S 5
#define CONFIG_INT_WDT_TIMEOUT_MS 300
#define CONFIG_ESPTOOLPY_FLASHMODE "dio"
#define CONFIG_BTC_TASK_STACK_SIZE 3072
#define CONFIG_BLUEDROID_ENABLED 1
#define CONFIG_NEWLIB_STDIN_LINE_ENDING_CR 1
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA 1
#define CONFIG_ESPTOOLPY_BEFORE "default_reset"
#define CONFIG_ADC2_DISABLE_DAC 1
#define CONFIG_FATFS_LFN_HEAP 1
#define CONFIG_BLE_ADV_REPORT_FLOW_CONTROL_NUM 100
#define CONFIG_LOG_DEFAULT_LEVEL 3
#define CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION 1
#define CONFIG_TIMER_QUEUE_LENGTH 10
#define CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT 1
#define CONFIG_GATTS_SEND_SERVICE_CHANGE_MODE 0
#define CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY 1
#define CONFIG_MAKE_WARN_UNDEFINED_VARIABLES 1
#define CONFIG_FATFS_TIMEOUT_MS 10000
#define CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM 32
#define CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS 1
#define CONFIG_PAN_INITIAL_TRACE_LEVEL 2
#define CONFIG_MBEDTLS_CCM_C 1
#define CONFIG_SPI_MASTER_ISR_IN_IRAM 1
#define CONFIG_MCA_INITIAL_TRACE_LEVEL 2
#define CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER 20
#define CONFIG_A2D_INITIAL_TRACE_LEVEL 2
#define CONFIG_ESP32_RTC_CLK_CAL_CYCLES 1024
#define CONFIG_ESP32_WIFI_TX_BA_WIN 6
#define CONFIG_ESP32_WIFI_NVS_ENABLED 1
#define CONFIG_MDNS_MAX_SERVICES 10
#define CONFIG_EMAC_CHECK_LINK_PERIOD_MS 2000
#define CONFIG_BTDM_LPCLK_SEL_MAIN_XTAL 1
#define CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED 1
#define CONFIG_LIBSODIUM_USE_MBEDTLS_SHA 1
#define CONFIG_AWS_IOT_SDK 1
#define CONFIG_DMA_RX_BUF_NUM 10
#define CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED 1
#define CONFIG_TCP_SYNMAXRTX 6
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA 1
#define CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_EFF 0
#define CONFIG_PYTHON "python"
#define CONFIG_MBEDTLS_ECP_NIST_OPTIM 1
#define CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1 1
#define CONFIG_ESPTOOLPY_COMPRESSED 1
#define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv"
#define CONFIG_MB_CONTROLLER_STACK_SIZE 4096
#define CONFIG_TCP_SND_BUF_DEFAULT 5744
#define CONFIG_GARP_TMR_INTERVAL 60
#define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
#define CONFIG_BNEP_INITIAL_TRACE_LEVEL 2
#define CONFIG_HCI_TRACE_LEVEL_WARNING 1
#define CONFIG_TCP_MSL 60000
#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_1 1
#define CONFIG_LWIP_SO_REUSE_RXTOALL 1
#define CONFIG_MB_CONTROLLER_NOTIFY_TIMEOUT 20
#define CONFIG_PARTITION_TABLE_SINGLE_APP 1
#define CONFIG_ESP32_WIFI_RX_BA_WIN 6
#define CONFIG_MBEDTLS_X509_CSR_PARSE_C 1
#define CONFIG_SPIFFS_USE_MTIME 1
#define CONFIG_BTC_TRACE_LEVEL_WARNING 1
#define CONFIG_EMAC_TASK_STACK_SIZE 3072
#define CONFIG_SMP_TRACE_LEVEL_WARNING 1
#define CONFIG_MB_QUEUE_LENGTH 20
#define CONFIG_SW_COEXIST_PREFERENCE_VALUE 2
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA 1
#define CONFIG_LWIP_DHCP_DOES_ARP_CHECK 1
#define CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER 1
#define CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE 2304
#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
#define CONFIG_A2D_TRACE_LEVEL_WARNING 1
#define CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY 2000
#define CONFIG_AWS_IOT_MQTT_NUM_SUBSCRIBE_HANDLERS 5
#define CONFIG_BROWNOUT_DET_LVL 0
#define CONFIG_MBEDTLS_PEM_PARSE_C 1
#define CONFIG_SPIFFS_GC_MAX_RUNS 10
#define CONFIG_ESP32_APPTRACE_DEST_NONE 1
#define CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC 1
#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_2 1
#define CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA 1
#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM 32
#define CONFIG_HTTPD_MAX_URI_LEN 512
#define CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED 1
#define CONFIG_AVCT_TRACE_LEVEL_WARNING 1
#define CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED 1
#define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1 1
#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 160
#define CONFIG_MBEDTLS_HARDWARE_AES 1
#define CONFIG_FREERTOS_HZ 100
#define CONFIG_LOG_COLORS 1
#define CONFIG_OSI_TRACE_LEVEL_WARNING 1
#define CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE 1
#define CONFIG_STACK_CHECK_NONE 1
#define CONFIG_ADC_CAL_EFUSE_TP_ENABLE 1
#define CONFIG_BNEP_TRACE_LEVEL_WARNING 1
#define CONFIG_FREERTOS_ASSERT_FAIL_ABORT 1
#define CONFIG_BROWNOUT_DET 1
#define CONFIG_AWS_IOT_SHADOW_MAX_SIMULTANEOUS_THINGNAMES 10
#define CONFIG_ESP32_XTAL_FREQ 40
#define CONFIG_OSI_INITIAL_TRACE_LEVEL 2
#define CONFIG_MONITOR_BAUD_115200B 1
#define CONFIG_LOG_BOOTLOADER_LEVEL 3
#define CONFIG_MBEDTLS_TLS_ENABLED 1
#define CONFIG_LWIP_MAX_RAW_PCBS 16
#define CONFIG_SMP_ENABLE 1
#define CONFIG_HID_TRACE_LEVEL_WARNING 1
#define CONFIG_AVRC_TRACE_LEVEL_WARNING 1
#define CONFIG_MBEDTLS_SSL_SESSION_TICKETS 1
#define CONFIG_SPIFFS_MAX_PARTITIONS 3
#define CONFIG_ESP_ERR_TO_NAME_LOOKUP 1
#define CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE_0 1
#define CONFIG_MBEDTLS_SSL_RENEGOTIATION 1
#define CONFIG_HID_INITIAL_TRACE_LEVEL 2
#define CONFIG_ESPTOOLPY_BEFORE_RESET 1
#define CONFIG_MB_EVENT_QUEUE_TIMEOUT 20
#define CONFIG_ESPTOOLPY_BAUD_OTHER_VAL 115200
#define CONFIG_AWS_EXAMPLE_CLIENT_ID "myesp32"
#define CONFIG_SPIFFS_OBJ_NAME_LEN 32
#define CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT 5
#define CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_EFF 0
#define CONFIG_PARTITION_TABLE_MD5 1
#define CONFIG_TCPIP_RECVMBOX_SIZE 32
#define CONFIG_TCP_MAXRTX 12
#define CONFIG_BTM_INITIAL_TRACE_LEVEL 2
#define CONFIG_ESPTOOLPY_AFTER "hard_reset"
#define CONFIG_TCPIP_TASK_AFFINITY 0x7FFFFFFF
#define CONFIG_LWIP_SO_REUSE 1
#define CONFIG_ESP32_XTAL_FREQ_40 1
#define CONFIG_BTDM_CONTROLLER_MODE_BLE_ONLY 1
#define CONFIG_DMA_TX_BUF_NUM 10
#define CONFIG_LWIP_MAX_LISTENING_TCP 16
#define CONFIG_FREERTOS_INTERRUPT_BACKTRACE 1
#define CONFIG_WL_SECTOR_SIZE 4096
#define CONFIG_ESP32_DEBUG_OCDAWARE 1
#define CONFIG_MQTT_TRANSPORT_WEBSOCKET 1
#define CONFIG_TIMER_TASK_PRIORITY 1
#define CONFIG_MBEDTLS_TLS_CLIENT 1
#define CONFIG_AWS_IOT_MQTT_MIN_RECONNECT_WAIT_INTERVAL 1000
#define CONFIG_BTDM_CONTROLLER_HCI_MODE_VHCI 1
#define CONFIG_BT_ENABLED 1
#define CONFIG_SDP_TRACE_LEVEL_WARNING 1
#define CONFIG_SW_COEXIST_PREFERENCE_BALANCE 1
#define CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED 1
#define CONFIG_MONITOR_BAUD 115200
#define CONFIG_ESP32_DEBUG_STUBS_ENABLE 1
#define CONFIG_TCPIP_LWIP 1
#define CONFIG_REDUCE_PHY_TX_POWER 1
#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
#define CONFIG_PAN_TRACE_LEVEL_WARNING 1
#define CONFIG_FREERTOS_CORETIMER_0 1
#define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv"
#define CONFIG_MBEDTLS_HAVE_TIME 1
#define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY 1
#define CONFIG_TCP_QUEUE_OOSEQ 1
#define CONFIG_GATTS_ENABLE 1
#define CONFIG_ADC_CAL_EFUSE_VREF_ENABLE 1
#define CONFIG_MBEDTLS_TLS_SERVER 1
#define CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT 1
#define CONFIG_BLE_ADV_REPORT_FLOW_CONTROL_SUPPORTED 1
#define CONFIG_FREERTOS_ISR_STACKSIZE 1536
#define CONFIG_SUPPORT_TERMIOS 1
#define CONFIG_OPENSSL_ASSERT_DO_NOTHING 1
#define CONFIG_WL_SECTOR_SIZE_4096 1
#define CONFIG_OPTIMIZATION_LEVEL_DEBUG 1
#define CONFIG_GATT_INITIAL_TRACE_LEVEL 2
#define CONFIG_FREERTOS_NO_AFFINITY 0x7FFFFFFF
#define CONFIG_AWS_IOT_MQTT_HOST ""
#define CONFIG_L2CAP_TRACE_LEVEL_WARNING 1
#define CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED 1
#define CONFIG_MB_TIMER_INDEX 0
#define CONFIG_SCAN_DUPLICATE_TYPE 0
#define CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED 1
#define CONFIG_APPL_INITIAL_TRACE_LEVEL 2
#define CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED 1
#define CONFIG_SMP_INITIAL_TRACE_LEVEL 2
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA 1
#define CONFIG_SPI_SLAVE_ISR_IN_IRAM 1
#define CONFIG_L2CAP_INITIAL_TRACE_LEVEL 2
#define CONFIG_SYSTEM_EVENT_QUEUE_SIZE 32
#define CONFIG_BT_ACL_CONNECTIONS 4
#define CONFIG_FATFS_MAX_LFN 255
#define CONFIG_ESP32_WIFI_TX_BUFFER_TYPE 1
#define CONFIG_BOOTLOADER_WDT_ENABLE 1
#define CONFIG_GAP_INITIAL_TRACE_LEVEL 2
#define CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED 1
#define CONFIG_LWIP_LOOPBACK_MAX_PBUFS 8
#define CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN 16384
#define CONFIG_MB_TIMER_GROUP 0
#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
#define CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE 1
#define CONFIG_SPIFFS_PAGE_SIZE 256
#define CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED 1
#define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0 1
#define CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT 3072
#define CONFIG_MB_TIMER_PORT_ENABLED 1
#define CONFIG_DUPLICATE_SCAN_CACHE_SIZE 200
#define CONFIG_MONITOR_BAUD_OTHER_VAL 115200
#define CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF 1
#define CONFIG_ESPTOOLPY_PORT "/dev/ttyUSB0"
#define CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS 1
#define CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN 1
#define CONFIG_BLE_ADV_REPORT_DISCARD_THRSHOLD 20
#define CONFIG_BLUEDROID_PINNED_TO_CORE 0
#define CONFIG_BTDM_MODEM_SLEEP_MODE_ORIG 1
#define CONFIG_ESP32_WIFI_IRAM_OPT 1
#define CONFIG_BLUFI_INITIAL_TRACE_LEVEL 2
#define CONFIG_FATFS_API_ENCODING_ANSI_OEM 1
@@ -0,0 +1,119 @@
/* ULP Example
This example code is in the Public Domain (or CC0 licensed, at your option.)
Unless required by applicable law or agreed to in writing, this
software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
CONDITIONS OF ANY KIND, either express or implied.
*/
#include <stdio.h>
#include "esp_sleep.h"
#include "nvs.h"
#include "nvs_flash.h"
#include "soc/rtc_cntl_reg.h"
#include "soc/sens_reg.h"
#include "soc/rtc_periph.h"
#include "driver/gpio.h"
#include "driver/rtc_io.h"
#include "esp32/ulp.h"
#include "ulp_main.h"
extern const uint8_t ulp_main_bin_start[] asm("_binary_ulp_main_bin_start");
extern const uint8_t ulp_main_bin_end[] asm("_binary_ulp_main_bin_end");
static void init_ulp_program();
static void update_pulse_count();
void app_main()
{
esp_sleep_wakeup_cause_t cause = esp_sleep_get_wakeup_cause();
if (cause != ESP_SLEEP_WAKEUP_ULP) {
printf("Not ULP wakeup, initializing ULP\n");
init_ulp_program();
} else {
printf("ULP wakeup, saving pulse count\n");
update_pulse_count();
}
printf("Entering deep sleep\n\n");
ESP_ERROR_CHECK( esp_sleep_enable_ulp_wakeup() );
esp_deep_sleep_start();
}
static void init_ulp_program()
{
esp_err_t err = ulp_load_binary(0, ulp_main_bin_start,
(ulp_main_bin_end - ulp_main_bin_start) / sizeof(uint32_t));
ESP_ERROR_CHECK(err);
/* GPIO used for pulse counting. */
gpio_num_t gpio_num = GPIO_NUM_0;
assert(rtc_gpio_desc[gpio_num].reg && "GPIO used for pulse counting must be an RTC IO");
/* Initialize some variables used by ULP program.
* Each 'ulp_xyz' variable corresponds to 'xyz' variable in the ULP program.
* These variables are declared in an auto generated header file,
* 'ulp_main.h', name of this file is defined in component.mk as ULP_APP_NAME.
* These variables are located in RTC_SLOW_MEM and can be accessed both by the
* ULP and the main CPUs.
*
* Note that the ULP reads only the lower 16 bits of these variables.
*/
ulp_debounce_counter = 3;
ulp_debounce_max_count = 3;
ulp_next_edge = 0;
ulp_io_number = rtc_gpio_desc[gpio_num].rtc_num; /* map from GPIO# to RTC_IO# */
ulp_edge_count_to_wake_up = 10;
/* Initialize selected GPIO as RTC IO, enable input, disable pullup and pulldown */
rtc_gpio_init(gpio_num);
rtc_gpio_set_direction(gpio_num, RTC_GPIO_MODE_INPUT_ONLY);
rtc_gpio_pulldown_dis(gpio_num);
rtc_gpio_pullup_dis(gpio_num);
rtc_gpio_hold_en(gpio_num);
/* Disconnect GPIO12 and GPIO15 to remove current drain through
* pullup/pulldown resistors.
* GPIO12 may be pulled high to select flash voltage.
*/
rtc_gpio_isolate(GPIO_NUM_12);
rtc_gpio_isolate(GPIO_NUM_15);
esp_deep_sleep_disable_rom_logging(); // suppress boot messages
/* Set ULP wake up period to T = 20ms.
* Minimum pulse width has to be T * (ulp_debounce_counter + 1) = 80ms.
*/
ulp_set_wakeup_period(0, 20000);
/* Start the program */
err = ulp_run(&ulp_entry - RTC_SLOW_MEM);
ESP_ERROR_CHECK(err);
}
static void update_pulse_count()
{
const char* namespace = "plusecnt";
const char* count_key = "count";
ESP_ERROR_CHECK( nvs_flash_init() );
nvs_handle handle;
ESP_ERROR_CHECK( nvs_open(namespace, NVS_READWRITE, &handle));
uint32_t pulse_count = 0;
esp_err_t err = nvs_get_u32(handle, count_key, &pulse_count);
assert(err == ESP_OK || err == ESP_ERR_NVS_NOT_FOUND);
printf("Read pulse count from NVS: %5d\n", pulse_count);
/* ULP program counts signal edges, convert that to the number of pulses */
uint32_t pulse_count_from_ulp = (ulp_edge_count & UINT16_MAX) / 2;
/* In case of an odd number of edges, keep one until next time */
ulp_edge_count = ulp_edge_count % 2;
printf("Pulse count from ULP: %5d\n", pulse_count_from_ulp);
/* Save the new pulse count to NVS */
pulse_count += pulse_count_from_ulp;
ESP_ERROR_CHECK(nvs_set_u32(handle, count_key, pulse_count));
ESP_ERROR_CHECK(nvs_commit(handle));
nvs_close(handle);
printf("Wrote updated pulse count to NVS: %5d\n", pulse_count);
}
+11
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@@ -0,0 +1,11 @@
This directory is intended for PIO Unit Testing and project tests.
Unit Testing is a software testing method by which individual units of
source code, sets of one or more MCU program modules together with associated
control data, usage procedures, and operating procedures, are tested to
determine whether they are fit for use. Unit testing finds problems early
in the development cycle.
More information about PIO Unit Testing:
- https://docs.platformio.org/page/plus/unit-testing.html
+157
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@@ -0,0 +1,157 @@
/* ULP Example: pulse counting
This example code is in the Public Domain (or CC0 licensed, at your option.)
Unless required by applicable law or agreed to in writing, this
software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
CONDITIONS OF ANY KIND, either express or implied.
This file contains assembly code which runs on the ULP.
ULP wakes up to run this code at a certain period, determined by the values
in SENS_ULP_CP_SLEEP_CYCx_REG registers. On each wake up, the program checks
the input on GPIO0. If the value is different from the previous one, the
program "debounces" the input: on the next debounce_max_count wake ups,
it expects to see the same value of input.
If this condition holds true, the program increments edge_count and starts
waiting for input signal polarity to change again.
When the edge counter reaches certain value (set by the main program),
this program running triggers a wake up from deep sleep.
*/
/* ULP assembly files are passed through C preprocessor first, so include directives
and C macros may be used in these files
*/
#include "soc/rtc_cntl_reg.h"
#include "soc/rtc_io_reg.h"
#include "soc/soc_ulp.h"
/* Define variables, which go into .bss section (zero-initialized data) */
.bss
/* Next input signal edge expected: 0 (negative) or 1 (positive) */
.global next_edge
next_edge:
.long 0
/* Counter started when signal value changes.
Edge is "debounced" when the counter reaches zero. */
.global debounce_counter
debounce_counter:
.long 0
/* Value to which debounce_counter gets reset.
Set by the main program. */
.global debounce_max_count
debounce_max_count:
.long 0
/* Total number of signal edges acquired */
.global edge_count
edge_count:
.long 0
/* Number of edges to acquire before waking up the SoC.
Set by the main program. */
.global edge_count_to_wake_up
edge_count_to_wake_up:
.long 0
/* RTC IO number used to sample the input signal.
Set by main program. */
.global io_number
io_number:
.long 0
/* Code goes into .text section */
.text
.global entry
entry:
/* Load io_number */
move r3, io_number
ld r3, r3, 0
/* Lower 16 IOs and higher need to be handled separately,
* because r0-r3 registers are 16 bit wide.
* Check which IO this is.
*/
move r0, r3
jumpr read_io_high, 16, ge
/* Read the value of lower 16 RTC IOs into R0 */
READ_RTC_REG(RTC_GPIO_IN_REG, RTC_GPIO_IN_NEXT_S, 16)
rsh r0, r0, r3
jump read_done
/* Read the value of RTC IOs 16-17, into R0 */
read_io_high:
READ_RTC_REG(RTC_GPIO_IN_REG, RTC_GPIO_IN_NEXT_S + 16, 2)
sub r3, r3, 16
rsh r0, r0, r3
read_done:
and r0, r0, 1
/* State of input changed? */
move r3, next_edge
ld r3, r3, 0
add r3, r0, r3
and r3, r3, 1
jump changed, eq
/* Not changed */
/* Reset debounce_counter to debounce_max_count */
move r3, debounce_max_count
move r2, debounce_counter
ld r3, r3, 0
st r3, r2, 0
/* End program */
halt
.global changed
changed:
/* Input state changed */
/* Has debounce_counter reached zero? */
move r3, debounce_counter
ld r2, r3, 0
add r2, r2, 0 /* dummy ADD to use "jump if ALU result is zero" */
jump edge_detected, eq
/* Not yet. Decrement debounce_counter */
sub r2, r2, 1
st r2, r3, 0
/* End program */
halt
.global edge_detected
edge_detected:
/* Reset debounce_counter to debounce_max_count */
move r3, debounce_max_count
move r2, debounce_counter
ld r3, r3, 0
st r3, r2, 0
/* Flip next_edge */
move r3, next_edge
ld r2, r3, 0
add r2, r2, 1
and r2, r2, 1
st r2, r3, 0
/* Increment edge_count */
move r3, edge_count
ld r2, r3, 0
add r2, r2, 1
st r2, r3, 0
/* Compare edge_count to edge_count_to_wake_up */
move r3, edge_count_to_wake_up
ld r3, r3, 0
sub r3, r3, r2
jump wake_up, eq
/* Not yet. End program */
halt
.global wake_up
wake_up:
/* Check if the system can be woken up */
READ_RTC_FIELD(RTC_CNTL_LOW_POWER_ST_REG, RTC_CNTL_RDY_FOR_WAKEUP)
and r0, r0, 1
jump wake_up, eq
/* Wake up the SoC, end program */
wake
halt