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Merge branch 'feat/support_p4_unicore_auto_clock_gating_v5.5' into 'release/v5.5'

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feat(esp_hw_support): support unicore auto clock gating for esp32p4 rev3+ (v5.5)

See merge request espressif/esp-idf!43370
This commit is contained in:
Jiang Jiang Jian
2025-11-17 19:07:39 +08:00
parent feaa12ec09 9e06691c52
commit 29e9e7ebee
1 changed files with 4 additions and 0 deletions
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components/esp_system/port/cpu_start.c
+4
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@@ -656,6 +656,10 @@ NOINLINE_ATTR static void system_early_init(const soc_reset_reason_t *rst_reas)
REG_CLR_BIT(SYSTEM_CORE_1_CONTROL_0_REG, SYSTEM_CONTROL_CORE_1_RESETING);
#endif
#elif CONFIG_IDF_TARGET_ESP32P4
#if CONFIG_ESP32P4_REV_MIN_FULL >= 300
// In single core mode, the CPU system should ignore the WFI state of core1 when entering WFI autoclock gating mode.
REG_CLR_BIT(HP_SYS_CLKRST_CPU_WAITI_CTRL0_REG, HP_SYS_CLKRST_REG_CORE1_WAITI_ICG_EN);
#endif
REG_CLR_BIT(HP_SYS_CLKRST_SOC_CLK_CTRL0_REG, HP_SYS_CLKRST_REG_CORE1_CPU_CLK_EN);
REG_SET_BIT(HP_SYS_CLKRST_HP_RST_EN0_REG, HP_SYS_CLKRST_REG_RST_EN_CORE1_GLOBAL);
#endif // CONFIG_IDF_TARGET_ESP32