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Merge branch 'bugfix/clic_mapping_mask_v5.5' into 'release/v5.5'

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fix(hal): make CLIC interrupt routing function to only write related bits (backport v5.5)

See merge request espressif/esp-idf!39936
This commit is contained in:
Jiang Jiang Jian
2025-07-22 17:20:17 +08:00
parent 0b0e7b23ff 1b698f0997
commit b8936385d3
1 changed files with 8 additions and 4 deletions
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components/hal/include/hal/interrupt_clic_ll.h
+8 -4
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -21,6 +21,10 @@ extern "C" {
#define RV_TOTAL_INT_COUNT 48
/* Use the closest upper power of two (minus 1) as a mask for the interrupts mapping */
#define RV_INT_MASK 63
/**
* @brief Route any interrupt source to any CPU interrupt, including internal ones
*
@@ -34,12 +38,12 @@ FORCE_INLINE_ATTR void interrupt_clic_ll_route(uint32_t core_id, int intr_src, i
#if SOC_CPU_CORES_NUM > 1
if (core_id == 0) {
REG_WRITE(DR_REG_INTERRUPT_CORE0_BASE + 4 * intr_src, intr_num);
REG_SET_BITS(DR_REG_INTERRUPT_CORE0_BASE + 4 * intr_src, intr_num, RV_INT_MASK);
} else {
REG_WRITE(DR_REG_INTERRUPT_CORE1_BASE + 4 * intr_src, intr_num);
REG_SET_BITS(DR_REG_INTERRUPT_CORE1_BASE + 4 * intr_src, intr_num, RV_INT_MASK);
}
#else
REG_WRITE(DR_REG_INTERRUPT_CORE0_BASE + 4 * intr_src, intr_num);
REG_SET_BITS(DR_REG_INTERRUPT_CORE0_BASE + 4 * intr_src, intr_num, RV_INT_MASK);
#endif // SOC_CPU_CORES_NUM > 1
}