fix(esp_hw_support): fix the esp32h2 sleep TG0 watchdog reset issue caused by power down the top domain
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@@ -948,6 +948,9 @@ static esp_err_t FORCE_IRAM_ATTR esp_sleep_start_safe(uint32_t sleep_flags, uint
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#if SOC_PM_MMU_TABLE_RETENTION_WHEN_TOP_PD
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esp_sleep_mmu_retention(false);
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#endif
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#if SOC_PM_RETENTION_SW_TRIGGER_REGDMA
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sleep_retention_do_system_retention(false);
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#endif
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#if CONFIG_IDF_TARGET_ESP32P4 && (CONFIG_ESP_REV_MIN_FULL == 300)
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sleep_flash_p4_rev3_workaround();
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sleep_retention_do_extra_retention(false);
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@@ -1176,11 +1179,6 @@ static esp_err_t SLEEP_FN_ATTR esp_sleep_start(uint32_t sleep_flags, uint32_t cl
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cache_ll_invalidate_all(CACHE_LL_LEVEL_ALL, CACHE_TYPE_ALL, CACHE_LL_ID_ALL);
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#endif
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s_config.ccount_ticks_record = esp_cpu_get_cycle_count();
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#if SOC_PM_RETENTION_SW_TRIGGER_REGDMA
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if (sleep_flags & PMU_SLEEP_PD_TOP) {
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sleep_retention_do_system_retention(false);
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}
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#endif
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}
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misc_modules_wake_prepare(sleep_flags);
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}
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