fb20e147d5
fix(console): release default console UART pins if console is switched in bootloader
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Also print out console UART pin number in app cpu_startup stage
Closes https://github.com/espressif/esp-idf/issues/16764
Closes https://github.com/espressif/esp-idf/issues/17459
2025-11-21 22:11:25 +08:00
29e9e7ebee
Merge branch 'feat/support_p4_unicore_auto_clock_gating_v5.5' into 'release/v5.5'
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feat(esp_hw_support): support unicore auto clock gating for esp32p4 rev3+ (v5.5)
See merge request espressif/esp-idf!43370
2025-11-17 19:07:39 +08:00
376f396e20
Merge branch 'bugfix/esp32c5_encrypted_flash_write_v5.5' into 'release/v5.5'
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fix(esp_system): limit CPU clock to 160MHz in ESP32-C5 for flash encryption (v5.5)
See merge request espressif/esp-idf!43326
2025-11-17 15:02:40 +08:00
01b9a1dd18
Merge branch 'fix/fix_xtal32k_power_breaks_adc_v5.5' into 'release/v5.5'
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fix(esp_system): fix XTAL32K power breaks ADC function on 32k XTAL clock pin (v5.5)
See merge request espressif/esp-idf!43297
2025-11-14 15:31:04 +08:00
9e06691c52
feat(esp_hw_support): support unicore auto clock gating for esp32p4 rev3+
2025-11-14 14:08:52 +08:00
3fd00b4d80
fix(esp_system): limit CPU clock to 160MHz in ESP32-C5 for flash encryption
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Encrypted flash write operation sometimes result in random corruption in
certain bytes. Root cause points to sudden current surge due to involvement of
encryption block overwhelming LDO supply. More details will be provided
in the ESP32-C5 SoC Errata document.
This fix limits the CPU clock to 160MHz for flash encryption enabled
case. Failing encrypted flash write tests could successfully pass in
this configuration. Going ahead, a dynamic clock adjustment in flash
driver will be considered to mitigate this issue.
2025-11-13 13:26:06 +05:30
7adb3a5a2e
fix(esp_system): fix XTAL32K power breaks ADC function on 32k XTAL clock pin
2025-11-13 14:17:34 +08:00
ea6ed237d2
fix(clk): 400MHz CPU should still be selectable on ESP32-P4 less than rev3
2025-11-13 11:36:22 +08:00
8410210c9a
Merge branch 'fix/eh_frame_parser_warnings_v5.5' into 'release/v5.5'
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fix(esp_system): fix potential warnings related to array size in .eh_frame parser (backport v5.5)
See merge request espressif/esp-idf!41983
2025-11-06 13:45:45 +08:00
1bbf16c5bc
fix(esp_system): fix potential warnings related to array size in .eh_frame parser
2025-11-05 11:26:24 +08:00
cc0a98a3c4
fix(esp_system): prevent .eh_frame-based unwinding from looping indefinitely
2025-11-05 10:04:00 +08:00
9602933fad
Merge branch 'fix/p4_rev3_further_fixes_v5.5' into 'release/v5.5'
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fix(esp_hw_support): p4 rev3 further fixes (v5.5)
See merge request espressif/esp-idf!42942
2025-10-31 10:00:36 +08:00
24a36e5c01
Merge branch 'fix/cdcacm-callback-placement_v5.5' into 'release/v5.5'
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fix(esp_vfs_console): Update placement of cdcacm_xx_cb when ETS print enabled (v5.5)
See merge request espressif/esp-idf!41330
2025-10-31 07:10:47 +08:00
d7bdd17dba
Merge branch 'fix/fix_32k_config_revoke_breaks_io_holding_v5.5' into 'release/v5.5'
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fix(esp_system): fix ext 32k io revoking breaks sleep io holding (v5.5)
See merge request espressif/esp-idf!42495
2025-10-31 06:53:44 +08:00
3ee348fe52
fix(esp_hw_support): add p4 rev3.0 MSPI workaround for deepsleep
2025-10-30 19:09:44 +08:00
7109c7b939
Merge branch 'feature/ipc_allows_recursion_calls_v5.5' into 'release/v5.5'
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feat(ipc): Allow IPC recursion calls in esp_ipc_call (v5.5)
See merge request espressif/esp-idf!41938
2025-10-30 13:59:39 +08:00
96aef65a2d
fix(esp_system): fix ext 32k io revoking breaks sleep io holding
2025-10-28 18:54:20 +08:00
2f63581f51
Merge branch 'bugfix/usb_dp_pin_unusable_after_cpu_reset_v5.5' into 'release/v5.5'
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fix(gpio): fix USB DP pin unusable after CPU reset for S3/C3 (v5.5)
See merge request espressif/esp-idf!42800
2025-10-28 10:00:46 +08:00
a0de5f7387
Merge branch 'feature/esp32p4_eco5_support_v5.5' into 'release/v5.5'
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feat(gpio/ledc/uart/2ddma/ppa): ESP32P4 ECO5 related updates (v5.5)
See merge request espressif/esp-idf!42816
2025-10-27 15:50:42 +08:00
5a4ff6bb6a
dma: fixed issue that DMA are not reset when CPU reset
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When DMA keep writing the memory, some data may be corrupted after reset. For example, the stack of bootloader may be overwritten and failed to boot until a higher scope of reset (Core).
2025-10-23 21:39:09 +08:00
912c24eb09
fix(gpio): fix USB DP pin unusable after CPU reset for S3/C3
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Closes https://github.com/espressif/esp-idf/issues/17488
2025-10-23 15:07:25 +08:00
e69eeb7355
feat(2ddma): ESP32P4 ECO5 2DDMA related updates
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Added one more pair of 2DDMA channels
Priority bit width increased corespondingly
Added three new CSC modes for RX channel 0
2025-10-22 20:05:59 +08:00
e71732139a
fix(clk): allow P4 CPU clk freq can auto switch between 360/400MHz according to revision
2025-10-22 20:05:59 +08:00
438046d809
Merge branch 'fix/fix_esp32c5_xtal32k_clock_lost_in_sleep_v5.5' into 'release/v5.5'
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fix(esp_system): manage slow clock sleep pd in select_rtc_slow_clk (v5.5)
See merge request espressif/esp-idf!42494
2025-10-20 14:36:47 +08:00
37ebf6793e
feat(ipc): Allow IPC recursion calls in esp_ipc_call
2025-10-20 14:25:24 +08:00
ea36c4f609
Merge branch 'feature/esp_tee_c5_v5.5' into 'release/v5.5'
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feat(esp_tee): Initial support for ESP32-C5 and related changes (v5.5)
See merge request espressif/esp-idf!42357
2025-10-16 09:39:23 +05:30
508a659001
feat(esp_tee): Support for ESP32-C5 - the rest of the components
2025-10-14 10:12:11 +05:30
e6d4eec507
feat(p4): p4 rev3 real chip support
2025-10-13 15:25:23 +08:00
3d3b287672
fix(esp_system): manage slow clock sleep pd in select_rtc_slow_clk
2025-10-10 20:04:58 +08:00
69c31289ad
fix(clk): clear force_on reg for cache
2025-10-09 13:19:46 +08:00
175e885555
fix(esp_vfs_console): Update placement of cdcacm_xx_cb when ETS print enabled
2025-10-07 08:26:54 +02:00
22bec9eed7
fix(panic_handler): Fixed a issue where the system reboots before halt
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This commit fixes an issue where the panic handler may reboot even if it
is configured to halt the CPU.
Closes https://github.com/espressif/esp-idf/issues/17260
2025-08-14 11:00:45 +02:00
dafdf1205d
Merge branch 'feat/secure_boot_ecdsa_p384_v5.5' into 'release/v5.5'
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Support Secure Boot using ECDSA-P384 curve (v5.5)
See merge request espressif/esp-idf!40822
2025-07-31 21:24:55 +08:00
92a09ce7f0
Merge branch 'fix/fix_submode_assert_in_slowck_changed_ota_v5.5' into 'release/v5.5'
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fix(esp_hw_support): fix assert when changing 8MD256 RTC slow clock source during OTA (v5.5)
See merge request espressif/esp-idf!40820
2025-07-30 10:46:31 +08:00
b5944c8f34
Merge branch 'feature/iram_esp_system_v5.5' into 'release/v5.5'
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feat(esp_system): Adds Kconfigs to place code in IRAM (v5.5)
See merge request espressif/esp-idf!40516
2025-07-25 19:45:26 +08:00
12393745c2
fix(esp_system): Remove redundant crypto clock source selection
2025-07-25 14:43:56 +05:30
ddbf8391d9
fix(esp_hw_support): enable ESP_SLEEP_RTC_FAST_USE_XTAL_MODE only once in RTC_FAST selection
2025-07-25 16:49:16 +08:00
e72ea712e7
feat(esp_system): Adds Kconfigs to place code in IRAM
2025-07-24 00:34:58 +08:00
a002a04332
feat(soc): Added soc capabilities related to RNG
2025-07-23 18:24:46 +05:30
0291ab0dfb
Merge branch 'feature/support_chip912_pvt_auto_dbias_360m_backport_v5.5' into 'release/v5.5'
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feat(esp_hw_support): use pvt to auto control digital ldo and rtc ldo for esp32p4_backport_v5.5
See merge request espressif/esp-idf!40676
2025-07-22 17:36:09 +08:00
e2d5f85804
Merge branch 'feat/call_start_in_flash_v5.5' into 'release/v5.5'
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esp_system: move call_start_cpu* into flash to save IRAM (v5.5)
See merge request espressif/esp-idf!39926
2025-07-22 14:38:14 +08:00
3c39b32195
Chip/support esp32c61 v5.5
2025-07-22 12:21:36 +08:00
3d3731965c
feat(esp_hw_support): use pvt to auto control digital ldo and rtc ldo for esp32p4
2025-07-18 09:54:31 +08:00
c844ba4f7f
fix(esp_system): force enable uart0 sclk in esp_restart
2025-07-03 19:13:41 +08:00
20ec15edff
fix(esp_system): fix RTC reserved area alignment in the linker script
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Make sure the size of the RTC reserved area complies with the alignment requirement.
Closes https://github.com/espressif/esp-idf/issues/13082
2025-06-18 20:11:47 +08:00
e1faf670b2
feat(hw_support): move call_start_cpu0 into flash to save IRAM
2025-06-17 15:11:36 +08:00
cd7c97e6eb
Merge branch 'disable_esp32c61_test_v5.5' into 'release/v5.5'
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ci(change): disable esp32c61 tests
See merge request espressif/esp-idf!39656
2025-06-17 14:08:56 +08:00
2e7a9174fc
Merge branch 'feature/esp_tee_h2_v5.5' into 'release/v5.5'
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feat(esp_tee): Support for ESP32-H2 (v5.5)
See merge request espressif/esp-idf!39311
2025-06-16 12:04:22 +05:30
d8fa0886b0
Merge branch 'feat/c5_eco2_psram_timing_tuning_v5.5' into 'release/v5.5'
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mspi: psram 80M timing tuning on C5 ECO2 (v5.5)
See merge request espressif/esp-idf!39345
2025-06-16 10:01:13 +08:00
693a5393b2
change(unit-test): filter top domain power down check for some sleep test cases
2025-06-05 22:08:34 +08:00
Song Ruo Jing