Commit Graph

2327 Commits

Author SHA1 Message Date
Jiang Jiang Jian c1a09f9cef Merge branch 'fix/p4_fixed_mdc_config_v5.5' into 'release/v5.5'
fix(esp_eth): fixed ESP32P4 CSR clock range used to determine MDC (v5.5)

See merge request espressif/esp-idf!44225
2026-01-16 14:33:02 +08:00
hebinglin 17c110d640 change(esp_driver): set cases with toppd check only run in esp32c5eco3 rather than eco2 2026-01-15 17:04:17 +08:00
hebinglin 902d13d489 change(esp_hw_support): remove sleep_mmu_retention related flow for esp32c5 eco1 2026-01-15 17:04:17 +08:00
hebinglin 416c56c1ef feat(esp_hw_support): support top pd during sleep in esp32c5 eco3 2026-01-15 17:04:17 +08:00
hebinglin 402558201c revert(esp_hw_support): force top domain power up during sleep
This reverts commit 7912f9fafef4c90a2a644332c46af7fd5e91f148.
2026-01-15 17:04:17 +08:00
Jiang Jiang Jian e0409f0175 Merge branch 'bugfix/idfci-7928_v5.5' into 'release/v5.5'
backport v5.5: fix ci failed test case of Automatic light occurs when tasks are suspended

See merge request espressif/esp-idf!44947
2026-01-13 11:02:20 +08:00
morris bb1bf75a83 Merge branch 'refactor/gdma_channel_allocator_both_direction_v5.5' into 'release/v5.5'
feat(gdma): support ESP32-P4 ECO6 (v5.5)

See merge request espressif/esp-idf!44873
2026-01-12 14:29:05 +08:00
Li Shuai 2b5b772dfc change(esp_hw_support): update esp32 sleep parameters when disabling system sleep IRAM optimization 2026-01-09 10:38:47 +08:00
morris 8506035f5a refactor(gdma): enhance M2M capability handling 2026-01-08 18:25:42 +08:00
Ondrej Kosta 2a5b04b0b4 fix(esp_eth): fixes EMAC MDC out of the range issue
Closes https://github.com/espressif/esp-idf/issues/17984
2026-01-06 22:18:37 +08:00
Li Shuai bbba2471ea change(esp_hw_support): update some sleep parameters when sleep iram optimization is disabled 2025-12-31 14:54:29 +08:00
Li Shuai 12d208bc15 fix(esp_hw_support): fix esp32p4 HP_SYS_HP_WDT_RESET issue caused by cache invalid all 2025-12-31 14:53:34 +08:00
Li Shuai bb5e96f596 fix(esp_hw_support): fix cpu lockup reset issue caused by i-cache illegal access during esp_restart 2025-12-31 14:48:01 +08:00
Li Shuai ea6b0ff2da fix(esp_hw_support): fix the esp32h2 sleep TG0 watchdog reset issue caused by power down the top domain 2025-12-31 14:39:11 +08:00
Li Shuai d80819f6d7 change(esp_pm): add an option associated with flash auto suspend and make it dependent on the hardware support modules 2025-12-31 14:37:20 +08:00
Li Shuai 72895e7b71 change(esp_hw_support): modify the default value of the kconfig option for place peripheral control module into iram to y 2025-12-31 14:36:46 +08:00
Li Shuai 2efc896aec change(esp_hw_support): add kconfig option to put rtc time module into iram 2025-12-31 14:35:56 +08:00
Li Shuai a2ca229d2a change(esp_hw_support): add kconfig option to put rtc clock module into iram 2025-12-31 14:17:17 +08:00
Jiang Jiang Jian 9b69adf1fa Merge branch 'bugfix/esp_idf_h2_flash_cs_hold_v5.5' into 'release/v5.5'
fix(esp_hw_support): fix flash cs unhold during sleep when pd top in esp32h2 (v5.5)

See merge request espressif/esp-idf!43558
2025-12-30 10:16:31 +08:00
morris 1851470481 Merge branch 'feat/p4eco6_ldo2dcdc_support_v5.5' into 'release/v5.5'
feat (p4eco6): open dcdc switch by software when dcdc stable (v5.5)

See merge request espressif/esp-idf!44578
2025-12-29 11:18:37 +08:00
morris fb7466c86b Merge branch 'refactor/gdma_link_skip_null_buffer_v5.5' into 'release/v5.5'
skip the NULL buffer in DMA mount pre-check (v5.5)

See merge request espressif/esp-idf!44459
2025-12-26 18:01:03 +08:00
Mahavir Jain 9ea85ed080 Merge branch 'feat/add_c5_v102_config_v5.5' into 'release/v5.5'
hw_support: add new config for c5 v1.2 and c61 v1.1 (v5.5)

See merge request espressif/esp-idf!43615
2025-12-26 09:51:18 +05:30
chaijie@espressif.com 3fb705d852 feat (p4eco6): open dcdc switch by software when dcdc stable 2025-12-26 09:54:02 +08:00
morris e5b4993cd2 Merge branch 'backport/recent_backport_collection_v5.5' into 'release/v5.5'
backport: backport recent i2s/parlio rx/touch related to v5.5

See merge request espressif/esp-idf!43785
2025-12-26 09:52:26 +08:00
hebinglin 08b3edc0a6 fix(esp_hw_support): fix flash cs unhold during sleep when pd top in esp32h2 2025-12-24 10:33:54 +08:00
morris b652c1a5e8 refactor(gdma): skip the null buffer in mount pre-check 2025-12-24 10:09:21 +08:00
wuzhenghui 5d5d15fbfc fix(esp_hw_support): fix RNG to LP Peri domain dependency on C5 2025-12-23 23:43:13 +08:00
Xiao Xufeng faf6cc4f84 feat(spi_flash): implement dynamic CPU frequency switching workaround for encrypted writes
This commit implements a workaround that allows ESP32-C5 to run at 240MHz CPU frequency
normally, while automatically reducing CPU frequency during encrypted flash writes to
ensure correct operation. The frequency limit is chip revision dependent:
- v1.2 and above: limited to 160MHz during encrypted writes
- v1.0 and below: limited to 80MHz during encrypted writes

Key implementation details:
- Frequency limiting is triggered automatically when esp_flash_write_encrypted() is called
- Uses start() flags (ESP_FLASH_START_FLAG_LIMIT_CPU_FREQ) to integrate with OS layer
- Works with both PM enabled and disabled configurations
- Frequency is automatically restored after encrypted write completes
- For ESP32-C5 with 120MHz flash, Flash clock and timing registers are adjusted when
  CPU frequency is reduced to 80MHz
- SPI1 timing registers are configured during frequency switching since encrypted writes
  use SPI1 and must work correctly at reduced CPU frequencies

Code improvements:
- Use SOC_MSPI_FREQ_AXI_CONSTRAINED capability macro instead of hardcoded chip checks
- Control workaround via Kconfig (CONFIG_PM_WORKAROUND_FREQ_LIMIT_ENABLED) instead of
  hardcoded macros
- Add comprehensive test cases covering various PM configurations and edge cases

This workaround enables ESP32-C5 applications to benefit from 240MHz CPU performance
while maintaining reliable encrypted flash write functionality.
2025-12-17 03:33:29 +08:00
sibeibei 0f07ad18b6 fix: add mutex protection for software trigger RegDMA start to avoid data races 2025-12-11 20:32:53 +08:00
Jiang Jiang Jian 871ec2c1ef Merge branch 'feat/enable_lowpower_tests_for_p4_v3_v5.5' into 'release/v5.5'
feat: re-enable P4 pm/wakeup tests for rev3.0 (v5.5)

See merge request espressif/esp-idf!43760
2025-12-04 10:46:56 +08:00
wuzhenghui ca8183d36a fix(esp_hw_support): update DEFAULT_SLEEP_OUT_OVERHEAD_US for esp32c61 2025-12-02 14:59:04 +08:00
Xiao Xufeng 625c96675e feat(hw_support): add config version for c61 v1.1 2025-11-30 19:40:47 +08:00
Xiao Xufeng 26b91fc262 feat(hw_support): add config version for c5 v1.2 2025-11-30 19:40:47 +08:00
laokaiyao 047ea940bf refactor(parlio_rx): refactor to support unaligned user payload buffer
Closes https://github.com/espressif/esp-idf/issues/17581
2025-11-28 15:37:28 +08:00
laokaiyao ce84d734ef feat(gdma_link): support to select final node link type 2025-11-27 11:36:58 +08:00
Jiang Jiang Jian 6a7659432b Merge branch 'feat/esp_idf_feat_gpioworkaround_v5.5' into 'release/v5.5'
feat(esp_hw_support): add gpio reset workaround except esp32 & esp32s2 (v5.5)

See merge request espressif/esp-idf!43469
2025-11-27 10:22:02 +08:00
Jiang Jiang Jian 2db91774f7 Merge branch 'fix/fix_bad_esp_clk_tree_initialize_v5.5' into 'release/v5.5'
fix(esp_hw_support): fix esp32c5 clk seting broken after CPU reset (v5.5)

See merge request espressif/esp-idf!43453
2025-11-27 10:19:11 +08:00
wuzhenghui ab1998e45b feat(esp_hw_support): re-enable P4 sleep wakeup tests for rev3.0 2025-11-26 19:24:21 +08:00
Michael (XIAO Xufeng) d2ac65df80 Merge branch 'feat/make_p4_rev3_default_v5.5' into 'release/v5.5'
p4: make v3 as default for CI (v5.5)

See merge request espressif/esp-idf!43441
2025-11-26 12:02:29 +08:00
morris d66ebb86d2 Merge branch 'feat/psram_250m_p4_v5.5' into 'release/v5.5'
psram: support 250MHz in experimental (v5.5)

See merge request espressif/esp-idf!43348
2025-11-21 11:12:22 +08:00
armando 4ef2005b80 change(ci): use p4 rev3 by default only when ci build 2025-11-20 11:33:36 +08:00
armando 304ba1655b fix check test scripts build issue 2025-11-20 11:33:36 +08:00
armando cdff2570c7 ci(p4): disable p4 rev3 invalid tests temporarily 2025-11-20 11:33:36 +08:00
armando e44a3603c4 refactor(sleep_cpu): suppress infinite loop warnings with compiler diagnostics 2025-11-20 11:33:36 +08:00
armando 304ebc0c74 change(p4): make v3 as default 2025-11-20 11:33:36 +08:00
hebinglin 8e0f48798b feat(esp_hw_support): add gpio reset workaround in esp32h21 & esp32h4 2025-11-18 14:19:17 +08:00
wuzhenghui 159418f638 fix(esp_hw_support): fix esp32c5 clk seting broken after CPU reset
Closes https://github.com/espressif/esp-idf/issues/17780
2025-11-18 11:47:17 +08:00
Jiang Jiang Jian 34c9b4fc72 Merge branch 'fix/fix_c6_rtc_periph_depends_on_top_v5.5' into 'release/v5.5'
fix(esp_hw_support): add dependency of the TOP domain to the RTC_PERIPH domain for esp32c6 (v5.5)

See merge request espressif/esp-idf!43383
2025-11-17 15:16:14 +08:00
wuzhenghui 8c77a3075a fix(esp_hw_support): add dependency of the TOP domain to the RTC_PERIPH domain for esp32c6 2025-11-14 16:40:27 +08:00
Armando b698ac758e feat(psram): support 250MHz in experimental 2025-11-14 09:34:51 +08:00